Merge tag 'linux-kselftest-kunit-fixes-5.11-rc3' of git://git.kernel.org/pub/scm...
[linux/fpc-iii.git] / Documentation / devicetree / bindings / mtd / rockchip,nand-controller.yaml
blob0922536b18114499923bc19281cc43ab451dd7e6
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/mtd/rockchip,nand-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip SoCs NAND FLASH Controller (NFC)
9 allOf:
10   - $ref: "nand-controller.yaml#"
12 maintainers:
13   - Heiko Stuebner <heiko@sntech.de>
15 properties:
16   compatible:
17     oneOf:
18       - const: rockchip,px30-nfc
19       - const: rockchip,rk2928-nfc
20       - const: rockchip,rv1108-nfc
21       - items:
22           - const: rockchip,rk3036-nfc
23           - const: rockchip,rk2928-nfc
24       - items:
25           - const: rockchip,rk3308-nfc
26           - const: rockchip,rv1108-nfc
28   reg:
29     maxItems: 1
31   interrupts:
32     maxItems: 1
34   clocks:
35     minItems: 1
36     items:
37       - description: Bus Clock
38       - description: Module Clock
40   clock-names:
41     minItems: 1
42     items:
43       - const: ahb
44       - const: nfc
46   assigned-clocks:
47     maxItems: 1
49   assigned-clock-rates:
50     maxItems: 1
52   power-domains:
53     maxItems: 1
55 patternProperties:
56   "^nand@[0-7]$":
57     type: object
58     properties:
59       reg:
60         minimum: 0
61         maximum: 7
63       nand-ecc-mode:
64         const: hw
66       nand-ecc-step-size:
67         const: 1024
69       nand-ecc-strength:
70         enum: [16, 24, 40, 60, 70]
71         description: |
72           The ECC configurations that can be supported are as follows.
73             NFC v600 ECC 16, 24, 40, 60
74               RK2928, RK3066, RK3188
76             NFC v622 ECC 16, 24, 40, 60
77               RK3036, RK3128
79             NFC v800 ECC 16
80               RK3308, RV1108
82             NFC v900 ECC 16, 40, 60, 70
83               RK3326, PX30
85       nand-bus-width:
86         const: 8
88       rockchip,boot-blks:
89         $ref: /schemas/types.yaml#/definitions/uint32
90         minimum: 2
91         default: 16
92         description:
93           The NFC driver need this information to select ECC
94           algorithms supported by the boot ROM.
95           Only used in combination with 'nand-is-boot-medium'.
97       rockchip,boot-ecc-strength:
98         enum: [16, 24, 40, 60, 70]
99         allOf:
100           - $ref: /schemas/types.yaml#/definitions/uint32
101         description: |
102           If specified it indicates that a different BCH/ECC setting is
103           supported by the boot ROM.
104             NFC v600 ECC 16, 24
105               RK2928, RK3066, RK3188
107             NFC v622 ECC 16, 24, 40, 60
108               RK3036, RK3128
110             NFC v800 ECC 16
111               RK3308, RV1108
113             NFC v900 ECC 16, 70
114               RK3326, PX30
116           Only used in combination with 'nand-is-boot-medium'.
118 required:
119   - compatible
120   - reg
121   - interrupts
122   - clocks
123   - clock-names
125 unevaluatedProperties: false
127 examples:
128   - |
129     #include <dt-bindings/clock/rk3308-cru.h>
130     #include <dt-bindings/interrupt-controller/arm-gic.h>
131     nfc: nand-controller@ff4b0000 {
132       compatible = "rockchip,rk3308-nfc",
133                    "rockchip,rv1108-nfc";
134       reg = <0xff4b0000 0x4000>;
135       interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
136       clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
137       clock-names = "ahb", "nfc";
138       assigned-clocks = <&clks SCLK_NANDC>;
139       assigned-clock-rates = <150000000>;
141       pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_csn0
142                    &flash_rdn &flash_rdy &flash_wrn>;
143       pinctrl-names = "default";
145       #address-cells = <1>;
146       #size-cells = <0>;
148       nand@0 {
149         reg = <0>;
150         label = "rk-nand";
151         nand-bus-width = <8>;
152         nand-ecc-mode = "hw";
153         nand-ecc-step-size = <1024>;
154         nand-ecc-strength = <16>;
155         nand-is-boot-medium;
156         rockchip,boot-blks = <8>;
157         rockchip,boot-ecc-strength = <16>;
158       };
159     };