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mtd: add ECC info for nand_flash_dev{}
[linux/fpc-iii.git] / sound / soc / codecs / rt5640.c
blobce585e37e38a8f8edda36a0146ed477ec61224bc
1 /*
2 * rt5640.c -- RT5640 ALSA SoC audio codec driver
3 *
4 * Copyright 2011 Realtek Semiconductor Corp.
5 * Author: Johnny Hsu <johnnyhsu@realtek.com>
6 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/pm.h>
18 #include <linux/gpio.h>
19 #include <linux/i2c.h>
20 #include <linux/regmap.h>
21 #include <linux/of_gpio.h>
22 #include <linux/platform_device.h>
23 #include <linux/spi/spi.h>
24 #include <sound/core.h>
25 #include <sound/pcm.h>
26 #include <sound/pcm_params.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dapm.h>
29 #include <sound/initval.h>
30 #include <sound/tlv.h>
31
32 #include "rt5640.h"
33
34 #define RT5640_DEVICE_ID 0x6231
35
36 #define RT5640_PR_RANGE_BASE (0xff + 1)
37 #define RT5640_PR_SPACING 0x100
38
39 #define RT5640_PR_BASE (RT5640_PR_RANGE_BASE + (0 * RT5640_PR_SPACING))
40
41 static const struct regmap_range_cfg rt5640_ranges[] = {
42 { .name = "PR", .range_min = RT5640_PR_BASE,
43 .range_max = RT5640_PR_BASE + 0xb4,
44 .selector_reg = RT5640_PRIV_INDEX,
45 .selector_mask = 0xff,
46 .selector_shift = 0x0,
47 .window_start = RT5640_PRIV_DATA,
48 .window_len = 0x1, },
49 };
50
51 static struct reg_default init_list[] = {
52 {RT5640_PR_BASE + 0x3d, 0x3600},
53 {RT5640_PR_BASE + 0x1c, 0x0D21},
54 {RT5640_PR_BASE + 0x1b, 0x0000},
55 {RT5640_PR_BASE + 0x12, 0x0aa8},
56 {RT5640_PR_BASE + 0x14, 0x0aaa},
57 {RT5640_PR_BASE + 0x20, 0x6110},
58 {RT5640_PR_BASE + 0x21, 0xe0e0},
59 {RT5640_PR_BASE + 0x23, 0x1804},
60 };
61 #define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
62
63 static const struct reg_default rt5640_reg[RT5640_VENDOR_ID2 + 1] = {
64 { 0x00, 0x000e },
65 { 0x01, 0xc8c8 },
66 { 0x02, 0xc8c8 },
67 { 0x03, 0xc8c8 },
68 { 0x04, 0x8000 },
69 { 0x0d, 0x0000 },
70 { 0x0e, 0x0000 },
71 { 0x0f, 0x0808 },
72 { 0x19, 0xafaf },
73 { 0x1a, 0xafaf },
74 { 0x1b, 0x0000 },
75 { 0x1c, 0x2f2f },
76 { 0x1d, 0x2f2f },
77 { 0x1e, 0x0000 },
78 { 0x27, 0x7060 },
79 { 0x28, 0x7070 },
80 { 0x29, 0x8080 },
81 { 0x2a, 0x5454 },
82 { 0x2b, 0x5454 },
83 { 0x2c, 0xaa00 },
84 { 0x2d, 0x0000 },
85 { 0x2e, 0xa000 },
86 { 0x2f, 0x0000 },
87 { 0x3b, 0x0000 },
88 { 0x3c, 0x007f },
89 { 0x3d, 0x0000 },
90 { 0x3e, 0x007f },
91 { 0x45, 0xe000 },
92 { 0x46, 0x003e },
93 { 0x47, 0x003e },
94 { 0x48, 0xf800 },
95 { 0x49, 0x3800 },
96 { 0x4a, 0x0004 },
97 { 0x4c, 0xfc00 },
98 { 0x4d, 0x0000 },
99 { 0x4f, 0x01ff },
100 { 0x50, 0x0000 },
101 { 0x51, 0x0000 },
102 { 0x52, 0x01ff },
103 { 0x53, 0xf000 },
104 { 0x61, 0x0000 },
105 { 0x62, 0x0000 },
106 { 0x63, 0x00c0 },
107 { 0x64, 0x0000 },
108 { 0x65, 0x0000 },
109 { 0x66, 0x0000 },
110 { 0x6a, 0x0000 },
111 { 0x6c, 0x0000 },
112 { 0x70, 0x8000 },
113 { 0x71, 0x8000 },
114 { 0x72, 0x8000 },
115 { 0x73, 0x1114 },
116 { 0x74, 0x0c00 },
117 { 0x75, 0x1d00 },
118 { 0x80, 0x0000 },
119 { 0x81, 0x0000 },
120 { 0x82, 0x0000 },
121 { 0x83, 0x0000 },
122 { 0x84, 0x0000 },
123 { 0x85, 0x0008 },
124 { 0x89, 0x0000 },
125 { 0x8a, 0x0000 },
126 { 0x8b, 0x0600 },
127 { 0x8c, 0x0228 },
128 { 0x8d, 0xa000 },
129 { 0x8e, 0x0004 },
130 { 0x8f, 0x1100 },
131 { 0x90, 0x0646 },
132 { 0x91, 0x0c00 },
133 { 0x92, 0x0000 },
134 { 0x93, 0x3000 },
135 { 0xb0, 0x2080 },
136 { 0xb1, 0x0000 },
137 { 0xb4, 0x2206 },
138 { 0xb5, 0x1f00 },
139 { 0xb6, 0x0000 },
140 { 0xb8, 0x034b },
141 { 0xb9, 0x0066 },
142 { 0xba, 0x000b },
143 { 0xbb, 0x0000 },
144 { 0xbc, 0x0000 },
145 { 0xbd, 0x0000 },
146 { 0xbe, 0x0000 },
147 { 0xbf, 0x0000 },
148 { 0xc0, 0x0400 },
149 { 0xc2, 0x0000 },
150 { 0xc4, 0x0000 },
151 { 0xc5, 0x0000 },
152 { 0xc6, 0x2000 },
153 { 0xc8, 0x0000 },
154 { 0xc9, 0x0000 },
155 { 0xca, 0x0000 },
156 { 0xcb, 0x0000 },
157 { 0xcc, 0x0000 },
158 { 0xcf, 0x0013 },
159 { 0xd0, 0x0680 },
160 { 0xd1, 0x1c17 },
161 { 0xd2, 0x8c00 },
162 { 0xd3, 0xaa20 },
163 { 0xd6, 0x0400 },
164 { 0xd9, 0x0809 },
165 { 0xfe, 0x10ec },
166 { 0xff, 0x6231 },
167 };
168
169 static int rt5640_reset(struct snd_soc_codec *codec)
170 {
171 return snd_soc_write(codec, RT5640_RESET, 0);
172 }
173
174 static bool rt5640_volatile_register(struct device *dev, unsigned int reg)
175 {
176 int i;
177
178 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
179 if ((reg >= rt5640_ranges[i].window_start &&
180 reg <= rt5640_ranges[i].window_start +
181 rt5640_ranges[i].window_len) ||
182 (reg >= rt5640_ranges[i].range_min &&
183 reg <= rt5640_ranges[i].range_max))
184 return true;
185
186 switch (reg) {
187 case RT5640_RESET:
188 case RT5640_ASRC_5:
189 case RT5640_EQ_CTRL1:
190 case RT5640_DRC_AGC_1:
191 case RT5640_ANC_CTRL1:
192 case RT5640_IRQ_CTRL2:
193 case RT5640_INT_IRQ_ST:
194 case RT5640_DSP_CTRL2:
195 case RT5640_DSP_CTRL3:
196 case RT5640_PRIV_INDEX:
197 case RT5640_PRIV_DATA:
198 case RT5640_PGM_REG_ARR1:
199 case RT5640_PGM_REG_ARR3:
200 case RT5640_VENDOR_ID:
201 case RT5640_VENDOR_ID1:
202 case RT5640_VENDOR_ID2:
203 return true;
204 default:
205 return false;
206 }
207 }
208
209 static bool rt5640_readable_register(struct device *dev, unsigned int reg)
210 {
211 int i;
212
213 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
214 if ((reg >= rt5640_ranges[i].window_start &&
215 reg <= rt5640_ranges[i].window_start +
216 rt5640_ranges[i].window_len) ||
217 (reg >= rt5640_ranges[i].range_min &&
218 reg <= rt5640_ranges[i].range_max))
219 return true;
220
221 switch (reg) {
222 case RT5640_RESET:
223 case RT5640_SPK_VOL:
224 case RT5640_HP_VOL:
225 case RT5640_OUTPUT:
226 case RT5640_MONO_OUT:
227 case RT5640_IN1_IN2:
228 case RT5640_IN3_IN4:
229 case RT5640_INL_INR_VOL:
230 case RT5640_DAC1_DIG_VOL:
231 case RT5640_DAC2_DIG_VOL:
232 case RT5640_DAC2_CTRL:
233 case RT5640_ADC_DIG_VOL:
234 case RT5640_ADC_DATA:
235 case RT5640_ADC_BST_VOL:
236 case RT5640_STO_ADC_MIXER:
237 case RT5640_MONO_ADC_MIXER:
238 case RT5640_AD_DA_MIXER:
239 case RT5640_STO_DAC_MIXER:
240 case RT5640_MONO_DAC_MIXER:
241 case RT5640_DIG_MIXER:
242 case RT5640_DSP_PATH1:
243 case RT5640_DSP_PATH2:
244 case RT5640_DIG_INF_DATA:
245 case RT5640_REC_L1_MIXER:
246 case RT5640_REC_L2_MIXER:
247 case RT5640_REC_R1_MIXER:
248 case RT5640_REC_R2_MIXER:
249 case RT5640_HPO_MIXER:
250 case RT5640_SPK_L_MIXER:
251 case RT5640_SPK_R_MIXER:
252 case RT5640_SPO_L_MIXER:
253 case RT5640_SPO_R_MIXER:
254 case RT5640_SPO_CLSD_RATIO:
255 case RT5640_MONO_MIXER:
256 case RT5640_OUT_L1_MIXER:
257 case RT5640_OUT_L2_MIXER:
258 case RT5640_OUT_L3_MIXER:
259 case RT5640_OUT_R1_MIXER:
260 case RT5640_OUT_R2_MIXER:
261 case RT5640_OUT_R3_MIXER:
262 case RT5640_LOUT_MIXER:
263 case RT5640_PWR_DIG1:
264 case RT5640_PWR_DIG2:
265 case RT5640_PWR_ANLG1:
266 case RT5640_PWR_ANLG2:
267 case RT5640_PWR_MIXER:
268 case RT5640_PWR_VOL:
269 case RT5640_PRIV_INDEX:
270 case RT5640_PRIV_DATA:
271 case RT5640_I2S1_SDP:
272 case RT5640_I2S2_SDP:
273 case RT5640_ADDA_CLK1:
274 case RT5640_ADDA_CLK2:
275 case RT5640_DMIC:
276 case RT5640_GLB_CLK:
277 case RT5640_PLL_CTRL1:
278 case RT5640_PLL_CTRL2:
279 case RT5640_ASRC_1:
280 case RT5640_ASRC_2:
281 case RT5640_ASRC_3:
282 case RT5640_ASRC_4:
283 case RT5640_ASRC_5:
284 case RT5640_HP_OVCD:
285 case RT5640_CLS_D_OVCD:
286 case RT5640_CLS_D_OUT:
287 case RT5640_DEPOP_M1:
288 case RT5640_DEPOP_M2:
289 case RT5640_DEPOP_M3:
290 case RT5640_CHARGE_PUMP:
291 case RT5640_PV_DET_SPK_G:
292 case RT5640_MICBIAS:
293 case RT5640_EQ_CTRL1:
294 case RT5640_EQ_CTRL2:
295 case RT5640_WIND_FILTER:
296 case RT5640_DRC_AGC_1:
297 case RT5640_DRC_AGC_2:
298 case RT5640_DRC_AGC_3:
299 case RT5640_SVOL_ZC:
300 case RT5640_ANC_CTRL1:
301 case RT5640_ANC_CTRL2:
302 case RT5640_ANC_CTRL3:
303 case RT5640_JD_CTRL:
304 case RT5640_ANC_JD:
305 case RT5640_IRQ_CTRL1:
306 case RT5640_IRQ_CTRL2:
307 case RT5640_INT_IRQ_ST:
308 case RT5640_GPIO_CTRL1:
309 case RT5640_GPIO_CTRL2:
310 case RT5640_GPIO_CTRL3:
311 case RT5640_DSP_CTRL1:
312 case RT5640_DSP_CTRL2:
313 case RT5640_DSP_CTRL3:
314 case RT5640_DSP_CTRL4:
315 case RT5640_PGM_REG_ARR1:
316 case RT5640_PGM_REG_ARR2:
317 case RT5640_PGM_REG_ARR3:
318 case RT5640_PGM_REG_ARR4:
319 case RT5640_PGM_REG_ARR5:
320 case RT5640_SCB_FUNC:
321 case RT5640_SCB_CTRL:
322 case RT5640_BASE_BACK:
323 case RT5640_MP3_PLUS1:
324 case RT5640_MP3_PLUS2:
325 case RT5640_3D_HP:
326 case RT5640_ADJ_HPF:
327 case RT5640_HP_CALIB_AMP_DET:
328 case RT5640_HP_CALIB2:
329 case RT5640_SV_ZCD1:
330 case RT5640_SV_ZCD2:
331 case RT5640_DUMMY1:
332 case RT5640_DUMMY2:
333 case RT5640_DUMMY3:
334 case RT5640_VENDOR_ID:
335 case RT5640_VENDOR_ID1:
336 case RT5640_VENDOR_ID2:
337 return true;
338 default:
339 return false;
340 }
341 }
342
343 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
344 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
345 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
346 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
347 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
348
349 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
350 static unsigned int bst_tlv[] = {
351 TLV_DB_RANGE_HEAD(7),
352 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
353 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
354 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
355 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
356 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
357 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
358 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
359 };
360
361 /* Interface data select */
362 static const char * const rt5640_data_select[] = {
363 "Normal", "left copy to right", "right copy to left", "Swap"};
364
365 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
366 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
367
368 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
369 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
370
371 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
372 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
373
374 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
375 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
376
377 /* Class D speaker gain ratio */
378 static const char * const rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x",
379 "2x", "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
380
381 static const SOC_ENUM_SINGLE_DECL(
382 rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
383 RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
384
385 static const struct snd_kcontrol_new rt5640_snd_controls[] = {
386 /* Speaker Output Volume */
387 SOC_DOUBLE("Speaker Playback Switch", RT5640_SPK_VOL,
388 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
389 SOC_DOUBLE("Speaker Channel Switch", RT5640_SPK_VOL,
390 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
391 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
392 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
393 /* Headphone Output Volume */
394 SOC_DOUBLE("HP Playback Switch", RT5640_HP_VOL,
395 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
396 SOC_DOUBLE("HP Channel Switch", RT5640_HP_VOL,
397 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
398 SOC_DOUBLE_TLV("HP Playback Volume", RT5640_HP_VOL,
399 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
400 /* OUTPUT Control */
401 SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
402 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
403 SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
404 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
405 SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
406 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
407 /* MONO Output Control */
408 SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT,
409 RT5640_L_MUTE_SFT, 1, 1),
410 /* DAC Digital Volume */
411 SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
412 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
413 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
414 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
415 175, 0, dac_vol_tlv),
416 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
417 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
418 175, 0, dac_vol_tlv),
419 /* IN1/IN2 Control */
420 SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
421 RT5640_BST_SFT1, 8, 0, bst_tlv),
422 SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
423 RT5640_BST_SFT2, 8, 0, bst_tlv),
424 /* INL/INR Volume Control */
425 SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
426 RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
427 31, 1, in_vol_tlv),
428 /* ADC Digital Volume Control */
429 SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
430 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
431 SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
432 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
433 127, 0, adc_vol_tlv),
434 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
435 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
436 127, 0, adc_vol_tlv),
437 /* ADC Boost Volume Control */
438 SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
439 RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
440 3, 0, adc_bst_tlv),
441 /* Class D speaker gain ratio */
442 SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
443
444 SOC_ENUM("ADC IF1 Data Switch", rt5640_if1_adc_enum),
445 SOC_ENUM("DAC IF1 Data Switch", rt5640_if1_dac_enum),
446 SOC_ENUM("ADC IF2 Data Switch", rt5640_if2_adc_enum),
447 SOC_ENUM("DAC IF2 Data Switch", rt5640_if2_dac_enum),
448 };
449
450 /**
451 * set_dmic_clk - Set parameter of dmic.
452 *
453 * @w: DAPM widget.
454 * @kcontrol: The kcontrol of this widget.
455 * @event: Event id.
456 *
457 * Choose dmic clock between 1MHz and 3MHz.
458 * It is better for clock to approximate 3MHz.
459 */
460 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
461 struct snd_kcontrol *kcontrol, int event)
462 {
463 struct snd_soc_codec *codec = w->codec;
464 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
465 int div[] = {2, 3, 4, 6, 8, 12};
466 int idx = -EINVAL, i;
467 int rate, red, bound, temp;
468
469 rate = rt5640->sysclk;
470 red = 3000000 * 12;
471 for (i = 0; i < ARRAY_SIZE(div); i++) {
472 bound = div[i] * 3000000;
473 if (rate > bound)
474 continue;
475 temp = bound - rate;
476 if (temp < red) {
477 red = temp;
478 idx = i;
479 }
480 }
481 if (idx < 0)
482 dev_err(codec->dev, "Failed to set DMIC clock\n");
483 else
484 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
485 idx << RT5640_DMIC_CLK_SFT);
486 return idx;
487 }
488
489 static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
490 struct snd_soc_dapm_widget *sink)
491 {
492 unsigned int val;
493
494 val = snd_soc_read(source->codec, RT5640_GLB_CLK);
495 val &= RT5640_SCLK_SRC_MASK;
496 if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T)
497 return 1;
498 else
499 return 0;
500 }
501
502 /* Digital Mixer */
503 static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
504 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
505 RT5640_M_ADC_L1_SFT, 1, 1),
506 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
507 RT5640_M_ADC_L2_SFT, 1, 1),
508 };
509
510 static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
511 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
512 RT5640_M_ADC_R1_SFT, 1, 1),
513 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
514 RT5640_M_ADC_R2_SFT, 1, 1),
515 };
516
517 static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
518 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
519 RT5640_M_MONO_ADC_L1_SFT, 1, 1),
520 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
521 RT5640_M_MONO_ADC_L2_SFT, 1, 1),
522 };
523
524 static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
525 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
526 RT5640_M_MONO_ADC_R1_SFT, 1, 1),
527 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
528 RT5640_M_MONO_ADC_R2_SFT, 1, 1),
529 };
530
531 static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
532 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
533 RT5640_M_ADCMIX_L_SFT, 1, 1),
534 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
535 RT5640_M_IF1_DAC_L_SFT, 1, 1),
536 };
537
538 static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
539 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
540 RT5640_M_ADCMIX_R_SFT, 1, 1),
541 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
542 RT5640_M_IF1_DAC_R_SFT, 1, 1),
543 };
544
545 static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
546 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
547 RT5640_M_DAC_L1_SFT, 1, 1),
548 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
549 RT5640_M_DAC_L2_SFT, 1, 1),
550 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
551 RT5640_M_ANC_DAC_L_SFT, 1, 1),
552 };
553
554 static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
555 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
556 RT5640_M_DAC_R1_SFT, 1, 1),
557 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
558 RT5640_M_DAC_R2_SFT, 1, 1),
559 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
560 RT5640_M_ANC_DAC_R_SFT, 1, 1),
561 };
562
563 static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
564 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
565 RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
566 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
567 RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
568 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
569 RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
570 };
571
572 static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
573 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
574 RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
575 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
576 RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
577 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
578 RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
579 };
580
581 static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
582 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
583 RT5640_M_STO_L_DAC_L_SFT, 1, 1),
584 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
585 RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
586 };
587
588 static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
589 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
590 RT5640_M_STO_R_DAC_R_SFT, 1, 1),
591 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
592 RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
593 };
594
595 /* Analog Input Mixer */
596 static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
597 SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
598 RT5640_M_HP_L_RM_L_SFT, 1, 1),
599 SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
600 RT5640_M_IN_L_RM_L_SFT, 1, 1),
601 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
602 RT5640_M_BST4_RM_L_SFT, 1, 1),
603 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
604 RT5640_M_BST1_RM_L_SFT, 1, 1),
605 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
606 RT5640_M_OM_L_RM_L_SFT, 1, 1),
607 };
608
609 static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
610 SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
611 RT5640_M_HP_R_RM_R_SFT, 1, 1),
612 SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
613 RT5640_M_IN_R_RM_R_SFT, 1, 1),
614 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
615 RT5640_M_BST4_RM_R_SFT, 1, 1),
616 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
617 RT5640_M_BST1_RM_R_SFT, 1, 1),
618 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
619 RT5640_M_OM_R_RM_R_SFT, 1, 1),
620 };
621
622 /* Analog Output Mixer */
623 static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
624 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
625 RT5640_M_RM_L_SM_L_SFT, 1, 1),
626 SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
627 RT5640_M_IN_L_SM_L_SFT, 1, 1),
628 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
629 RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
630 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
631 RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
632 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
633 RT5640_M_OM_L_SM_L_SFT, 1, 1),
634 };
635
636 static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
637 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
638 RT5640_M_RM_R_SM_R_SFT, 1, 1),
639 SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
640 RT5640_M_IN_R_SM_R_SFT, 1, 1),
641 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
642 RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
643 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
644 RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
645 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
646 RT5640_M_OM_R_SM_R_SFT, 1, 1),
647 };
648
649 static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
650 SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
651 RT5640_M_SM_L_OM_L_SFT, 1, 1),
652 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
653 RT5640_M_BST1_OM_L_SFT, 1, 1),
654 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
655 RT5640_M_IN_L_OM_L_SFT, 1, 1),
656 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
657 RT5640_M_RM_L_OM_L_SFT, 1, 1),
658 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
659 RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
660 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
661 RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
662 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
663 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
664 };
665
666 static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
667 SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
668 RT5640_M_SM_L_OM_R_SFT, 1, 1),
669 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
670 RT5640_M_BST4_OM_R_SFT, 1, 1),
671 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
672 RT5640_M_BST1_OM_R_SFT, 1, 1),
673 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
674 RT5640_M_IN_R_OM_R_SFT, 1, 1),
675 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
676 RT5640_M_RM_R_OM_R_SFT, 1, 1),
677 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
678 RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
679 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
680 RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
681 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
682 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
683 };
684
685 static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
686 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
687 RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
688 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
689 RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
690 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
691 RT5640_M_SV_R_SPM_L_SFT, 1, 1),
692 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
693 RT5640_M_SV_L_SPM_L_SFT, 1, 1),
694 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
695 RT5640_M_BST1_SPM_L_SFT, 1, 1),
696 };
697
698 static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
699 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
700 RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
701 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
702 RT5640_M_SV_R_SPM_R_SFT, 1, 1),
703 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
704 RT5640_M_BST1_SPM_R_SFT, 1, 1),
705 };
706
707 static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
708 SOC_DAPM_SINGLE("HPO MIX DAC2 Switch", RT5640_HPO_MIXER,
709 RT5640_M_DAC2_HM_SFT, 1, 1),
710 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
711 RT5640_M_DAC1_HM_SFT, 1, 1),
712 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
713 RT5640_M_HPVOL_HM_SFT, 1, 1),
714 };
715
716 static const struct snd_kcontrol_new rt5640_lout_mix[] = {
717 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
718 RT5640_M_DAC_L1_LM_SFT, 1, 1),
719 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
720 RT5640_M_DAC_R1_LM_SFT, 1, 1),
721 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
722 RT5640_M_OV_L_LM_SFT, 1, 1),
723 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
724 RT5640_M_OV_R_LM_SFT, 1, 1),
725 };
726
727 static const struct snd_kcontrol_new rt5640_mono_mix[] = {
728 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
729 RT5640_M_DAC_R2_MM_SFT, 1, 1),
730 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
731 RT5640_M_DAC_L2_MM_SFT, 1, 1),
732 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
733 RT5640_M_OV_R_MM_SFT, 1, 1),
734 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
735 RT5640_M_OV_L_MM_SFT, 1, 1),
736 SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
737 RT5640_M_BST1_MM_SFT, 1, 1),
738 };
739
740 /* INL/R source */
741 static const char * const rt5640_inl_src[] = {
742 "IN2P", "MONOP"
743 };
744
745 static const SOC_ENUM_SINGLE_DECL(
746 rt5640_inl_enum, RT5640_INL_INR_VOL,
747 RT5640_INL_SEL_SFT, rt5640_inl_src);
748
749 static const struct snd_kcontrol_new rt5640_inl_mux =
750 SOC_DAPM_ENUM("INL source", rt5640_inl_enum);
751
752 static const char * const rt5640_inr_src[] = {
753 "IN2N", "MONON"
754 };
755
756 static const SOC_ENUM_SINGLE_DECL(
757 rt5640_inr_enum, RT5640_INL_INR_VOL,
758 RT5640_INR_SEL_SFT, rt5640_inr_src);
759
760 static const struct snd_kcontrol_new rt5640_inr_mux =
761 SOC_DAPM_ENUM("INR source", rt5640_inr_enum);
762
763 /* Stereo ADC source */
764 static const char * const rt5640_stereo_adc1_src[] = {
765 "DIG MIX", "ADC"
766 };
767
768 static const SOC_ENUM_SINGLE_DECL(
769 rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
770 RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
771
772 static const struct snd_kcontrol_new rt5640_sto_adc_1_mux =
773 SOC_DAPM_ENUM("Stereo ADC1 Mux", rt5640_stereo_adc1_enum);
774
775 static const char * const rt5640_stereo_adc2_src[] = {
776 "DMIC1", "DMIC2", "DIG MIX"
777 };
778
779 static const SOC_ENUM_SINGLE_DECL(
780 rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
781 RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
782
783 static const struct snd_kcontrol_new rt5640_sto_adc_2_mux =
784 SOC_DAPM_ENUM("Stereo ADC2 Mux", rt5640_stereo_adc2_enum);
785
786 /* Mono ADC source */
787 static const char * const rt5640_mono_adc_l1_src[] = {
788 "Mono DAC MIXL", "ADCL"
789 };
790
791 static const SOC_ENUM_SINGLE_DECL(
792 rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
793 RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
794
795 static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
796 SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
797
798 static const char * const rt5640_mono_adc_l2_src[] = {
799 "DMIC L1", "DMIC L2", "Mono DAC MIXL"
800 };
801
802 static const SOC_ENUM_SINGLE_DECL(
803 rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
804 RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
805
806 static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
807 SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
808
809 static const char * const rt5640_mono_adc_r1_src[] = {
810 "Mono DAC MIXR", "ADCR"
811 };
812
813 static const SOC_ENUM_SINGLE_DECL(
814 rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
815 RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
816
817 static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
818 SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
819
820 static const char * const rt5640_mono_adc_r2_src[] = {
821 "DMIC R1", "DMIC R2", "Mono DAC MIXR"
822 };
823
824 static const SOC_ENUM_SINGLE_DECL(
825 rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
826 RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
827
828 static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
829 SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
830
831 /* DAC2 channel source */
832 static const char * const rt5640_dac_l2_src[] = {
833 "IF2", "Base L/R"
834 };
835
836 static int rt5640_dac_l2_values[] = {
837 0,
838 3,
839 };
840
841 static const SOC_VALUE_ENUM_SINGLE_DECL(
842 rt5640_dac_l2_enum, RT5640_DSP_PATH2, RT5640_DAC_L2_SEL_SFT,
843 0x3, rt5640_dac_l2_src, rt5640_dac_l2_values);
844
845 static const struct snd_kcontrol_new rt5640_dac_l2_mux =
846 SOC_DAPM_VALUE_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
847
848 static const char * const rt5640_dac_r2_src[] = {
849 "IF2",
850 };
851
852 static int rt5640_dac_r2_values[] = {
853 0,
854 };
855
856 static const SOC_VALUE_ENUM_SINGLE_DECL(
857 rt5640_dac_r2_enum, RT5640_DSP_PATH2, RT5640_DAC_R2_SEL_SFT,
858 0x3, rt5640_dac_r2_src, rt5640_dac_r2_values);
859
860 static const struct snd_kcontrol_new rt5640_dac_r2_mux =
861 SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
862
863 /* digital interface and iis interface map */
864 static const char * const rt5640_dai_iis_map[] = {
865 "1:1|2:2", "1:2|2:1", "1:1|2:1", "1:2|2:2"
866 };
867
868 static int rt5640_dai_iis_map_values[] = {
869 0,
870 5,
871 6,
872 7,
873 };
874
875 static const SOC_VALUE_ENUM_SINGLE_DECL(
876 rt5640_dai_iis_map_enum, RT5640_I2S1_SDP, RT5640_I2S_IF_SFT,
877 0x7, rt5640_dai_iis_map, rt5640_dai_iis_map_values);
878
879 static const struct snd_kcontrol_new rt5640_dai_mux =
880 SOC_DAPM_VALUE_ENUM("DAI select", rt5640_dai_iis_map_enum);
881
882 /* SDI select */
883 static const char * const rt5640_sdi_sel[] = {
884 "IF1", "IF2"
885 };
886
887 static const SOC_ENUM_SINGLE_DECL(
888 rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
889 RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
890
891 static const struct snd_kcontrol_new rt5640_sdi_mux =
892 SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
893
894 static int spk_event(struct snd_soc_dapm_widget *w,
895 struct snd_kcontrol *kcontrol, int event)
896 {
897 struct snd_soc_codec *codec = w->codec;
898 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
899
900 switch (event) {
901 case SND_SOC_DAPM_POST_PMU:
902 regmap_update_bits(rt5640->regmap, RT5640_PWR_DIG1,
903 0x0001, 0x0001);
904 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE + 0x1c,
905 0xf000, 0xf000);
906 break;
907
908 case SND_SOC_DAPM_PRE_PMD:
909 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE + 0x1c,
910 0xf000, 0x0000);
911 regmap_update_bits(rt5640->regmap, RT5640_PWR_DIG1,
912 0x0001, 0x0000);
913 break;
914
915 default:
916 return 0;
917 }
918 return 0;
919 }
920
921 static int rt5640_set_dmic1_event(struct snd_soc_dapm_widget *w,
922 struct snd_kcontrol *kcontrol, int event)
923 {
924 struct snd_soc_codec *codec = w->codec;
925
926 switch (event) {
927 case SND_SOC_DAPM_PRE_PMU:
928 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
929 RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
930 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
931 snd_soc_update_bits(codec, RT5640_DMIC,
932 RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
933 RT5640_DMIC_1_DP_MASK,
934 RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
935 RT5640_DMIC_1_DP_IN1P);
936 break;
937
938 default:
939 return 0;
940 }
941
942 return 0;
943 }
944
945 static int rt5640_set_dmic2_event(struct snd_soc_dapm_widget *w,
946 struct snd_kcontrol *kcontrol, int event)
947 {
948 struct snd_soc_codec *codec = w->codec;
949
950 switch (event) {
951 case SND_SOC_DAPM_PRE_PMU:
952 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
953 RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
954 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
955 snd_soc_update_bits(codec, RT5640_DMIC,
956 RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
957 RT5640_DMIC_2_DP_MASK,
958 RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
959 RT5640_DMIC_2_DP_IN1N);
960 break;
961
962 default:
963 return 0;
964 }
965
966 return 0;
967 }
968
969 static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
970 SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
971 RT5640_PWR_PLL_BIT, 0, NULL, 0),
972 /* Input Side */
973 /* micbias */
974 SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
975 RT5640_PWR_LDO2_BIT, 0, NULL, 0),
976 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5640_PWR_ANLG2,
977 RT5640_PWR_MB1_BIT, 0, NULL, 0),
978 /* Input Lines */
979 SND_SOC_DAPM_INPUT("DMIC1"),
980 SND_SOC_DAPM_INPUT("DMIC2"),
981 SND_SOC_DAPM_INPUT("IN1P"),
982 SND_SOC_DAPM_INPUT("IN1N"),
983 SND_SOC_DAPM_INPUT("IN2P"),
984 SND_SOC_DAPM_INPUT("IN2N"),
985 SND_SOC_DAPM_PGA("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0),
986 SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
987 SND_SOC_DAPM_PGA("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0),
988 SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
989
990 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
991 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
992 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5640_DMIC,
993 RT5640_DMIC_1_EN_SFT, 0, rt5640_set_dmic1_event,
994 SND_SOC_DAPM_PRE_PMU),
995 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5640_DMIC,
996 RT5640_DMIC_2_EN_SFT, 0, rt5640_set_dmic2_event,
997 SND_SOC_DAPM_PRE_PMU),
998 /* Boost */
999 SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1000 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1001 SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1002 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1003 /* Input Volume */
1004 SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1005 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1006 SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1007 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
1008 /* IN Mux */
1009 SND_SOC_DAPM_MUX("INL Mux", SND_SOC_NOPM, 0, 0, &rt5640_inl_mux),
1010 SND_SOC_DAPM_MUX("INR Mux", SND_SOC_NOPM, 0, 0, &rt5640_inr_mux),
1011 /* REC Mixer */
1012 SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1013 rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1014 SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1015 rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1016 /* ADCs */
1017 SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1018 RT5640_PWR_ADC_L_BIT, 0),
1019 SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1020 RT5640_PWR_ADC_R_BIT, 0),
1021 /* ADC Mux */
1022 SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1023 &rt5640_sto_adc_2_mux),
1024 SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1025 &rt5640_sto_adc_2_mux),
1026 SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1027 &rt5640_sto_adc_1_mux),
1028 SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1029 &rt5640_sto_adc_1_mux),
1030 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1031 &rt5640_mono_adc_l2_mux),
1032 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1033 &rt5640_mono_adc_l1_mux),
1034 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1035 &rt5640_mono_adc_r1_mux),
1036 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1037 &rt5640_mono_adc_r2_mux),
1038 /* ADC Mixer */
1039 SND_SOC_DAPM_SUPPLY("Stereo Filter", RT5640_PWR_DIG2,
1040 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1041 SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1042 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1043 SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1044 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1045 SND_SOC_DAPM_SUPPLY("Mono Left Filter", RT5640_PWR_DIG2,
1046 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1047 SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1048 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1049 SND_SOC_DAPM_SUPPLY("Mono Right Filter", RT5640_PWR_DIG2,
1050 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1051 SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1052 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1053
1054 /* Digital Interface */
1055 SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1056 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1057 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1058 SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1059 SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1060 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1061 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1062 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1063 SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1064 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1065 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1066 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1067 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1068 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1069 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1070 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1071 /* Digital Interface Select */
1072 SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1073 SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1074 SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1075 SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1076 SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1077 SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1078 SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1079 SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1080 SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1081 SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1082 /* Audio Interface */
1083 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1084 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1085 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1086 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1087 /* Audio DSP */
1088 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1089 /* ANC */
1090 SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1091 /* Output Side */
1092 /* DAC mixer before sound effect */
1093 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1094 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1095 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1096 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1097 /* DAC2 channel Mux */
1098 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1099 &rt5640_dac_l2_mux),
1100 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1101 &rt5640_dac_r2_mux),
1102 /* DAC Mixer */
1103 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1104 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1105 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1106 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1107 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1108 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1109 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1110 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1111 SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1112 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1113 SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1114 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1115 /* DACs */
1116 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1117 RT5640_PWR_DAC_L1_BIT, 0),
1118 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1,
1119 RT5640_PWR_DAC_L2_BIT, 0),
1120 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1121 RT5640_PWR_DAC_R1_BIT, 0),
1122 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1,
1123 RT5640_PWR_DAC_R2_BIT, 0),
1124 /* SPK/OUT Mixer */
1125 SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1126 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1127 SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1128 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1129 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1130 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1131 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1132 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1133 /* Ouput Volume */
1134 SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1135 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1136 SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1137 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1138 SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1139 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1140 SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1141 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1142 SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1143 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1144 SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1145 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1146 /* SPO/HPO/LOUT/Mono Mixer */
1147 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1148 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1149 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1150 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1151 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1152 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1153 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1154 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1155 SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1156 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1157 SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1158 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1159 SND_SOC_DAPM_SUPPLY("Improve MONO Amp Drv", RT5640_PWR_ANLG1,
1160 RT5640_PWR_MA_BIT, 0, NULL, 0),
1161 SND_SOC_DAPM_SUPPLY("Improve HP Amp Drv", RT5640_PWR_ANLG1,
1162 SND_SOC_NOPM, 0, NULL, 0),
1163 SND_SOC_DAPM_PGA("HP L Amp", RT5640_PWR_ANLG1,
1164 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
1165 SND_SOC_DAPM_PGA("HP R Amp", RT5640_PWR_ANLG1,
1166 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1167 SND_SOC_DAPM_SUPPLY("Improve SPK Amp Drv", RT5640_PWR_DIG1,
1168 SND_SOC_NOPM, 0, spk_event,
1169 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1170 /* Output Lines */
1171 SND_SOC_DAPM_OUTPUT("SPOLP"),
1172 SND_SOC_DAPM_OUTPUT("SPOLN"),
1173 SND_SOC_DAPM_OUTPUT("SPORP"),
1174 SND_SOC_DAPM_OUTPUT("SPORN"),
1175 SND_SOC_DAPM_OUTPUT("HPOL"),
1176 SND_SOC_DAPM_OUTPUT("HPOR"),
1177 SND_SOC_DAPM_OUTPUT("LOUTL"),
1178 SND_SOC_DAPM_OUTPUT("LOUTR"),
1179 SND_SOC_DAPM_OUTPUT("MONOP"),
1180 SND_SOC_DAPM_OUTPUT("MONON"),
1181 };
1182
1183 static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1184 {"IN1P", NULL, "LDO2"},
1185 {"IN2P", NULL, "LDO2"},
1186
1187 {"DMIC L1", NULL, "DMIC1"},
1188 {"DMIC R1", NULL, "DMIC1"},
1189 {"DMIC L2", NULL, "DMIC2"},
1190 {"DMIC R2", NULL, "DMIC2"},
1191
1192 {"BST1", NULL, "IN1P"},
1193 {"BST1", NULL, "IN1N"},
1194 {"BST2", NULL, "IN2P"},
1195 {"BST2", NULL, "IN2N"},
1196
1197 {"INL VOL", NULL, "IN2P"},
1198 {"INR VOL", NULL, "IN2N"},
1199
1200 {"RECMIXL", "HPOL Switch", "HPOL"},
1201 {"RECMIXL", "INL Switch", "INL VOL"},
1202 {"RECMIXL", "BST2 Switch", "BST2"},
1203 {"RECMIXL", "BST1 Switch", "BST1"},
1204 {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1205
1206 {"RECMIXR", "HPOR Switch", "HPOR"},
1207 {"RECMIXR", "INR Switch", "INR VOL"},
1208 {"RECMIXR", "BST2 Switch", "BST2"},
1209 {"RECMIXR", "BST1 Switch", "BST1"},
1210 {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1211
1212 {"ADC L", NULL, "RECMIXL"},
1213 {"ADC R", NULL, "RECMIXR"},
1214
1215 {"DMIC L1", NULL, "DMIC CLK"},
1216 {"DMIC L1", NULL, "DMIC1 Power"},
1217 {"DMIC R1", NULL, "DMIC CLK"},
1218 {"DMIC R1", NULL, "DMIC1 Power"},
1219 {"DMIC L2", NULL, "DMIC CLK"},
1220 {"DMIC L2", NULL, "DMIC2 Power"},
1221 {"DMIC R2", NULL, "DMIC CLK"},
1222 {"DMIC R2", NULL, "DMIC2 Power"},
1223
1224 {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1225 {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1226 {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1227 {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1228 {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1229
1230 {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1231 {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1232 {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1233 {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1234 {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1235
1236 {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1237 {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1238 {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1239 {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1240 {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1241
1242 {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1243 {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1244 {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1245 {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1246 {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1247
1248 {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1249 {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1250 {"Stereo ADC MIXL", NULL, "Stereo Filter"},
1251 {"Stereo Filter", NULL, "PLL1", check_sysclk1_source},
1252
1253 {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1254 {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1255 {"Stereo ADC MIXR", NULL, "Stereo Filter"},
1256 {"Stereo Filter", NULL, "PLL1", check_sysclk1_source},
1257
1258 {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1259 {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1260 {"Mono ADC MIXL", NULL, "Mono Left Filter"},
1261 {"Mono Left Filter", NULL, "PLL1", check_sysclk1_source},
1262
1263 {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1264 {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1265 {"Mono ADC MIXR", NULL, "Mono Right Filter"},
1266 {"Mono Right Filter", NULL, "PLL1", check_sysclk1_source},
1267
1268 {"IF2 ADC L", NULL, "Mono ADC MIXL"},
1269 {"IF2 ADC R", NULL, "Mono ADC MIXR"},
1270 {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1271 {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1272
1273 {"IF1 ADC", NULL, "I2S1"},
1274 {"IF1 ADC", NULL, "IF1 ADC L"},
1275 {"IF1 ADC", NULL, "IF1 ADC R"},
1276 {"IF2 ADC", NULL, "I2S2"},
1277 {"IF2 ADC", NULL, "IF2 ADC L"},
1278 {"IF2 ADC", NULL, "IF2 ADC R"},
1279
1280 {"DAI1 TX Mux", "1:1|2:2", "IF1 ADC"},
1281 {"DAI1 TX Mux", "1:2|2:1", "IF2 ADC"},
1282 {"DAI1 IF1 Mux", "1:1|2:1", "IF1 ADC"},
1283 {"DAI1 IF2 Mux", "1:1|2:1", "IF2 ADC"},
1284 {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1285 {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1286
1287 {"DAI2 TX Mux", "1:2|2:1", "IF1 ADC"},
1288 {"DAI2 TX Mux", "1:1|2:2", "IF2 ADC"},
1289 {"DAI2 IF1 Mux", "1:2|2:2", "IF1 ADC"},
1290 {"DAI2 IF2 Mux", "1:2|2:2", "IF2 ADC"},
1291 {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1292 {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1293
1294 {"AIF1TX", NULL, "DAI1 TX Mux"},
1295 {"AIF1TX", NULL, "SDI1 TX Mux"},
1296 {"AIF2TX", NULL, "DAI2 TX Mux"},
1297 {"AIF2TX", NULL, "SDI2 TX Mux"},
1298
1299 {"DAI1 RX Mux", "1:1|2:2", "AIF1RX"},
1300 {"DAI1 RX Mux", "1:1|2:1", "AIF1RX"},
1301 {"DAI1 RX Mux", "1:2|2:1", "AIF2RX"},
1302 {"DAI1 RX Mux", "1:2|2:2", "AIF2RX"},
1303
1304 {"DAI2 RX Mux", "1:2|2:1", "AIF1RX"},
1305 {"DAI2 RX Mux", "1:1|2:1", "AIF1RX"},
1306 {"DAI2 RX Mux", "1:1|2:2", "AIF2RX"},
1307 {"DAI2 RX Mux", "1:2|2:2", "AIF2RX"},
1308
1309 {"IF1 DAC", NULL, "I2S1"},
1310 {"IF1 DAC", NULL, "DAI1 RX Mux"},
1311 {"IF2 DAC", NULL, "I2S2"},
1312 {"IF2 DAC", NULL, "DAI2 RX Mux"},
1313
1314 {"IF1 DAC L", NULL, "IF1 DAC"},
1315 {"IF1 DAC R", NULL, "IF1 DAC"},
1316 {"IF2 DAC L", NULL, "IF2 DAC"},
1317 {"IF2 DAC R", NULL, "IF2 DAC"},
1318
1319 {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1320 {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
1321 {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1322 {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1323
1324 {"ANC", NULL, "Stereo ADC MIXL"},
1325 {"ANC", NULL, "Stereo ADC MIXR"},
1326
1327 {"Audio DSP", NULL, "DAC MIXL"},
1328 {"Audio DSP", NULL, "DAC MIXR"},
1329
1330 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1331 {"DAC L2 Mux", "Base L/R", "Audio DSP"},
1332
1333 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1334
1335 {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1336 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1337 {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1338 {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1339 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1340 {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1341
1342 {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1343 {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1344 {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1345 {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1346 {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1347 {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1348
1349 {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
1350 {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1351 {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
1352 {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1353
1354 {"DAC L1", NULL, "Stereo DAC MIXL"},
1355 {"DAC L1", NULL, "PLL1", check_sysclk1_source},
1356 {"DAC R1", NULL, "Stereo DAC MIXR"},
1357 {"DAC R1", NULL, "PLL1", check_sysclk1_source},
1358 {"DAC L2", NULL, "Mono DAC MIXL"},
1359 {"DAC L2", NULL, "PLL1", check_sysclk1_source},
1360 {"DAC R2", NULL, "Mono DAC MIXR"},
1361 {"DAC R2", NULL, "PLL1", check_sysclk1_source},
1362
1363 {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1364 {"SPK MIXL", "INL Switch", "INL VOL"},
1365 {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
1366 {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1367 {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1368 {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1369 {"SPK MIXR", "INR Switch", "INR VOL"},
1370 {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
1371 {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1372 {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1373
1374 {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1375 {"OUT MIXL", "BST1 Switch", "BST1"},
1376 {"OUT MIXL", "INL Switch", "INL VOL"},
1377 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1378 {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1379 {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1380 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1381
1382 {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1383 {"OUT MIXR", "BST2 Switch", "BST2"},
1384 {"OUT MIXR", "BST1 Switch", "BST1"},
1385 {"OUT MIXR", "INR Switch", "INR VOL"},
1386 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1387 {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1388 {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1389 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1390
1391 {"SPKVOL L", NULL, "SPK MIXL"},
1392 {"SPKVOL R", NULL, "SPK MIXR"},
1393 {"HPOVOL L", NULL, "OUT MIXL"},
1394 {"HPOVOL R", NULL, "OUT MIXR"},
1395 {"OUTVOL L", NULL, "OUT MIXL"},
1396 {"OUTVOL R", NULL, "OUT MIXR"},
1397
1398 {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1399 {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1400 {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1401 {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1402 {"SPOL MIX", "BST1 Switch", "BST1"},
1403 {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1404 {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1405 {"SPOR MIX", "BST1 Switch", "BST1"},
1406
1407 {"HPO MIX L", "HPO MIX DAC2 Switch", "DAC L2"},
1408 {"HPO MIX L", "HPO MIX DAC1 Switch", "DAC L1"},
1409 {"HPO MIX L", "HPO MIX HPVOL Switch", "HPOVOL L"},
1410 {"HPO MIX R", "HPO MIX DAC2 Switch", "DAC R2"},
1411 {"HPO MIX R", "HPO MIX DAC1 Switch", "DAC R1"},
1412 {"HPO MIX R", "HPO MIX HPVOL Switch", "HPOVOL R"},
1413
1414 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1415 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1416 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1417 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1418
1419 {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1420 {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1421 {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1422 {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1423 {"Mono MIX", "BST1 Switch", "BST1"},
1424
1425 {"HP L Amp", NULL, "HPO MIX L"},
1426 {"HP R Amp", NULL, "HPO MIX R"},
1427
1428 {"SPOLP", NULL, "SPOL MIX"},
1429 {"SPOLN", NULL, "SPOL MIX"},
1430 {"SPORP", NULL, "SPOR MIX"},
1431 {"SPORN", NULL, "SPOR MIX"},
1432
1433 {"SPOLP", NULL, "Improve SPK Amp Drv"},
1434 {"SPOLN", NULL, "Improve SPK Amp Drv"},
1435 {"SPORP", NULL, "Improve SPK Amp Drv"},
1436 {"SPORN", NULL, "Improve SPK Amp Drv"},
1437
1438 {"HPOL", NULL, "Improve HP Amp Drv"},
1439 {"HPOR", NULL, "Improve HP Amp Drv"},
1440
1441 {"HPOL", NULL, "HP L Amp"},
1442 {"HPOR", NULL, "HP R Amp"},
1443 {"LOUTL", NULL, "LOUT MIX"},
1444 {"LOUTR", NULL, "LOUT MIX"},
1445 {"MONOP", NULL, "Mono MIX"},
1446 {"MONON", NULL, "Mono MIX"},
1447 {"MONOP", NULL, "Improve MONO Amp Drv"},
1448 };
1449
1450 static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1451 {
1452 int ret = 0, val;
1453
1454 if (codec == NULL)
1455 return -EINVAL;
1456
1457 val = snd_soc_read(codec, RT5640_I2S1_SDP);
1458 val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1459 switch (dai_id) {
1460 case RT5640_AIF1:
1461 switch (val) {
1462 case RT5640_IF_123:
1463 case RT5640_IF_132:
1464 ret |= RT5640_U_IF1;
1465 break;
1466 case RT5640_IF_113:
1467 ret |= RT5640_U_IF1;
1468 case RT5640_IF_312:
1469 case RT5640_IF_213:
1470 ret |= RT5640_U_IF2;
1471 break;
1472 }
1473 break;
1474
1475 case RT5640_AIF2:
1476 switch (val) {
1477 case RT5640_IF_231:
1478 case RT5640_IF_213:
1479 ret |= RT5640_U_IF1;
1480 break;
1481 case RT5640_IF_223:
1482 ret |= RT5640_U_IF1;
1483 case RT5640_IF_123:
1484 case RT5640_IF_321:
1485 ret |= RT5640_U_IF2;
1486 break;
1487 }
1488 break;
1489
1490 default:
1491 ret = -EINVAL;
1492 break;
1493 }
1494
1495 return ret;
1496 }
1497
1498 static int get_clk_info(int sclk, int rate)
1499 {
1500 int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1501
1502 if (sclk <= 0 || rate <= 0)
1503 return -EINVAL;
1504
1505 rate = rate << 8;
1506 for (i = 0; i < ARRAY_SIZE(pd); i++)
1507 if (sclk == rate * pd[i])
1508 return i;
1509
1510 return -EINVAL;
1511 }
1512
1513 static int rt5640_hw_params(struct snd_pcm_substream *substream,
1514 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1515 {
1516 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1517 struct snd_soc_codec *codec = rtd->codec;
1518 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1519 unsigned int val_len = 0, val_clk, mask_clk, dai_sel;
1520 int pre_div, bclk_ms, frame_size;
1521
1522 rt5640->lrck[dai->id] = params_rate(params);
1523 pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
1524 if (pre_div < 0) {
1525 dev_err(codec->dev, "Unsupported clock setting\n");
1526 return -EINVAL;
1527 }
1528 frame_size = snd_soc_params_to_frame_size(params);
1529 if (frame_size < 0) {
1530 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1531 return frame_size;
1532 }
1533 if (frame_size > 32)
1534 bclk_ms = 1;
1535 else
1536 bclk_ms = 0;
1537 rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
1538
1539 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1540 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
1541 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1542 bclk_ms, pre_div, dai->id);
1543
1544 switch (params_format(params)) {
1545 case SNDRV_PCM_FORMAT_S16_LE:
1546 break;
1547 case SNDRV_PCM_FORMAT_S20_3LE:
1548 val_len |= RT5640_I2S_DL_20;
1549 break;
1550 case SNDRV_PCM_FORMAT_S24_LE:
1551 val_len |= RT5640_I2S_DL_24;
1552 break;
1553 case SNDRV_PCM_FORMAT_S8:
1554 val_len |= RT5640_I2S_DL_8;
1555 break;
1556 default:
1557 return -EINVAL;
1558 }
1559
1560 dai_sel = get_sdp_info(codec, dai->id);
1561 if (dai_sel < 0) {
1562 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1563 return -EINVAL;
1564 }
1565 if (dai_sel & RT5640_U_IF1) {
1566 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
1567 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
1568 pre_div << RT5640_I2S_PD1_SFT;
1569 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1570 RT5640_I2S_DL_MASK, val_len);
1571 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1572 }
1573 if (dai_sel & RT5640_U_IF2) {
1574 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
1575 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
1576 pre_div << RT5640_I2S_PD2_SFT;
1577 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1578 RT5640_I2S_DL_MASK, val_len);
1579 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1580 }
1581
1582 return 0;
1583 }
1584
1585 static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1586 {
1587 struct snd_soc_codec *codec = dai->codec;
1588 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1589 unsigned int reg_val = 0, dai_sel;
1590
1591 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1592 case SND_SOC_DAIFMT_CBM_CFM:
1593 rt5640->master[dai->id] = 1;
1594 break;
1595 case SND_SOC_DAIFMT_CBS_CFS:
1596 reg_val |= RT5640_I2S_MS_S;
1597 rt5640->master[dai->id] = 0;
1598 break;
1599 default:
1600 return -EINVAL;
1601 }
1602
1603 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1604 case SND_SOC_DAIFMT_NB_NF:
1605 break;
1606 case SND_SOC_DAIFMT_IB_NF:
1607 reg_val |= RT5640_I2S_BP_INV;
1608 break;
1609 default:
1610 return -EINVAL;
1611 }
1612
1613 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1614 case SND_SOC_DAIFMT_I2S:
1615 break;
1616 case SND_SOC_DAIFMT_LEFT_J:
1617 reg_val |= RT5640_I2S_DF_LEFT;
1618 break;
1619 case SND_SOC_DAIFMT_DSP_A:
1620 reg_val |= RT5640_I2S_DF_PCM_A;
1621 break;
1622 case SND_SOC_DAIFMT_DSP_B:
1623 reg_val |= RT5640_I2S_DF_PCM_B;
1624 break;
1625 default:
1626 return -EINVAL;
1627 }
1628
1629 dai_sel = get_sdp_info(codec, dai->id);
1630 if (dai_sel < 0) {
1631 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1632 return -EINVAL;
1633 }
1634 if (dai_sel & RT5640_U_IF1) {
1635 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1636 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1637 RT5640_I2S_DF_MASK, reg_val);
1638 }
1639 if (dai_sel & RT5640_U_IF2) {
1640 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1641 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1642 RT5640_I2S_DF_MASK, reg_val);
1643 }
1644
1645 return 0;
1646 }
1647
1648 static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
1649 int clk_id, unsigned int freq, int dir)
1650 {
1651 struct snd_soc_codec *codec = dai->codec;
1652 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1653 unsigned int reg_val = 0;
1654
1655 if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src)
1656 return 0;
1657
1658 switch (clk_id) {
1659 case RT5640_SCLK_S_MCLK:
1660 reg_val |= RT5640_SCLK_SRC_MCLK;
1661 break;
1662 case RT5640_SCLK_S_PLL1:
1663 reg_val |= RT5640_SCLK_SRC_PLL1;
1664 break;
1665 case RT5640_SCLK_S_PLL1_TK:
1666 reg_val |= RT5640_SCLK_SRC_PLL1T;
1667 break;
1668 case RT5640_SCLK_S_RCCLK:
1669 reg_val |= RT5640_SCLK_SRC_RCCLK;
1670 break;
1671 default:
1672 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1673 return -EINVAL;
1674 }
1675 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1676 RT5640_SCLK_SRC_MASK, reg_val);
1677 rt5640->sysclk = freq;
1678 rt5640->sysclk_src = clk_id;
1679
1680 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1681 return 0;
1682 }
1683
1684 /**
1685 * rt5640_pll_calc - Calculate PLL M/N/K code.
1686 * @freq_in: external clock provided to codec.
1687 * @freq_out: target clock which codec works on.
1688 * @pll_code: Pointer to structure with M, N, K and bypass flag.
1689 *
1690 * Calculate M/N/K code to configure PLL for codec. And K is assigned to 2
1691 * which make calculation more efficiently.
1692 *
1693 * Returns 0 for success or negative error code.
1694 */
1695 static int rt5640_pll_calc(const unsigned int freq_in,
1696 const unsigned int freq_out, struct rt5640_pll_code *pll_code)
1697 {
1698 int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
1699 int n = 0, m = 0, red, n_t, m_t, in_t, out_t;
1700 int red_t = abs(freq_out - freq_in);
1701 bool bypass = false;
1702
1703 if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
1704 return -EINVAL;
1705
1706 for (n_t = 0; n_t <= max_n; n_t++) {
1707 in_t = (freq_in >> 1) + (freq_in >> 2) * n_t;
1708 if (in_t < 0)
1709 continue;
1710 if (in_t == freq_out) {
1711 bypass = true;
1712 n = n_t;
1713 goto code_find;
1714 }
1715 for (m_t = 0; m_t <= max_m; m_t++) {
1716 out_t = in_t / (m_t + 2);
1717 red = abs(out_t - freq_out);
1718 if (red < red_t) {
1719 n = n_t;
1720 m = m_t;
1721 if (red == 0)
1722 goto code_find;
1723 red_t = red;
1724 }
1725 }
1726 }
1727 pr_debug("Only get approximation about PLL\n");
1728
1729 code_find:
1730 pll_code->m_bp = bypass;
1731 pll_code->m_code = m;
1732 pll_code->n_code = n;
1733 pll_code->k_code = 2;
1734 return 0;
1735 }
1736
1737 static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1738 unsigned int freq_in, unsigned int freq_out)
1739 {
1740 struct snd_soc_codec *codec = dai->codec;
1741 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1742 struct rt5640_pll_code *pll_code = &rt5640->pll_code;
1743 int ret, dai_sel;
1744
1745 if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
1746 freq_out == rt5640->pll_out)
1747 return 0;
1748
1749 if (!freq_in || !freq_out) {
1750 dev_dbg(codec->dev, "PLL disabled\n");
1751
1752 rt5640->pll_in = 0;
1753 rt5640->pll_out = 0;
1754 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1755 RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
1756 return 0;
1757 }
1758
1759 switch (source) {
1760 case RT5640_PLL1_S_MCLK:
1761 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1762 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
1763 break;
1764 case RT5640_PLL1_S_BCLK1:
1765 case RT5640_PLL1_S_BCLK2:
1766 dai_sel = get_sdp_info(codec, dai->id);
1767 if (dai_sel < 0) {
1768 dev_err(codec->dev,
1769 "Failed to get sdp info: %d\n", dai_sel);
1770 return -EINVAL;
1771 }
1772 if (dai_sel & RT5640_U_IF1) {
1773 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1774 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
1775 }
1776 if (dai_sel & RT5640_U_IF2) {
1777 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1778 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
1779 }
1780 break;
1781 default:
1782 dev_err(codec->dev, "Unknown PLL source %d\n", source);
1783 return -EINVAL;
1784 }
1785
1786 ret = rt5640_pll_calc(freq_in, freq_out, pll_code);
1787 if (ret < 0) {
1788 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1789 return ret;
1790 }
1791
1792 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=2\n", pll_code->m_bp,
1793 (pll_code->m_bp ? 0 : pll_code->m_code), pll_code->n_code);
1794
1795 snd_soc_write(codec, RT5640_PLL_CTRL1,
1796 pll_code->n_code << RT5640_PLL_N_SFT | pll_code->k_code);
1797 snd_soc_write(codec, RT5640_PLL_CTRL2,
1798 (pll_code->m_bp ? 0 : pll_code->m_code) << RT5640_PLL_M_SFT |
1799 pll_code->m_bp << RT5640_PLL_M_BP_SFT);
1800
1801 rt5640->pll_in = freq_in;
1802 rt5640->pll_out = freq_out;
1803 rt5640->pll_src = source;
1804
1805 return 0;
1806 }
1807
1808 static int rt5640_set_bias_level(struct snd_soc_codec *codec,
1809 enum snd_soc_bias_level level)
1810 {
1811 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1812 switch (level) {
1813 case SND_SOC_BIAS_STANDBY:
1814 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
1815 regcache_cache_only(rt5640->regmap, false);
1816 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1817 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1818 RT5640_PWR_BG | RT5640_PWR_VREF2,
1819 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1820 RT5640_PWR_BG | RT5640_PWR_VREF2);
1821 mdelay(10);
1822 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1823 RT5640_PWR_FV1 | RT5640_PWR_FV2,
1824 RT5640_PWR_FV1 | RT5640_PWR_FV2);
1825 regcache_sync(rt5640->regmap);
1826 snd_soc_update_bits(codec, RT5640_DUMMY1,
1827 0x0301, 0x0301);
1828 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1829 0x001d, 0x0019);
1830 snd_soc_update_bits(codec, RT5640_DEPOP_M2,
1831 0x2000, 0x2000);
1832 snd_soc_update_bits(codec, RT5640_MICBIAS,
1833 0x0030, 0x0030);
1834 }
1835 break;
1836
1837 case SND_SOC_BIAS_OFF:
1838 snd_soc_write(codec, RT5640_DEPOP_M1, 0x0004);
1839 snd_soc_write(codec, RT5640_DEPOP_M2, 0x1100);
1840 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x1, 0);
1841 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
1842 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
1843 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
1844 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
1845 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
1846 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
1847 break;
1848
1849 default:
1850 break;
1851 }
1852 codec->dapm.bias_level = level;
1853
1854 return 0;
1855 }
1856
1857 static int rt5640_probe(struct snd_soc_codec *codec)
1858 {
1859 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1860 int ret;
1861
1862 rt5640->codec = codec;
1863 codec->control_data = rt5640->regmap;
1864
1865 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
1866 if (ret != 0) {
1867 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1868 return ret;
1869 }
1870
1871 codec->dapm.idle_bias_off = 1;
1872 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
1873
1874 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x0301, 0x0301);
1875 snd_soc_update_bits(codec, RT5640_DEPOP_M1, 0x001d, 0x0019);
1876 snd_soc_update_bits(codec, RT5640_DEPOP_M2, 0x2000, 0x2000);
1877 snd_soc_update_bits(codec, RT5640_MICBIAS, 0x0030, 0x0030);
1878 snd_soc_update_bits(codec, RT5640_DSP_PATH2, 0xfc00, 0x0c00);
1879
1880 return 0;
1881 }
1882
1883 static int rt5640_remove(struct snd_soc_codec *codec)
1884 {
1885 rt5640_reset(codec);
1886
1887 return 0;
1888 }
1889
1890 #ifdef CONFIG_PM
1891 static int rt5640_suspend(struct snd_soc_codec *codec)
1892 {
1893 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1894
1895 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
1896 rt5640_reset(codec);
1897 regcache_cache_only(rt5640->regmap, true);
1898 regcache_mark_dirty(rt5640->regmap);
1899
1900 return 0;
1901 }
1902
1903 static int rt5640_resume(struct snd_soc_codec *codec)
1904 {
1905 rt5640_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1906
1907 return 0;
1908 }
1909 #else
1910 #define rt5640_suspend NULL
1911 #define rt5640_resume NULL
1912 #endif
1913
1914 #define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
1915 #define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1916 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1917
1918 static const struct snd_soc_dai_ops rt5640_aif_dai_ops = {
1919 .hw_params = rt5640_hw_params,
1920 .set_fmt = rt5640_set_dai_fmt,
1921 .set_sysclk = rt5640_set_dai_sysclk,
1922 .set_pll = rt5640_set_dai_pll,
1923 };
1924
1925 static struct snd_soc_dai_driver rt5640_dai[] = {
1926 {
1927 .name = "rt5640-aif1",
1928 .id = RT5640_AIF1,
1929 .playback = {
1930 .stream_name = "AIF1 Playback",
1931 .channels_min = 1,
1932 .channels_max = 2,
1933 .rates = RT5640_STEREO_RATES,
1934 .formats = RT5640_FORMATS,
1935 },
1936 .capture = {
1937 .stream_name = "AIF1 Capture",
1938 .channels_min = 1,
1939 .channels_max = 2,
1940 .rates = RT5640_STEREO_RATES,
1941 .formats = RT5640_FORMATS,
1942 },
1943 .ops = &rt5640_aif_dai_ops,
1944 },
1945 {
1946 .name = "rt5640-aif2",
1947 .id = RT5640_AIF2,
1948 .playback = {
1949 .stream_name = "AIF2 Playback",
1950 .channels_min = 1,
1951 .channels_max = 2,
1952 .rates = RT5640_STEREO_RATES,
1953 .formats = RT5640_FORMATS,
1954 },
1955 .capture = {
1956 .stream_name = "AIF2 Capture",
1957 .channels_min = 1,
1958 .channels_max = 2,
1959 .rates = RT5640_STEREO_RATES,
1960 .formats = RT5640_FORMATS,
1961 },
1962 .ops = &rt5640_aif_dai_ops,
1963 },
1964 };
1965
1966 static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
1967 .probe = rt5640_probe,
1968 .remove = rt5640_remove,
1969 .suspend = rt5640_suspend,
1970 .resume = rt5640_resume,
1971 .set_bias_level = rt5640_set_bias_level,
1972 .controls = rt5640_snd_controls,
1973 .num_controls = ARRAY_SIZE(rt5640_snd_controls),
1974 .dapm_widgets = rt5640_dapm_widgets,
1975 .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
1976 .dapm_routes = rt5640_dapm_routes,
1977 .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
1978 };
1979
1980 static const struct regmap_config rt5640_regmap = {
1981 .reg_bits = 8,
1982 .val_bits = 16,
1983
1984 .max_register = RT5640_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5640_ranges) *
1985 RT5640_PR_SPACING),
1986 .volatile_reg = rt5640_volatile_register,
1987 .readable_reg = rt5640_readable_register,
1988
1989 .cache_type = REGCACHE_RBTREE,
1990 .reg_defaults = rt5640_reg,
1991 .num_reg_defaults = ARRAY_SIZE(rt5640_reg),
1992 .ranges = rt5640_ranges,
1993 .num_ranges = ARRAY_SIZE(rt5640_ranges),
1994 };
1995
1996 static const struct i2c_device_id rt5640_i2c_id[] = {
1997 { "rt5640", 0 },
1998 { }
1999 };
2000 MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2001
2002 static int rt5640_parse_dt(struct rt5640_priv *rt5640, struct device_node *np)
2003 {
2004 rt5640->pdata.in1_diff = of_property_read_bool(np,
2005 "realtek,in1-differential");
2006 rt5640->pdata.in2_diff = of_property_read_bool(np,
2007 "realtek,in2-differential");
2008
2009 rt5640->pdata.ldo1_en = of_get_named_gpio(np,
2010 "realtek,ldo1-en-gpios", 0);
2011 /*
2012 * LDO1_EN is optional (it may be statically tied on the board).
2013 * -ENOENT means that the property doesn't exist, i.e. there is no
2014 * GPIO, so is not an error. Any other error code means the property
2015 * exists, but could not be parsed.
2016 */
2017 if (!gpio_is_valid(rt5640->pdata.ldo1_en) &&
2018 (rt5640->pdata.ldo1_en != -ENOENT))
2019 return rt5640->pdata.ldo1_en;
2020
2021 return 0;
2022 }
2023
2024 static int rt5640_i2c_probe(struct i2c_client *i2c,
2025 const struct i2c_device_id *id)
2026 {
2027 struct rt5640_platform_data *pdata = dev_get_platdata(&i2c->dev);
2028 struct rt5640_priv *rt5640;
2029 int ret;
2030 unsigned int val;
2031
2032 rt5640 = devm_kzalloc(&i2c->dev,
2033 sizeof(struct rt5640_priv),
2034 GFP_KERNEL);
2035 if (NULL == rt5640)
2036 return -ENOMEM;
2037 i2c_set_clientdata(i2c, rt5640);
2038
2039 if (pdata) {
2040 rt5640->pdata = *pdata;
2041 /*
2042 * Translate zero'd out (default) pdata value to an invalid
2043 * GPIO ID. This makes the pdata and DT paths consistent in
2044 * terms of the value left in this field when no GPIO is
2045 * specified, but means we can't actually use GPIO 0.
2046 */
2047 if (!rt5640->pdata.ldo1_en)
2048 rt5640->pdata.ldo1_en = -EINVAL;
2049 } else if (i2c->dev.of_node) {
2050 ret = rt5640_parse_dt(rt5640, i2c->dev.of_node);
2051 if (ret)
2052 return ret;
2053 } else
2054 rt5640->pdata.ldo1_en = -EINVAL;
2055
2056 rt5640->regmap = devm_regmap_init_i2c(i2c, &rt5640_regmap);
2057 if (IS_ERR(rt5640->regmap)) {
2058 ret = PTR_ERR(rt5640->regmap);
2059 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2060 ret);
2061 return ret;
2062 }
2063
2064 if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
2065 ret = devm_gpio_request_one(&i2c->dev, rt5640->pdata.ldo1_en,
2066 GPIOF_OUT_INIT_HIGH,
2067 "RT5640 LDO1_EN");
2068 if (ret < 0) {
2069 dev_err(&i2c->dev, "Failed to request LDO1_EN %d: %d\n",
2070 rt5640->pdata.ldo1_en, ret);
2071 return ret;
2072 }
2073 msleep(400);
2074 }
2075
2076 regmap_read(rt5640->regmap, RT5640_VENDOR_ID2, &val);
2077 if ((val != RT5640_DEVICE_ID)) {
2078 dev_err(&i2c->dev,
2079 "Device with ID register %x is not rt5640/39\n", val);
2080 return -ENODEV;
2081 }
2082
2083 regmap_write(rt5640->regmap, RT5640_RESET, 0);
2084
2085 ret = regmap_register_patch(rt5640->regmap, init_list,
2086 ARRAY_SIZE(init_list));
2087 if (ret != 0)
2088 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2089
2090 if (rt5640->pdata.in1_diff)
2091 regmap_update_bits(rt5640->regmap, RT5640_IN1_IN2,
2092 RT5640_IN_DF1, RT5640_IN_DF1);
2093
2094 if (rt5640->pdata.in2_diff)
2095 regmap_update_bits(rt5640->regmap, RT5640_IN3_IN4,
2096 RT5640_IN_DF2, RT5640_IN_DF2);
2097
2098 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2099 rt5640_dai, ARRAY_SIZE(rt5640_dai));
2100 if (ret < 0)
2101 goto err;
2102
2103 return 0;
2104 err:
2105 return ret;
2106 }
2107
2108 static int rt5640_i2c_remove(struct i2c_client *i2c)
2109 {
2110 snd_soc_unregister_codec(&i2c->dev);
2111
2112 return 0;
2113 }
2114
2115 static struct i2c_driver rt5640_i2c_driver = {
2116 .driver = {
2117 .name = "rt5640",
2118 .owner = THIS_MODULE,
2119 },
2120 .probe = rt5640_i2c_probe,
2121 .remove = rt5640_i2c_remove,
2122 .id_table = rt5640_i2c_id,
2123 };
2124 module_i2c_driver(rt5640_i2c_driver);
2125
2126 MODULE_DESCRIPTION("ASoC RT5640 driver");
2127 MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2128 MODULE_LICENSE("GPL v2");
Linux with added FPC-III support