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mtd: add ECC info for nand_flash_dev{}
[linux/fpc-iii.git] / sound / soc / codecs / sn95031.c
blobdba26e63844ef901073531bcdb26b1e084bf0a3b
1 /*
2 * sn95031.c - TI sn95031 Codec driver
3 *
4 * Copyright (C) 2010 Intel Corp
5 * Author: Vinod Koul <vinod.koul@intel.com>
6 * Author: Harsha Priya <priya.harsha@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21 *
22 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
23 *
24 *
25 */
26 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27
28 #include <linux/platform_device.h>
29 #include <linux/delay.h>
30 #include <linux/slab.h>
31 #include <linux/module.h>
32
33 #include <asm/intel_scu_ipc.h>
34 #include <sound/pcm.h>
35 #include <sound/pcm_params.h>
36 #include <sound/soc.h>
37 #include <sound/soc-dapm.h>
38 #include <sound/initval.h>
39 #include <sound/tlv.h>
40 #include <sound/jack.h>
41 #include "sn95031.h"
42
43 #define SN95031_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100)
44 #define SN95031_FORMATS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
45
46 /* adc helper functions */
47
48 /* enables mic bias voltage */
49 static void sn95031_enable_mic_bias(struct snd_soc_codec *codec)
50 {
51 snd_soc_write(codec, SN95031_VAUD, BIT(2)|BIT(1)|BIT(0));
52 snd_soc_update_bits(codec, SN95031_MICBIAS, BIT(2), BIT(2));
53 }
54
55 /* Enable/Disable the ADC depending on the argument */
56 static void configure_adc(struct snd_soc_codec *sn95031_codec, int val)
57 {
58 int value = snd_soc_read(sn95031_codec, SN95031_ADC1CNTL1);
59
60 if (val) {
61 /* Enable and start the ADC */
62 value |= (SN95031_ADC_ENBL | SN95031_ADC_START);
63 value &= (~SN95031_ADC_NO_LOOP);
64 } else {
65 /* Just stop the ADC */
66 value &= (~SN95031_ADC_START);
67 }
68 snd_soc_write(sn95031_codec, SN95031_ADC1CNTL1, value);
69 }
70
71 /*
72 * finds an empty channel for conversion
73 * If the ADC is not enabled then start using 0th channel
74 * itself. Otherwise find an empty channel by looking for a
75 * channel in which the stopbit is set to 1. returns the index
76 * of the first free channel if succeeds or an error code.
77 *
78 * Context: can sleep
79 *
80 */
81 static int find_free_channel(struct snd_soc_codec *sn95031_codec)
82 {
83 int i, value;
84
85 /* check whether ADC is enabled */
86 value = snd_soc_read(sn95031_codec, SN95031_ADC1CNTL1);
87
88 if ((value & SN95031_ADC_ENBL) == 0)
89 return 0;
90
91 /* ADC is already enabled; Looking for an empty channel */
92 for (i = 0; i < SN95031_ADC_CHANLS_MAX; i++) {
93 value = snd_soc_read(sn95031_codec,
94 SN95031_ADC_CHNL_START_ADDR + i);
95 if (value & SN95031_STOPBIT_MASK)
96 break;
97 }
98 return (i == SN95031_ADC_CHANLS_MAX) ? (-EINVAL) : i;
99 }
100
101 /* Initialize the ADC for reading micbias values. Can sleep. */
102 static int sn95031_initialize_adc(struct snd_soc_codec *sn95031_codec)
103 {
104 int base_addr, chnl_addr;
105 int value;
106 int channel_index;
107
108 /* Index of the first channel in which the stop bit is set */
109 channel_index = find_free_channel(sn95031_codec);
110 if (channel_index < 0) {
111 pr_err("No free ADC channels");
112 return channel_index;
113 }
114
115 base_addr = SN95031_ADC_CHNL_START_ADDR + channel_index;
116
117 if (!(channel_index == 0 || channel_index == SN95031_ADC_LOOP_MAX)) {
118 /* Reset stop bit for channels other than 0 and 12 */
119 value = snd_soc_read(sn95031_codec, base_addr);
120 /* Set the stop bit to zero */
121 snd_soc_write(sn95031_codec, base_addr, value & 0xEF);
122 /* Index of the first free channel */
123 base_addr++;
124 channel_index++;
125 }
126
127 /* Since this is the last channel, set the stop bit
128 to 1 by ORing the DIE_SENSOR_CODE with 0x10 */
129 snd_soc_write(sn95031_codec, base_addr,
130 SN95031_AUDIO_DETECT_CODE | 0x10);
131
132 chnl_addr = SN95031_ADC_DATA_START_ADDR + 2 * channel_index;
133 pr_debug("mid_initialize : %x", chnl_addr);
134 configure_adc(sn95031_codec, 1);
135 return chnl_addr;
136 }
137
138
139 /* reads the ADC registers and gets the mic bias value in mV. */
140 static unsigned int sn95031_get_mic_bias(struct snd_soc_codec *codec)
141 {
142 u16 adc_adr = sn95031_initialize_adc(codec);
143 u16 adc_val1, adc_val2;
144 unsigned int mic_bias;
145
146 sn95031_enable_mic_bias(codec);
147
148 /* Enable the sound card for conversion before reading */
149 snd_soc_write(codec, SN95031_ADC1CNTL3, 0x05);
150 /* Re-toggle the RRDATARD bit */
151 snd_soc_write(codec, SN95031_ADC1CNTL3, 0x04);
152
153 /* Read the higher bits of data */
154 msleep(1000);
155 adc_val1 = snd_soc_read(codec, adc_adr);
156 adc_adr++;
157 adc_val2 = snd_soc_read(codec, adc_adr);
158
159 /* Adding lower two bits to the higher bits */
160 mic_bias = (adc_val1 << 2) + (adc_val2 & 3);
161 mic_bias = (mic_bias * SN95031_ADC_ONE_LSB_MULTIPLIER) / 1000;
162 pr_debug("mic bias = %dmV\n", mic_bias);
163 return mic_bias;
164 }
165 /*end - adc helper functions */
166
167 static inline unsigned int sn95031_read(struct snd_soc_codec *codec,
168 unsigned int reg)
169 {
170 u8 value = 0;
171 int ret;
172
173 ret = intel_scu_ipc_ioread8(reg, &value);
174 if (ret)
175 pr_err("read of %x failed, err %d\n", reg, ret);
176 return value;
177
178 }
179
180 static inline int sn95031_write(struct snd_soc_codec *codec,
181 unsigned int reg, unsigned int value)
182 {
183 int ret;
184
185 ret = intel_scu_ipc_iowrite8(reg, value);
186 if (ret)
187 pr_err("write of %x failed, err %d\n", reg, ret);
188 return ret;
189 }
190
191 static int sn95031_set_vaud_bias(struct snd_soc_codec *codec,
192 enum snd_soc_bias_level level)
193 {
194 switch (level) {
195 case SND_SOC_BIAS_ON:
196 break;
197
198 case SND_SOC_BIAS_PREPARE:
199 if (codec->dapm.bias_level == SND_SOC_BIAS_STANDBY) {
200 pr_debug("vaud_bias powering up pll\n");
201 /* power up the pll */
202 snd_soc_write(codec, SN95031_AUDPLLCTRL, BIT(5));
203 /* enable pcm 2 */
204 snd_soc_update_bits(codec, SN95031_PCM2C2,
205 BIT(0), BIT(0));
206 }
207 break;
208
209 case SND_SOC_BIAS_STANDBY:
210 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
211 pr_debug("vaud_bias power up rail\n");
212 /* power up the rail */
213 snd_soc_write(codec, SN95031_VAUD,
214 BIT(2)|BIT(1)|BIT(0));
215 msleep(1);
216 } else if (codec->dapm.bias_level == SND_SOC_BIAS_PREPARE) {
217 /* turn off pcm */
218 pr_debug("vaud_bias power dn pcm\n");
219 snd_soc_update_bits(codec, SN95031_PCM2C2, BIT(0), 0);
220 snd_soc_write(codec, SN95031_AUDPLLCTRL, 0);
221 }
222 break;
223
224
225 case SND_SOC_BIAS_OFF:
226 pr_debug("vaud_bias _OFF doing rail shutdown\n");
227 snd_soc_write(codec, SN95031_VAUD, BIT(3));
228 break;
229 }
230
231 codec->dapm.bias_level = level;
232 return 0;
233 }
234
235 static int sn95031_vhs_event(struct snd_soc_dapm_widget *w,
236 struct snd_kcontrol *kcontrol, int event)
237 {
238 if (SND_SOC_DAPM_EVENT_ON(event)) {
239 pr_debug("VHS SND_SOC_DAPM_EVENT_ON doing rail startup now\n");
240 /* power up the rail */
241 snd_soc_write(w->codec, SN95031_VHSP, 0x3D);
242 snd_soc_write(w->codec, SN95031_VHSN, 0x3F);
243 msleep(1);
244 } else if (SND_SOC_DAPM_EVENT_OFF(event)) {
245 pr_debug("VHS SND_SOC_DAPM_EVENT_OFF doing rail shutdown\n");
246 snd_soc_write(w->codec, SN95031_VHSP, 0xC4);
247 snd_soc_write(w->codec, SN95031_VHSN, 0x04);
248 }
249 return 0;
250 }
251
252 static int sn95031_vihf_event(struct snd_soc_dapm_widget *w,
253 struct snd_kcontrol *kcontrol, int event)
254 {
255 if (SND_SOC_DAPM_EVENT_ON(event)) {
256 pr_debug("VIHF SND_SOC_DAPM_EVENT_ON doing rail startup now\n");
257 /* power up the rail */
258 snd_soc_write(w->codec, SN95031_VIHF, 0x27);
259 msleep(1);
260 } else if (SND_SOC_DAPM_EVENT_OFF(event)) {
261 pr_debug("VIHF SND_SOC_DAPM_EVENT_OFF doing rail shutdown\n");
262 snd_soc_write(w->codec, SN95031_VIHF, 0x24);
263 }
264 return 0;
265 }
266
267 static int sn95031_dmic12_event(struct snd_soc_dapm_widget *w,
268 struct snd_kcontrol *k, int event)
269 {
270 unsigned int ldo = 0, clk_dir = 0, data_dir = 0;
271
272 if (SND_SOC_DAPM_EVENT_ON(event)) {
273 ldo = BIT(5)|BIT(4);
274 clk_dir = BIT(0);
275 data_dir = BIT(7);
276 }
277 /* program DMIC LDO, clock and set clock */
278 snd_soc_update_bits(w->codec, SN95031_MICBIAS, BIT(5)|BIT(4), ldo);
279 snd_soc_update_bits(w->codec, SN95031_DMICBUF0123, BIT(0), clk_dir);
280 snd_soc_update_bits(w->codec, SN95031_DMICBUF0123, BIT(7), data_dir);
281 return 0;
282 }
283
284 static int sn95031_dmic34_event(struct snd_soc_dapm_widget *w,
285 struct snd_kcontrol *k, int event)
286 {
287 unsigned int ldo = 0, clk_dir = 0, data_dir = 0;
288
289 if (SND_SOC_DAPM_EVENT_ON(event)) {
290 ldo = BIT(5)|BIT(4);
291 clk_dir = BIT(2);
292 data_dir = BIT(1);
293 }
294 /* program DMIC LDO, clock and set clock */
295 snd_soc_update_bits(w->codec, SN95031_MICBIAS, BIT(5)|BIT(4), ldo);
296 snd_soc_update_bits(w->codec, SN95031_DMICBUF0123, BIT(2), clk_dir);
297 snd_soc_update_bits(w->codec, SN95031_DMICBUF45, BIT(1), data_dir);
298 return 0;
299 }
300
301 static int sn95031_dmic56_event(struct snd_soc_dapm_widget *w,
302 struct snd_kcontrol *k, int event)
303 {
304 unsigned int ldo = 0;
305
306 if (SND_SOC_DAPM_EVENT_ON(event))
307 ldo = BIT(7)|BIT(6);
308
309 /* program DMIC LDO */
310 snd_soc_update_bits(w->codec, SN95031_MICBIAS, BIT(7)|BIT(6), ldo);
311 return 0;
312 }
313
314 /* mux controls */
315 static const char *sn95031_mic_texts[] = { "AMIC", "LineIn" };
316
317 static const struct soc_enum sn95031_micl_enum =
318 SOC_ENUM_SINGLE(SN95031_ADCCONFIG, 1, 2, sn95031_mic_texts);
319
320 static const struct snd_kcontrol_new sn95031_micl_mux_control =
321 SOC_DAPM_ENUM("Route", sn95031_micl_enum);
322
323 static const struct soc_enum sn95031_micr_enum =
324 SOC_ENUM_SINGLE(SN95031_ADCCONFIG, 3, 2, sn95031_mic_texts);
325
326 static const struct snd_kcontrol_new sn95031_micr_mux_control =
327 SOC_DAPM_ENUM("Route", sn95031_micr_enum);
328
329 static const char *sn95031_input_texts[] = { "DMIC1", "DMIC2", "DMIC3",
330 "DMIC4", "DMIC5", "DMIC6",
331 "ADC Left", "ADC Right" };
332
333 static const struct soc_enum sn95031_input1_enum =
334 SOC_ENUM_SINGLE(SN95031_AUDIOMUX12, 0, 8, sn95031_input_texts);
335
336 static const struct snd_kcontrol_new sn95031_input1_mux_control =
337 SOC_DAPM_ENUM("Route", sn95031_input1_enum);
338
339 static const struct soc_enum sn95031_input2_enum =
340 SOC_ENUM_SINGLE(SN95031_AUDIOMUX12, 4, 8, sn95031_input_texts);
341
342 static const struct snd_kcontrol_new sn95031_input2_mux_control =
343 SOC_DAPM_ENUM("Route", sn95031_input2_enum);
344
345 static const struct soc_enum sn95031_input3_enum =
346 SOC_ENUM_SINGLE(SN95031_AUDIOMUX34, 0, 8, sn95031_input_texts);
347
348 static const struct snd_kcontrol_new sn95031_input3_mux_control =
349 SOC_DAPM_ENUM("Route", sn95031_input3_enum);
350
351 static const struct soc_enum sn95031_input4_enum =
352 SOC_ENUM_SINGLE(SN95031_AUDIOMUX34, 4, 8, sn95031_input_texts);
353
354 static const struct snd_kcontrol_new sn95031_input4_mux_control =
355 SOC_DAPM_ENUM("Route", sn95031_input4_enum);
356
357 /* capture path controls */
358
359 static const char *sn95031_micmode_text[] = {"Single Ended", "Differential"};
360
361 /* 0dB to 30dB in 10dB steps */
362 static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 10, 0);
363
364 static const struct soc_enum sn95031_micmode1_enum =
365 SOC_ENUM_SINGLE(SN95031_MICAMP1, 1, 2, sn95031_micmode_text);
366 static const struct soc_enum sn95031_micmode2_enum =
367 SOC_ENUM_SINGLE(SN95031_MICAMP2, 1, 2, sn95031_micmode_text);
368
369 static const char *sn95031_dmic_cfg_text[] = {"GPO", "DMIC"};
370
371 static const struct soc_enum sn95031_dmic12_cfg_enum =
372 SOC_ENUM_SINGLE(SN95031_DMICMUX, 0, 2, sn95031_dmic_cfg_text);
373 static const struct soc_enum sn95031_dmic34_cfg_enum =
374 SOC_ENUM_SINGLE(SN95031_DMICMUX, 1, 2, sn95031_dmic_cfg_text);
375 static const struct soc_enum sn95031_dmic56_cfg_enum =
376 SOC_ENUM_SINGLE(SN95031_DMICMUX, 2, 2, sn95031_dmic_cfg_text);
377
378 static const struct snd_kcontrol_new sn95031_snd_controls[] = {
379 SOC_ENUM("Mic1Mode Capture Route", sn95031_micmode1_enum),
380 SOC_ENUM("Mic2Mode Capture Route", sn95031_micmode2_enum),
381 SOC_ENUM("DMIC12 Capture Route", sn95031_dmic12_cfg_enum),
382 SOC_ENUM("DMIC34 Capture Route", sn95031_dmic34_cfg_enum),
383 SOC_ENUM("DMIC56 Capture Route", sn95031_dmic56_cfg_enum),
384 SOC_SINGLE_TLV("Mic1 Capture Volume", SN95031_MICAMP1,
385 2, 4, 0, mic_tlv),
386 SOC_SINGLE_TLV("Mic2 Capture Volume", SN95031_MICAMP2,
387 2, 4, 0, mic_tlv),
388 };
389
390 /* DAPM widgets */
391 static const struct snd_soc_dapm_widget sn95031_dapm_widgets[] = {
392
393 /* all end points mic, hs etc */
394 SND_SOC_DAPM_OUTPUT("HPOUTL"),
395 SND_SOC_DAPM_OUTPUT("HPOUTR"),
396 SND_SOC_DAPM_OUTPUT("EPOUT"),
397 SND_SOC_DAPM_OUTPUT("IHFOUTL"),
398 SND_SOC_DAPM_OUTPUT("IHFOUTR"),
399 SND_SOC_DAPM_OUTPUT("LINEOUTL"),
400 SND_SOC_DAPM_OUTPUT("LINEOUTR"),
401 SND_SOC_DAPM_OUTPUT("VIB1OUT"),
402 SND_SOC_DAPM_OUTPUT("VIB2OUT"),
403
404 SND_SOC_DAPM_INPUT("AMIC1"), /* headset mic */
405 SND_SOC_DAPM_INPUT("AMIC2"),
406 SND_SOC_DAPM_INPUT("DMIC1"),
407 SND_SOC_DAPM_INPUT("DMIC2"),
408 SND_SOC_DAPM_INPUT("DMIC3"),
409 SND_SOC_DAPM_INPUT("DMIC4"),
410 SND_SOC_DAPM_INPUT("DMIC5"),
411 SND_SOC_DAPM_INPUT("DMIC6"),
412 SND_SOC_DAPM_INPUT("LINEINL"),
413 SND_SOC_DAPM_INPUT("LINEINR"),
414
415 SND_SOC_DAPM_MICBIAS("AMIC1Bias", SN95031_MICBIAS, 2, 0),
416 SND_SOC_DAPM_MICBIAS("AMIC2Bias", SN95031_MICBIAS, 3, 0),
417 SND_SOC_DAPM_MICBIAS("DMIC12Bias", SN95031_DMICMUX, 3, 0),
418 SND_SOC_DAPM_MICBIAS("DMIC34Bias", SN95031_DMICMUX, 4, 0),
419 SND_SOC_DAPM_MICBIAS("DMIC56Bias", SN95031_DMICMUX, 5, 0),
420
421 SND_SOC_DAPM_SUPPLY("DMIC12supply", SN95031_DMICLK, 0, 0,
422 sn95031_dmic12_event,
423 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
424 SND_SOC_DAPM_SUPPLY("DMIC34supply", SN95031_DMICLK, 1, 0,
425 sn95031_dmic34_event,
426 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
427 SND_SOC_DAPM_SUPPLY("DMIC56supply", SN95031_DMICLK, 2, 0,
428 sn95031_dmic56_event,
429 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
430
431 SND_SOC_DAPM_AIF_OUT("PCM_Out", "Capture", 0,
432 SND_SOC_NOPM, 0, 0),
433
434 SND_SOC_DAPM_SUPPLY("Headset Rail", SND_SOC_NOPM, 0, 0,
435 sn95031_vhs_event,
436 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
437 SND_SOC_DAPM_SUPPLY("Speaker Rail", SND_SOC_NOPM, 0, 0,
438 sn95031_vihf_event,
439 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
440
441 /* playback path driver enables */
442 SND_SOC_DAPM_PGA("Headset Left Playback",
443 SN95031_DRIVEREN, 0, 0, NULL, 0),
444 SND_SOC_DAPM_PGA("Headset Right Playback",
445 SN95031_DRIVEREN, 1, 0, NULL, 0),
446 SND_SOC_DAPM_PGA("Speaker Left Playback",
447 SN95031_DRIVEREN, 2, 0, NULL, 0),
448 SND_SOC_DAPM_PGA("Speaker Right Playback",
449 SN95031_DRIVEREN, 3, 0, NULL, 0),
450 SND_SOC_DAPM_PGA("Vibra1 Playback",
451 SN95031_DRIVEREN, 4, 0, NULL, 0),
452 SND_SOC_DAPM_PGA("Vibra2 Playback",
453 SN95031_DRIVEREN, 5, 0, NULL, 0),
454 SND_SOC_DAPM_PGA("Earpiece Playback",
455 SN95031_DRIVEREN, 6, 0, NULL, 0),
456 SND_SOC_DAPM_PGA("Lineout Left Playback",
457 SN95031_LOCTL, 0, 0, NULL, 0),
458 SND_SOC_DAPM_PGA("Lineout Right Playback",
459 SN95031_LOCTL, 4, 0, NULL, 0),
460
461 /* playback path filter enable */
462 SND_SOC_DAPM_PGA("Headset Left Filter",
463 SN95031_HSEPRXCTRL, 4, 0, NULL, 0),
464 SND_SOC_DAPM_PGA("Headset Right Filter",
465 SN95031_HSEPRXCTRL, 5, 0, NULL, 0),
466 SND_SOC_DAPM_PGA("Speaker Left Filter",
467 SN95031_IHFRXCTRL, 0, 0, NULL, 0),
468 SND_SOC_DAPM_PGA("Speaker Right Filter",
469 SN95031_IHFRXCTRL, 1, 0, NULL, 0),
470
471 /* DACs */
472 SND_SOC_DAPM_DAC("HSDAC Left", "Headset",
473 SN95031_DACCONFIG, 0, 0),
474 SND_SOC_DAPM_DAC("HSDAC Right", "Headset",
475 SN95031_DACCONFIG, 1, 0),
476 SND_SOC_DAPM_DAC("IHFDAC Left", "Speaker",
477 SN95031_DACCONFIG, 2, 0),
478 SND_SOC_DAPM_DAC("IHFDAC Right", "Speaker",
479 SN95031_DACCONFIG, 3, 0),
480 SND_SOC_DAPM_DAC("Vibra1 DAC", "Vibra1",
481 SN95031_VIB1C5, 1, 0),
482 SND_SOC_DAPM_DAC("Vibra2 DAC", "Vibra2",
483 SN95031_VIB2C5, 1, 0),
484
485 /* capture widgets */
486 SND_SOC_DAPM_PGA("LineIn Enable Left", SN95031_MICAMP1,
487 7, 0, NULL, 0),
488 SND_SOC_DAPM_PGA("LineIn Enable Right", SN95031_MICAMP2,
489 7, 0, NULL, 0),
490
491 SND_SOC_DAPM_PGA("MIC1 Enable", SN95031_MICAMP1, 0, 0, NULL, 0),
492 SND_SOC_DAPM_PGA("MIC2 Enable", SN95031_MICAMP2, 0, 0, NULL, 0),
493 SND_SOC_DAPM_PGA("TX1 Enable", SN95031_AUDIOTXEN, 2, 0, NULL, 0),
494 SND_SOC_DAPM_PGA("TX2 Enable", SN95031_AUDIOTXEN, 3, 0, NULL, 0),
495 SND_SOC_DAPM_PGA("TX3 Enable", SN95031_AUDIOTXEN, 4, 0, NULL, 0),
496 SND_SOC_DAPM_PGA("TX4 Enable", SN95031_AUDIOTXEN, 5, 0, NULL, 0),
497
498 /* ADC have null stream as they will be turned ON by TX path */
499 SND_SOC_DAPM_ADC("ADC Left", NULL,
500 SN95031_ADCCONFIG, 0, 0),
501 SND_SOC_DAPM_ADC("ADC Right", NULL,
502 SN95031_ADCCONFIG, 2, 0),
503
504 SND_SOC_DAPM_MUX("Mic_InputL Capture Route",
505 SND_SOC_NOPM, 0, 0, &sn95031_micl_mux_control),
506 SND_SOC_DAPM_MUX("Mic_InputR Capture Route",
507 SND_SOC_NOPM, 0, 0, &sn95031_micr_mux_control),
508
509 SND_SOC_DAPM_MUX("Txpath1 Capture Route",
510 SND_SOC_NOPM, 0, 0, &sn95031_input1_mux_control),
511 SND_SOC_DAPM_MUX("Txpath2 Capture Route",
512 SND_SOC_NOPM, 0, 0, &sn95031_input2_mux_control),
513 SND_SOC_DAPM_MUX("Txpath3 Capture Route",
514 SND_SOC_NOPM, 0, 0, &sn95031_input3_mux_control),
515 SND_SOC_DAPM_MUX("Txpath4 Capture Route",
516 SND_SOC_NOPM, 0, 0, &sn95031_input4_mux_control),
517
518 };
519
520 static const struct snd_soc_dapm_route sn95031_audio_map[] = {
521 /* headset and earpiece map */
522 { "HPOUTL", NULL, "Headset Rail"},
523 { "HPOUTR", NULL, "Headset Rail"},
524 { "HPOUTL", NULL, "Headset Left Playback" },
525 { "HPOUTR", NULL, "Headset Right Playback" },
526 { "EPOUT", NULL, "Earpiece Playback" },
527 { "Headset Left Playback", NULL, "Headset Left Filter"},
528 { "Headset Right Playback", NULL, "Headset Right Filter"},
529 { "Earpiece Playback", NULL, "Headset Left Filter"},
530 { "Headset Left Filter", NULL, "HSDAC Left"},
531 { "Headset Right Filter", NULL, "HSDAC Right"},
532
533 /* speaker map */
534 { "IHFOUTL", NULL, "Speaker Rail"},
535 { "IHFOUTR", NULL, "Speaker Rail"},
536 { "IHFOUTL", "NULL", "Speaker Left Playback"},
537 { "IHFOUTR", "NULL", "Speaker Right Playback"},
538 { "Speaker Left Playback", NULL, "Speaker Left Filter"},
539 { "Speaker Right Playback", NULL, "Speaker Right Filter"},
540 { "Speaker Left Filter", NULL, "IHFDAC Left"},
541 { "Speaker Right Filter", NULL, "IHFDAC Right"},
542
543 /* vibra map */
544 { "VIB1OUT", NULL, "Vibra1 Playback"},
545 { "Vibra1 Playback", NULL, "Vibra1 DAC"},
546
547 { "VIB2OUT", NULL, "Vibra2 Playback"},
548 { "Vibra2 Playback", NULL, "Vibra2 DAC"},
549
550 /* lineout */
551 { "LINEOUTL", NULL, "Lineout Left Playback"},
552 { "LINEOUTR", NULL, "Lineout Right Playback"},
553 { "Lineout Left Playback", NULL, "Headset Left Filter"},
554 { "Lineout Left Playback", NULL, "Speaker Left Filter"},
555 { "Lineout Left Playback", NULL, "Vibra1 DAC"},
556 { "Lineout Right Playback", NULL, "Headset Right Filter"},
557 { "Lineout Right Playback", NULL, "Speaker Right Filter"},
558 { "Lineout Right Playback", NULL, "Vibra2 DAC"},
559
560 /* Headset (AMIC1) mic */
561 { "AMIC1Bias", NULL, "AMIC1"},
562 { "MIC1 Enable", NULL, "AMIC1Bias"},
563 { "Mic_InputL Capture Route", "AMIC", "MIC1 Enable"},
564
565 /* AMIC2 */
566 { "AMIC2Bias", NULL, "AMIC2"},
567 { "MIC2 Enable", NULL, "AMIC2Bias"},
568 { "Mic_InputR Capture Route", "AMIC", "MIC2 Enable"},
569
570
571 /* Linein */
572 { "LineIn Enable Left", NULL, "LINEINL"},
573 { "LineIn Enable Right", NULL, "LINEINR"},
574 { "Mic_InputL Capture Route", "LineIn", "LineIn Enable Left"},
575 { "Mic_InputR Capture Route", "LineIn", "LineIn Enable Right"},
576
577 /* ADC connection */
578 { "ADC Left", NULL, "Mic_InputL Capture Route"},
579 { "ADC Right", NULL, "Mic_InputR Capture Route"},
580
581 /*DMIC connections */
582 { "DMIC1", NULL, "DMIC12supply"},
583 { "DMIC2", NULL, "DMIC12supply"},
584 { "DMIC3", NULL, "DMIC34supply"},
585 { "DMIC4", NULL, "DMIC34supply"},
586 { "DMIC5", NULL, "DMIC56supply"},
587 { "DMIC6", NULL, "DMIC56supply"},
588
589 { "DMIC12Bias", NULL, "DMIC1"},
590 { "DMIC12Bias", NULL, "DMIC2"},
591 { "DMIC34Bias", NULL, "DMIC3"},
592 { "DMIC34Bias", NULL, "DMIC4"},
593 { "DMIC56Bias", NULL, "DMIC5"},
594 { "DMIC56Bias", NULL, "DMIC6"},
595
596 /*TX path inputs*/
597 { "Txpath1 Capture Route", "ADC Left", "ADC Left"},
598 { "Txpath2 Capture Route", "ADC Left", "ADC Left"},
599 { "Txpath3 Capture Route", "ADC Left", "ADC Left"},
600 { "Txpath4 Capture Route", "ADC Left", "ADC Left"},
601 { "Txpath1 Capture Route", "ADC Right", "ADC Right"},
602 { "Txpath2 Capture Route", "ADC Right", "ADC Right"},
603 { "Txpath3 Capture Route", "ADC Right", "ADC Right"},
604 { "Txpath4 Capture Route", "ADC Right", "ADC Right"},
605 { "Txpath1 Capture Route", "DMIC1", "DMIC1"},
606 { "Txpath2 Capture Route", "DMIC1", "DMIC1"},
607 { "Txpath3 Capture Route", "DMIC1", "DMIC1"},
608 { "Txpath4 Capture Route", "DMIC1", "DMIC1"},
609 { "Txpath1 Capture Route", "DMIC2", "DMIC2"},
610 { "Txpath2 Capture Route", "DMIC2", "DMIC2"},
611 { "Txpath3 Capture Route", "DMIC2", "DMIC2"},
612 { "Txpath4 Capture Route", "DMIC2", "DMIC2"},
613 { "Txpath1 Capture Route", "DMIC3", "DMIC3"},
614 { "Txpath2 Capture Route", "DMIC3", "DMIC3"},
615 { "Txpath3 Capture Route", "DMIC3", "DMIC3"},
616 { "Txpath4 Capture Route", "DMIC3", "DMIC3"},
617 { "Txpath1 Capture Route", "DMIC4", "DMIC4"},
618 { "Txpath2 Capture Route", "DMIC4", "DMIC4"},
619 { "Txpath3 Capture Route", "DMIC4", "DMIC4"},
620 { "Txpath4 Capture Route", "DMIC4", "DMIC4"},
621 { "Txpath1 Capture Route", "DMIC5", "DMIC5"},
622 { "Txpath2 Capture Route", "DMIC5", "DMIC5"},
623 { "Txpath3 Capture Route", "DMIC5", "DMIC5"},
624 { "Txpath4 Capture Route", "DMIC5", "DMIC5"},
625 { "Txpath1 Capture Route", "DMIC6", "DMIC6"},
626 { "Txpath2 Capture Route", "DMIC6", "DMIC6"},
627 { "Txpath3 Capture Route", "DMIC6", "DMIC6"},
628 { "Txpath4 Capture Route", "DMIC6", "DMIC6"},
629
630 /* tx path */
631 { "TX1 Enable", NULL, "Txpath1 Capture Route"},
632 { "TX2 Enable", NULL, "Txpath2 Capture Route"},
633 { "TX3 Enable", NULL, "Txpath3 Capture Route"},
634 { "TX4 Enable", NULL, "Txpath4 Capture Route"},
635 { "PCM_Out", NULL, "TX1 Enable"},
636 { "PCM_Out", NULL, "TX2 Enable"},
637 { "PCM_Out", NULL, "TX3 Enable"},
638 { "PCM_Out", NULL, "TX4 Enable"},
639
640 };
641
642 /* speaker and headset mutes, for audio pops and clicks */
643 static int sn95031_pcm_hs_mute(struct snd_soc_dai *dai, int mute)
644 {
645 snd_soc_update_bits(dai->codec,
646 SN95031_HSLVOLCTRL, BIT(7), (!mute << 7));
647 snd_soc_update_bits(dai->codec,
648 SN95031_HSRVOLCTRL, BIT(7), (!mute << 7));
649 return 0;
650 }
651
652 static int sn95031_pcm_spkr_mute(struct snd_soc_dai *dai, int mute)
653 {
654 snd_soc_update_bits(dai->codec,
655 SN95031_IHFLVOLCTRL, BIT(7), (!mute << 7));
656 snd_soc_update_bits(dai->codec,
657 SN95031_IHFRVOLCTRL, BIT(7), (!mute << 7));
658 return 0;
659 }
660
661 static int sn95031_pcm_hw_params(struct snd_pcm_substream *substream,
662 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
663 {
664 unsigned int format, rate;
665
666 switch (params_format(params)) {
667 case SNDRV_PCM_FORMAT_S16_LE:
668 format = BIT(4)|BIT(5);
669 break;
670
671 case SNDRV_PCM_FORMAT_S24_LE:
672 format = 0;
673 break;
674 default:
675 return -EINVAL;
676 }
677 snd_soc_update_bits(dai->codec, SN95031_PCM2C2,
678 BIT(4)|BIT(5), format);
679
680 switch (params_rate(params)) {
681 case 48000:
682 pr_debug("RATE_48000\n");
683 rate = 0;
684 break;
685
686 case 44100:
687 pr_debug("RATE_44100\n");
688 rate = BIT(7);
689 break;
690
691 default:
692 pr_err("ERR rate %d\n", params_rate(params));
693 return -EINVAL;
694 }
695 snd_soc_update_bits(dai->codec, SN95031_PCM1C1, BIT(7), rate);
696
697 return 0;
698 }
699
700 /* Codec DAI section */
701 static const struct snd_soc_dai_ops sn95031_headset_dai_ops = {
702 .digital_mute = sn95031_pcm_hs_mute,
703 .hw_params = sn95031_pcm_hw_params,
704 };
705
706 static const struct snd_soc_dai_ops sn95031_speaker_dai_ops = {
707 .digital_mute = sn95031_pcm_spkr_mute,
708 .hw_params = sn95031_pcm_hw_params,
709 };
710
711 static const struct snd_soc_dai_ops sn95031_vib1_dai_ops = {
712 .hw_params = sn95031_pcm_hw_params,
713 };
714
715 static const struct snd_soc_dai_ops sn95031_vib2_dai_ops = {
716 .hw_params = sn95031_pcm_hw_params,
717 };
718
719 static struct snd_soc_dai_driver sn95031_dais[] = {
720 {
721 .name = "SN95031 Headset",
722 .playback = {
723 .stream_name = "Headset",
724 .channels_min = 2,
725 .channels_max = 2,
726 .rates = SN95031_RATES,
727 .formats = SN95031_FORMATS,
728 },
729 .capture = {
730 .stream_name = "Capture",
731 .channels_min = 1,
732 .channels_max = 5,
733 .rates = SN95031_RATES,
734 .formats = SN95031_FORMATS,
735 },
736 .ops = &sn95031_headset_dai_ops,
737 },
738 { .name = "SN95031 Speaker",
739 .playback = {
740 .stream_name = "Speaker",
741 .channels_min = 2,
742 .channels_max = 2,
743 .rates = SN95031_RATES,
744 .formats = SN95031_FORMATS,
745 },
746 .ops = &sn95031_speaker_dai_ops,
747 },
748 { .name = "SN95031 Vibra1",
749 .playback = {
750 .stream_name = "Vibra1",
751 .channels_min = 1,
752 .channels_max = 1,
753 .rates = SN95031_RATES,
754 .formats = SN95031_FORMATS,
755 },
756 .ops = &sn95031_vib1_dai_ops,
757 },
758 { .name = "SN95031 Vibra2",
759 .playback = {
760 .stream_name = "Vibra2",
761 .channels_min = 1,
762 .channels_max = 1,
763 .rates = SN95031_RATES,
764 .formats = SN95031_FORMATS,
765 },
766 .ops = &sn95031_vib2_dai_ops,
767 },
768 };
769
770 static inline void sn95031_disable_jack_btn(struct snd_soc_codec *codec)
771 {
772 snd_soc_write(codec, SN95031_BTNCTRL2, 0x00);
773 }
774
775 static inline void sn95031_enable_jack_btn(struct snd_soc_codec *codec)
776 {
777 snd_soc_write(codec, SN95031_BTNCTRL1, 0x77);
778 snd_soc_write(codec, SN95031_BTNCTRL2, 0x01);
779 }
780
781 static int sn95031_get_headset_state(struct snd_soc_jack *mfld_jack)
782 {
783 int micbias = sn95031_get_mic_bias(mfld_jack->codec);
784
785 int jack_type = snd_soc_jack_get_type(mfld_jack, micbias);
786
787 pr_debug("jack type detected = %d\n", jack_type);
788 if (jack_type == SND_JACK_HEADSET)
789 sn95031_enable_jack_btn(mfld_jack->codec);
790 return jack_type;
791 }
792
793 void sn95031_jack_detection(struct mfld_jack_data *jack_data)
794 {
795 unsigned int status;
796 unsigned int mask = SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_HEADSET;
797
798 pr_debug("interrupt id read in sram = 0x%x\n", jack_data->intr_id);
799 if (jack_data->intr_id & 0x1) {
800 pr_debug("short_push detected\n");
801 status = SND_JACK_HEADSET | SND_JACK_BTN_0;
802 } else if (jack_data->intr_id & 0x2) {
803 pr_debug("long_push detected\n");
804 status = SND_JACK_HEADSET | SND_JACK_BTN_1;
805 } else if (jack_data->intr_id & 0x4) {
806 pr_debug("headset or headphones inserted\n");
807 status = sn95031_get_headset_state(jack_data->mfld_jack);
808 } else if (jack_data->intr_id & 0x8) {
809 pr_debug("headset or headphones removed\n");
810 status = 0;
811 sn95031_disable_jack_btn(jack_data->mfld_jack->codec);
812 } else {
813 pr_err("unidentified interrupt\n");
814 return;
815 }
816
817 snd_soc_jack_report(jack_data->mfld_jack, status, mask);
818 /*button pressed and released so we send explicit button release */
819 if ((status & SND_JACK_BTN_0) | (status & SND_JACK_BTN_1))
820 snd_soc_jack_report(jack_data->mfld_jack,
821 SND_JACK_HEADSET, mask);
822 }
823 EXPORT_SYMBOL_GPL(sn95031_jack_detection);
824
825 /* codec registration */
826 static int sn95031_codec_probe(struct snd_soc_codec *codec)
827 {
828 pr_debug("codec_probe called\n");
829
830 /* PCM interface config
831 * This sets the pcm rx slot conguration to max 6 slots
832 * for max 4 dais (2 stereo and 2 mono)
833 */
834 snd_soc_write(codec, SN95031_PCM2RXSLOT01, 0x10);
835 snd_soc_write(codec, SN95031_PCM2RXSLOT23, 0x32);
836 snd_soc_write(codec, SN95031_PCM2RXSLOT45, 0x54);
837 snd_soc_write(codec, SN95031_PCM2TXSLOT01, 0x10);
838 snd_soc_write(codec, SN95031_PCM2TXSLOT23, 0x32);
839 /* pcm port setting
840 * This sets the pcm port to slave and clock at 19.2Mhz which
841 * can support 6slots, sampling rate set per stream in hw-params
842 */
843 snd_soc_write(codec, SN95031_PCM1C1, 0x00);
844 snd_soc_write(codec, SN95031_PCM2C1, 0x01);
845 snd_soc_write(codec, SN95031_PCM2C2, 0x0A);
846 snd_soc_write(codec, SN95031_HSMIXER, BIT(0)|BIT(4));
847 /* vendor vibra workround, the vibras are muted by
848 * custom register so unmute them
849 */
850 snd_soc_write(codec, SN95031_SSR5, 0x80);
851 snd_soc_write(codec, SN95031_SSR6, 0x80);
852 snd_soc_write(codec, SN95031_VIB1C5, 0x00);
853 snd_soc_write(codec, SN95031_VIB2C5, 0x00);
854 /* configure vibras for pcm port */
855 snd_soc_write(codec, SN95031_VIB1C3, 0x00);
856 snd_soc_write(codec, SN95031_VIB2C3, 0x00);
857
858 /* soft mute ramp time */
859 snd_soc_write(codec, SN95031_SOFTMUTE, 0x3);
860 /* fix the initial volume at 1dB,
861 * default in +9dB,
862 * 1dB give optimal swing on DAC, amps
863 */
864 snd_soc_write(codec, SN95031_HSLVOLCTRL, 0x08);
865 snd_soc_write(codec, SN95031_HSRVOLCTRL, 0x08);
866 snd_soc_write(codec, SN95031_IHFLVOLCTRL, 0x08);
867 snd_soc_write(codec, SN95031_IHFRVOLCTRL, 0x08);
868 /* dac mode and lineout workaround */
869 snd_soc_write(codec, SN95031_SSR2, 0x10);
870 snd_soc_write(codec, SN95031_SSR3, 0x40);
871
872 snd_soc_add_codec_controls(codec, sn95031_snd_controls,
873 ARRAY_SIZE(sn95031_snd_controls));
874
875 return 0;
876 }
877
878 static int sn95031_codec_remove(struct snd_soc_codec *codec)
879 {
880 pr_debug("codec_remove called\n");
881 sn95031_set_vaud_bias(codec, SND_SOC_BIAS_OFF);
882
883 return 0;
884 }
885
886 static struct snd_soc_codec_driver sn95031_codec = {
887 .probe = sn95031_codec_probe,
888 .remove = sn95031_codec_remove,
889 .read = sn95031_read,
890 .write = sn95031_write,
891 .set_bias_level = sn95031_set_vaud_bias,
892 .idle_bias_off = true,
893 .dapm_widgets = sn95031_dapm_widgets,
894 .num_dapm_widgets = ARRAY_SIZE(sn95031_dapm_widgets),
895 .dapm_routes = sn95031_audio_map,
896 .num_dapm_routes = ARRAY_SIZE(sn95031_audio_map),
897 };
898
899 static int sn95031_device_probe(struct platform_device *pdev)
900 {
901 pr_debug("codec device probe called for %s\n", dev_name(&pdev->dev));
902 return snd_soc_register_codec(&pdev->dev, &sn95031_codec,
903 sn95031_dais, ARRAY_SIZE(sn95031_dais));
904 }
905
906 static int sn95031_device_remove(struct platform_device *pdev)
907 {
908 pr_debug("codec device remove called\n");
909 snd_soc_unregister_codec(&pdev->dev);
910 return 0;
911 }
912
913 static struct platform_driver sn95031_codec_driver = {
914 .driver = {
915 .name = "sn95031",
916 .owner = THIS_MODULE,
917 },
918 .probe = sn95031_device_probe,
919 .remove = sn95031_device_remove,
920 };
921
922 module_platform_driver(sn95031_codec_driver);
923
924 MODULE_DESCRIPTION("ASoC TI SN95031 codec driver");
925 MODULE_AUTHOR("Vinod Koul <vinod.koul@intel.com>");
926 MODULE_AUTHOR("Harsha Priya <priya.harsha@intel.com>");
927 MODULE_LICENSE("GPL v2");
928 MODULE_ALIAS("platform:sn95031");
Linux with added FPC-III support