1 /* sun_esp.c: ESP front-end for Sparc SBUS systems.
3 * Copyright (C) 2007, 2008 David S. Miller (davem@davemloft.net)
6 #include <linux/kernel.h>
7 #include <linux/types.h>
8 #include <linux/delay.h>
9 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/dma-mapping.h>
14 #include <linux/of_device.h>
15 #include <linux/gfp.h>
21 #include <scsi/scsi_host.h>
25 #define DRV_MODULE_NAME "sun_esp"
26 #define PFX DRV_MODULE_NAME ": "
27 #define DRV_VERSION "1.100"
28 #define DRV_MODULE_RELDATE "August 27, 2008"
30 #define dma_read32(REG) \
31 sbus_readl(esp->dma_regs + (REG))
32 #define dma_write32(VAL, REG) \
33 sbus_writel((VAL), esp->dma_regs + (REG))
35 /* DVMA chip revisions */
46 static int esp_sbus_setup_dma(struct esp
*esp
, struct platform_device
*dma_of
)
50 esp
->dma_regs
= of_ioremap(&dma_of
->resource
[0], 0,
51 resource_size(&dma_of
->resource
[0]),
56 switch (dma_read32(DMA_CSR
) & DMA_DEVICE_ID
) {
58 esp
->dmarev
= dvmarev0
;
61 esp
->dmarev
= dvmaesc1
;
64 esp
->dmarev
= dvmarev1
;
67 esp
->dmarev
= dvmarev2
;
70 esp
->dmarev
= dvmahme
;
73 esp
->dmarev
= dvmarevplus
;
81 static int esp_sbus_map_regs(struct esp
*esp
, int hme
)
83 struct platform_device
*op
= to_platform_device(esp
->dev
);
86 /* On HME, two reg sets exist, first is DVMA,
87 * second is ESP registers.
90 res
= &op
->resource
[1];
92 res
= &op
->resource
[0];
94 esp
->regs
= of_ioremap(res
, 0, SBUS_ESP_REG_SIZE
, "ESP");
101 static int esp_sbus_map_command_block(struct esp
*esp
)
103 esp
->command_block
= dma_alloc_coherent(esp
->dev
, 16,
104 &esp
->command_block_dma
,
106 if (!esp
->command_block
)
111 static int esp_sbus_register_irq(struct esp
*esp
)
113 struct Scsi_Host
*host
= esp
->host
;
114 struct platform_device
*op
= to_platform_device(esp
->dev
);
116 host
->irq
= op
->archdata
.irqs
[0];
117 return request_irq(host
->irq
, scsi_esp_intr
, IRQF_SHARED
, "ESP", esp
);
120 static void esp_get_scsi_id(struct esp
*esp
, struct platform_device
*espdma
)
122 struct platform_device
*op
= to_platform_device(esp
->dev
);
123 struct device_node
*dp
;
125 dp
= op
->dev
.of_node
;
126 esp
->scsi_id
= of_getintprop_default(dp
, "initiator-id", 0xff);
127 if (esp
->scsi_id
!= 0xff)
130 esp
->scsi_id
= of_getintprop_default(dp
, "scsi-initiator-id", 0xff);
131 if (esp
->scsi_id
!= 0xff)
134 esp
->scsi_id
= of_getintprop_default(espdma
->dev
.of_node
,
135 "scsi-initiator-id", 7);
138 esp
->host
->this_id
= esp
->scsi_id
;
139 esp
->scsi_id_mask
= (1 << esp
->scsi_id
);
142 static void esp_get_differential(struct esp
*esp
)
144 struct platform_device
*op
= to_platform_device(esp
->dev
);
145 struct device_node
*dp
;
147 dp
= op
->dev
.of_node
;
148 if (of_find_property(dp
, "differential", NULL
))
149 esp
->flags
|= ESP_FLAG_DIFFERENTIAL
;
151 esp
->flags
&= ~ESP_FLAG_DIFFERENTIAL
;
154 static void esp_get_clock_params(struct esp
*esp
)
156 struct platform_device
*op
= to_platform_device(esp
->dev
);
157 struct device_node
*bus_dp
, *dp
;
160 dp
= op
->dev
.of_node
;
163 fmhz
= of_getintprop_default(dp
, "clock-frequency", 0);
165 fmhz
= of_getintprop_default(bus_dp
, "clock-frequency", 0);
170 static void esp_get_bursts(struct esp
*esp
, struct platform_device
*dma_of
)
172 struct device_node
*dma_dp
= dma_of
->dev
.of_node
;
173 struct platform_device
*op
= to_platform_device(esp
->dev
);
174 struct device_node
*dp
;
177 dp
= op
->dev
.of_node
;
178 bursts
= of_getintprop_default(dp
, "burst-sizes", 0xff);
179 val
= of_getintprop_default(dma_dp
, "burst-sizes", 0xff);
183 val
= of_getintprop_default(dma_dp
->parent
, "burst-sizes", 0xff);
187 if (bursts
== 0xff ||
188 (bursts
& DMA_BURST16
) == 0 ||
189 (bursts
& DMA_BURST32
) == 0)
190 bursts
= (DMA_BURST32
- 1);
192 esp
->bursts
= bursts
;
195 static void esp_sbus_get_props(struct esp
*esp
, struct platform_device
*espdma
)
197 esp_get_scsi_id(esp
, espdma
);
198 esp_get_differential(esp
);
199 esp_get_clock_params(esp
);
200 esp_get_bursts(esp
, espdma
);
203 static void sbus_esp_write8(struct esp
*esp
, u8 val
, unsigned long reg
)
205 sbus_writeb(val
, esp
->regs
+ (reg
* 4UL));
208 static u8
sbus_esp_read8(struct esp
*esp
, unsigned long reg
)
210 return sbus_readb(esp
->regs
+ (reg
* 4UL));
213 static int sbus_esp_irq_pending(struct esp
*esp
)
215 if (dma_read32(DMA_CSR
) & (DMA_HNDL_INTR
| DMA_HNDL_ERROR
))
220 static void sbus_esp_reset_dma(struct esp
*esp
)
222 int can_do_burst16
, can_do_burst32
, can_do_burst64
;
223 int can_do_sbus64
, lim
;
224 struct platform_device
*op
= to_platform_device(esp
->dev
);
227 can_do_burst16
= (esp
->bursts
& DMA_BURST16
) != 0;
228 can_do_burst32
= (esp
->bursts
& DMA_BURST32
) != 0;
231 if (sbus_can_dma_64bit())
233 if (sbus_can_burst64())
234 can_do_burst64
= (esp
->bursts
& DMA_BURST64
) != 0;
236 /* Put the DVMA into a known state. */
237 if (esp
->dmarev
!= dvmahme
) {
238 val
= dma_read32(DMA_CSR
);
239 dma_write32(val
| DMA_RST_SCSI
, DMA_CSR
);
240 dma_write32(val
& ~DMA_RST_SCSI
, DMA_CSR
);
242 switch (esp
->dmarev
) {
244 dma_write32(DMA_RESET_FAS366
, DMA_CSR
);
245 dma_write32(DMA_RST_SCSI
, DMA_CSR
);
247 esp
->prev_hme_dmacsr
= (DMA_PARITY_OFF
| DMA_2CLKS
|
248 DMA_SCSI_DISAB
| DMA_INT_ENAB
);
250 esp
->prev_hme_dmacsr
&= ~(DMA_ENABLE
| DMA_ST_WRITE
|
254 esp
->prev_hme_dmacsr
|= DMA_BRST64
;
255 else if (can_do_burst32
)
256 esp
->prev_hme_dmacsr
|= DMA_BRST32
;
259 esp
->prev_hme_dmacsr
|= DMA_SCSI_SBUS64
;
260 sbus_set_sbus64(&op
->dev
, esp
->bursts
);
264 while (dma_read32(DMA_CSR
) & DMA_PEND_READ
) {
266 printk(KERN_ALERT PFX
"esp%d: DMA_PEND_READ "
268 esp
->host
->unique_id
);
274 dma_write32(0, DMA_CSR
);
275 dma_write32(esp
->prev_hme_dmacsr
, DMA_CSR
);
277 dma_write32(0, DMA_ADDR
);
281 if (esp
->rev
!= ESP100
) {
282 val
= dma_read32(DMA_CSR
);
283 dma_write32(val
| DMA_3CLKS
, DMA_CSR
);
288 val
= dma_read32(DMA_CSR
);
291 if (can_do_burst32
) {
295 dma_write32(val
, DMA_CSR
);
299 val
= dma_read32(DMA_CSR
);
300 val
|= DMA_ADD_ENABLE
;
301 val
&= ~DMA_BCNT_ENAB
;
302 if (!can_do_burst32
&& can_do_burst16
) {
303 val
|= DMA_ESC_BURST
;
305 val
&= ~(DMA_ESC_BURST
);
307 dma_write32(val
, DMA_CSR
);
314 /* Enable interrupts. */
315 val
= dma_read32(DMA_CSR
);
316 dma_write32(val
| DMA_INT_ENAB
, DMA_CSR
);
319 static void sbus_esp_dma_drain(struct esp
*esp
)
324 if (esp
->dmarev
== dvmahme
)
327 csr
= dma_read32(DMA_CSR
);
328 if (!(csr
& DMA_FIFO_ISDRAIN
))
331 if (esp
->dmarev
!= dvmarev3
&& esp
->dmarev
!= dvmaesc1
)
332 dma_write32(csr
| DMA_FIFO_STDRAIN
, DMA_CSR
);
335 while (dma_read32(DMA_CSR
) & DMA_FIFO_ISDRAIN
) {
337 printk(KERN_ALERT PFX
"esp%d: DMA will not drain!\n",
338 esp
->host
->unique_id
);
345 static void sbus_esp_dma_invalidate(struct esp
*esp
)
347 if (esp
->dmarev
== dvmahme
) {
348 dma_write32(DMA_RST_SCSI
, DMA_CSR
);
350 esp
->prev_hme_dmacsr
= ((esp
->prev_hme_dmacsr
|
351 (DMA_PARITY_OFF
| DMA_2CLKS
|
352 DMA_SCSI_DISAB
| DMA_INT_ENAB
)) &
353 ~(DMA_ST_WRITE
| DMA_ENABLE
));
355 dma_write32(0, DMA_CSR
);
356 dma_write32(esp
->prev_hme_dmacsr
, DMA_CSR
);
358 /* This is necessary to avoid having the SCSI channel
359 * engine lock up on us.
361 dma_write32(0, DMA_ADDR
);
367 while ((val
= dma_read32(DMA_CSR
)) & DMA_PEND_READ
) {
369 printk(KERN_ALERT PFX
"esp%d: DMA will not "
370 "invalidate!\n", esp
->host
->unique_id
);
376 val
&= ~(DMA_ENABLE
| DMA_ST_WRITE
| DMA_BCNT_ENAB
);
378 dma_write32(val
, DMA_CSR
);
379 val
&= ~DMA_FIFO_INV
;
380 dma_write32(val
, DMA_CSR
);
384 static void sbus_esp_send_dma_cmd(struct esp
*esp
, u32 addr
, u32 esp_count
,
385 u32 dma_count
, int write
, u8 cmd
)
389 BUG_ON(!(cmd
& ESP_CMD_DMA
));
391 sbus_esp_write8(esp
, (esp_count
>> 0) & 0xff, ESP_TCLOW
);
392 sbus_esp_write8(esp
, (esp_count
>> 8) & 0xff, ESP_TCMED
);
393 if (esp
->rev
== FASHME
) {
394 sbus_esp_write8(esp
, (esp_count
>> 16) & 0xff, FAS_RLO
);
395 sbus_esp_write8(esp
, 0, FAS_RHI
);
397 scsi_esp_cmd(esp
, cmd
);
399 csr
= esp
->prev_hme_dmacsr
;
400 csr
|= DMA_SCSI_DISAB
| DMA_ENABLE
;
404 csr
&= ~DMA_ST_WRITE
;
405 esp
->prev_hme_dmacsr
= csr
;
407 dma_write32(dma_count
, DMA_COUNT
);
408 dma_write32(addr
, DMA_ADDR
);
409 dma_write32(csr
, DMA_CSR
);
411 csr
= dma_read32(DMA_CSR
);
416 csr
&= ~DMA_ST_WRITE
;
417 dma_write32(csr
, DMA_CSR
);
418 if (esp
->dmarev
== dvmaesc1
) {
419 u32 end
= PAGE_ALIGN(addr
+ dma_count
+ 16U);
420 dma_write32(end
- addr
, DMA_COUNT
);
422 dma_write32(addr
, DMA_ADDR
);
424 scsi_esp_cmd(esp
, cmd
);
429 static int sbus_esp_dma_error(struct esp
*esp
)
431 u32 csr
= dma_read32(DMA_CSR
);
433 if (csr
& DMA_HNDL_ERROR
)
439 static const struct esp_driver_ops sbus_esp_ops
= {
440 .esp_write8
= sbus_esp_write8
,
441 .esp_read8
= sbus_esp_read8
,
442 .irq_pending
= sbus_esp_irq_pending
,
443 .reset_dma
= sbus_esp_reset_dma
,
444 .dma_drain
= sbus_esp_dma_drain
,
445 .dma_invalidate
= sbus_esp_dma_invalidate
,
446 .send_dma_cmd
= sbus_esp_send_dma_cmd
,
447 .dma_error
= sbus_esp_dma_error
,
450 static int esp_sbus_probe_one(struct platform_device
*op
,
451 struct platform_device
*espdma
, int hme
)
453 struct scsi_host_template
*tpnt
= &scsi_esp_template
;
454 struct Scsi_Host
*host
;
458 host
= scsi_host_alloc(tpnt
, sizeof(struct esp
));
464 host
->max_id
= (hme
? 16 : 8);
465 esp
= shost_priv(host
);
469 esp
->ops
= &sbus_esp_ops
;
472 esp
->flags
|= ESP_FLAG_WIDE_CAPABLE
;
474 err
= esp_sbus_setup_dma(esp
, espdma
);
478 err
= esp_sbus_map_regs(esp
, hme
);
482 err
= esp_sbus_map_command_block(esp
);
484 goto fail_unmap_regs
;
486 err
= esp_sbus_register_irq(esp
);
488 goto fail_unmap_command_block
;
490 esp_sbus_get_props(esp
, espdma
);
492 /* Before we try to touch the ESP chip, ESC1 dma can
493 * come up with the reset bit set, so make sure that
496 if (esp
->dmarev
== dvmaesc1
) {
497 u32 val
= dma_read32(DMA_CSR
);
499 dma_write32(val
& ~DMA_RST_SCSI
, DMA_CSR
);
502 dev_set_drvdata(&op
->dev
, esp
);
504 err
= scsi_esp_register(esp
);
511 free_irq(host
->irq
, esp
);
512 fail_unmap_command_block
:
513 dma_free_coherent(&op
->dev
, 16,
515 esp
->command_block_dma
);
517 of_iounmap(&op
->resource
[(hme
? 1 : 0)], esp
->regs
, SBUS_ESP_REG_SIZE
);
524 static int esp_sbus_probe(struct platform_device
*op
)
526 struct device_node
*dma_node
= NULL
;
527 struct device_node
*dp
= op
->dev
.of_node
;
528 struct platform_device
*dma_of
= NULL
;
532 if (of_node_name_eq(dp
->parent
, "espdma") ||
533 of_node_name_eq(dp
->parent
, "dma"))
534 dma_node
= dp
->parent
;
535 else if (of_node_name_eq(dp
, "SUNW,fas")) {
536 dma_node
= op
->dev
.of_node
;
540 dma_of
= of_find_device_by_node(dma_node
);
544 ret
= esp_sbus_probe_one(op
, dma_of
, hme
);
546 put_device(&dma_of
->dev
);
551 static int esp_sbus_remove(struct platform_device
*op
)
553 struct esp
*esp
= dev_get_drvdata(&op
->dev
);
554 struct platform_device
*dma_of
= esp
->dma
;
555 unsigned int irq
= esp
->host
->irq
;
559 scsi_esp_unregister(esp
);
561 /* Disable interrupts. */
562 val
= dma_read32(DMA_CSR
);
563 dma_write32(val
& ~DMA_INT_ENAB
, DMA_CSR
);
567 is_hme
= (esp
->dmarev
== dvmahme
);
569 dma_free_coherent(&op
->dev
, 16,
571 esp
->command_block_dma
);
572 of_iounmap(&op
->resource
[(is_hme
? 1 : 0)], esp
->regs
,
574 of_iounmap(&dma_of
->resource
[0], esp
->dma_regs
,
575 resource_size(&dma_of
->resource
[0]));
577 scsi_host_put(esp
->host
);
579 dev_set_drvdata(&op
->dev
, NULL
);
581 put_device(&dma_of
->dev
);
586 static const struct of_device_id esp_match
[] = {
598 MODULE_DEVICE_TABLE(of
, esp_match
);
600 static struct platform_driver esp_sbus_driver
= {
603 .of_match_table
= esp_match
,
605 .probe
= esp_sbus_probe
,
606 .remove
= esp_sbus_remove
,
609 static int __init
sunesp_init(void)
611 return platform_driver_register(&esp_sbus_driver
);
614 static void __exit
sunesp_exit(void)
616 platform_driver_unregister(&esp_sbus_driver
);
619 MODULE_DESCRIPTION("Sun ESP SCSI driver");
620 MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
621 MODULE_LICENSE("GPL");
622 MODULE_VERSION(DRV_VERSION
);
624 module_init(sunesp_init
);
625 module_exit(sunesp_exit
);