bzip2/lzma: config and initramfs support for bzip2/lzma decompression
[linux/fpc-iii.git] / arch / sh / boards / board-sh7785lcr.c
blob408bbddaf3258b02f544fe10405acea2946cfee1
1 /*
2 * Renesas Technology Corp. R0P7785LC0011RL Support.
4 * Copyright (C) 2008 Yoshihiro Shimoda
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
11 #include <linux/init.h>
12 #include <linux/platform_device.h>
13 #include <linux/sm501.h>
14 #include <linux/sm501-regs.h>
15 #include <linux/fb.h>
16 #include <linux/mtd/physmap.h>
17 #include <linux/delay.h>
18 #include <linux/i2c.h>
19 #include <linux/i2c-pca-platform.h>
20 #include <linux/i2c-algo-pca.h>
21 #include <asm/heartbeat.h>
22 #include <mach/sh7785lcr.h>
25 * NOTE: This board has 2 physical memory maps.
26 * Please look at include/asm-sh/sh7785lcr.h or hardware manual.
28 static struct resource heartbeat_resources[] = {
29 [0] = {
30 .start = PLD_LEDCR,
31 .end = PLD_LEDCR,
32 .flags = IORESOURCE_MEM,
36 static struct heartbeat_data heartbeat_data = {
37 .regsize = 8,
40 static struct platform_device heartbeat_device = {
41 .name = "heartbeat",
42 .id = -1,
43 .dev = {
44 .platform_data = &heartbeat_data,
46 .num_resources = ARRAY_SIZE(heartbeat_resources),
47 .resource = heartbeat_resources,
50 static struct mtd_partition nor_flash_partitions[] = {
52 .name = "loader",
53 .offset = 0x00000000,
54 .size = 512 * 1024,
57 .name = "bootenv",
58 .offset = MTDPART_OFS_APPEND,
59 .size = 512 * 1024,
62 .name = "kernel",
63 .offset = MTDPART_OFS_APPEND,
64 .size = 4 * 1024 * 1024,
67 .name = "data",
68 .offset = MTDPART_OFS_APPEND,
69 .size = MTDPART_SIZ_FULL,
73 static struct physmap_flash_data nor_flash_data = {
74 .width = 4,
75 .parts = nor_flash_partitions,
76 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
79 static struct resource nor_flash_resources[] = {
80 [0] = {
81 .start = NOR_FLASH_ADDR,
82 .end = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
83 .flags = IORESOURCE_MEM,
87 static struct platform_device nor_flash_device = {
88 .name = "physmap-flash",
89 .dev = {
90 .platform_data = &nor_flash_data,
92 .num_resources = ARRAY_SIZE(nor_flash_resources),
93 .resource = nor_flash_resources,
96 static struct resource r8a66597_usb_host_resources[] = {
97 [0] = {
98 .name = "r8a66597_hcd",
99 .start = R8A66597_ADDR,
100 .end = R8A66597_ADDR + R8A66597_SIZE - 1,
101 .flags = IORESOURCE_MEM,
103 [1] = {
104 .name = "r8a66597_hcd",
105 .start = 2,
106 .end = 2,
107 .flags = IORESOURCE_IRQ,
111 static struct platform_device r8a66597_usb_host_device = {
112 .name = "r8a66597_hcd",
113 .id = -1,
114 .dev = {
115 .dma_mask = NULL,
116 .coherent_dma_mask = 0xffffffff,
118 .num_resources = ARRAY_SIZE(r8a66597_usb_host_resources),
119 .resource = r8a66597_usb_host_resources,
122 static struct resource sm501_resources[] = {
123 [0] = {
124 .start = SM107_MEM_ADDR,
125 .end = SM107_MEM_ADDR + SM107_MEM_SIZE - 1,
126 .flags = IORESOURCE_MEM,
128 [1] = {
129 .start = SM107_REG_ADDR,
130 .end = SM107_REG_ADDR + SM107_REG_SIZE - 1,
131 .flags = IORESOURCE_MEM,
133 [2] = {
134 .start = 10,
135 .flags = IORESOURCE_IRQ,
139 static struct fb_videomode sm501_default_mode_crt = {
140 .pixclock = 35714, /* 28MHz */
141 .xres = 640,
142 .yres = 480,
143 .left_margin = 105,
144 .right_margin = 16,
145 .upper_margin = 33,
146 .lower_margin = 10,
147 .hsync_len = 39,
148 .vsync_len = 2,
149 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
152 static struct fb_videomode sm501_default_mode_pnl = {
153 .pixclock = 40000, /* 25MHz */
154 .xres = 640,
155 .yres = 480,
156 .left_margin = 2,
157 .right_margin = 16,
158 .upper_margin = 33,
159 .lower_margin = 10,
160 .hsync_len = 39,
161 .vsync_len = 2,
162 .sync = 0,
165 static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = {
166 .def_bpp = 16,
167 .def_mode = &sm501_default_mode_pnl,
168 .flags = SM501FB_FLAG_USE_INIT_MODE |
169 SM501FB_FLAG_USE_HWCURSOR |
170 SM501FB_FLAG_USE_HWACCEL |
171 SM501FB_FLAG_DISABLE_AT_EXIT |
172 SM501FB_FLAG_PANEL_NO_VBIASEN,
175 static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = {
176 .def_bpp = 16,
177 .def_mode = &sm501_default_mode_crt,
178 .flags = SM501FB_FLAG_USE_INIT_MODE |
179 SM501FB_FLAG_USE_HWCURSOR |
180 SM501FB_FLAG_USE_HWACCEL |
181 SM501FB_FLAG_DISABLE_AT_EXIT,
184 static struct sm501_platdata_fb sm501_fb_pdata = {
185 .fb_route = SM501_FB_OWN,
186 .fb_crt = &sm501_pdata_fbsub_crt,
187 .fb_pnl = &sm501_pdata_fbsub_pnl,
190 static struct sm501_initdata sm501_initdata = {
191 .gpio_high = {
192 .set = 0x00001fe0,
193 .mask = 0x0,
195 .devices = 0,
196 .mclk = 84 * 1000000,
197 .m1xclk = 112 * 1000000,
200 static struct sm501_platdata sm501_platform_data = {
201 .init = &sm501_initdata,
202 .fb = &sm501_fb_pdata,
205 static struct platform_device sm501_device = {
206 .name = "sm501",
207 .id = -1,
208 .dev = {
209 .platform_data = &sm501_platform_data,
211 .num_resources = ARRAY_SIZE(sm501_resources),
212 .resource = sm501_resources,
215 static struct resource i2c_resources[] = {
216 [0] = {
217 .start = PCA9564_ADDR,
218 .end = PCA9564_ADDR + PCA9564_SIZE - 1,
219 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
221 [1] = {
222 .start = 12,
223 .end = 12,
224 .flags = IORESOURCE_IRQ,
228 static struct i2c_pca9564_pf_platform_data i2c_platform_data = {
229 .gpio = 0,
230 .i2c_clock_speed = I2C_PCA_CON_330kHz,
231 .timeout = 100,
234 static struct platform_device i2c_device = {
235 .name = "i2c-pca-platform",
236 .id = -1,
237 .dev = {
238 .platform_data = &i2c_platform_data,
240 .num_resources = ARRAY_SIZE(i2c_resources),
241 .resource = i2c_resources,
244 static struct platform_device *sh7785lcr_devices[] __initdata = {
245 &heartbeat_device,
246 &nor_flash_device,
247 &r8a66597_usb_host_device,
248 &sm501_device,
249 &i2c_device,
252 static struct i2c_board_info __initdata sh7785lcr_i2c_devices[] = {
254 I2C_BOARD_INFO("r2025sd", 0x32),
258 static int __init sh7785lcr_devices_setup(void)
260 i2c_register_board_info(0, sh7785lcr_i2c_devices,
261 ARRAY_SIZE(sh7785lcr_i2c_devices));
263 return platform_add_devices(sh7785lcr_devices,
264 ARRAY_SIZE(sh7785lcr_devices));
266 __initcall(sh7785lcr_devices_setup);
268 /* Initialize IRQ setting */
269 void __init init_sh7785lcr_IRQ(void)
271 plat_irq_setup_pins(IRQ_MODE_IRQ7654);
272 plat_irq_setup_pins(IRQ_MODE_IRQ3210);
275 static void sh7785lcr_power_off(void)
277 ctrl_outb(0x01, P2SEGADDR(PLD_POFCR));
280 /* Initialize the board */
281 static void __init sh7785lcr_setup(char **cmdline_p)
283 void __iomem *sm501_reg;
285 printk(KERN_INFO "Renesas Technology Corp. R0P7785LC0011RL support.\n");
287 pm_power_off = sh7785lcr_power_off;
289 /* sm501 DRAM configuration */
290 sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
291 writel(0x000307c2, sm501_reg);
295 * The Machine Vector
297 static struct sh_machine_vector mv_sh7785lcr __initmv = {
298 .mv_name = "SH7785LCR",
299 .mv_setup = sh7785lcr_setup,
300 .mv_init_irq = init_sh7785lcr_IRQ,