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net/mlx4_en: Move filters cleanup to a proper location
[linux/fpc-iii.git] / drivers / net / wireless / intel / iwlwifi / mvm / utils.c
blob161b99efd63d810f54ecac355d95dcdd0497755f
1 /******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
10 * Copyright (C) 2015 Intel Deutschland GmbH
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24 * USA
25 *
26 * The full GNU General Public License is included in this distribution
27 * in the file called COPYING.
28 *
29 * Contact Information:
30 * Intel Linux Wireless <linuxwifi@intel.com>
31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
32 *
33 * BSD LICENSE
34 *
35 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
36 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
37 * All rights reserved.
38 *
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
41 * are met:
42 *
43 * * Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * * Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in
47 * the documentation and/or other materials provided with the
48 * distribution.
49 * * Neither the name Intel Corporation nor the names of its
50 * contributors may be used to endorse or promote products derived
51 * from this software without specific prior written permission.
52 *
53 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
54 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
55 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
56 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
57 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
58 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
59 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
60 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
61 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
63 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
64 *
65 *****************************************************************************/
66 #include <net/mac80211.h>
67
68 #include "iwl-debug.h"
69 #include "iwl-io.h"
70 #include "iwl-prph.h"
71 #include "fw-dbg.h"
72 #include "mvm.h"
73 #include "fw-api-rs.h"
74
75 /*
76 * Will return 0 even if the cmd failed when RFKILL is asserted unless
77 * CMD_WANT_SKB is set in cmd->flags.
78 */
79 int iwl_mvm_send_cmd(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd)
80 {
81 int ret;
82
83 #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
84 if (WARN_ON(mvm->d3_test_active))
85 return -EIO;
86 #endif
87
88 /*
89 * Synchronous commands from this op-mode must hold
90 * the mutex, this ensures we don't try to send two
91 * (or more) synchronous commands at a time.
92 */
93 if (!(cmd->flags & CMD_ASYNC)) {
94 lockdep_assert_held(&mvm->mutex);
95 if (!(cmd->flags & CMD_SEND_IN_IDLE))
96 iwl_mvm_ref(mvm, IWL_MVM_REF_SENDING_CMD);
97 }
98
99 ret = iwl_trans_send_cmd(mvm->trans, cmd);
100
101 if (!(cmd->flags & (CMD_ASYNC | CMD_SEND_IN_IDLE)))
102 iwl_mvm_unref(mvm, IWL_MVM_REF_SENDING_CMD);
103
104 /*
105 * If the caller wants the SKB, then don't hide any problems, the
106 * caller might access the response buffer which will be NULL if
107 * the command failed.
108 */
109 if (cmd->flags & CMD_WANT_SKB)
110 return ret;
111
112 /* Silently ignore failures if RFKILL is asserted */
113 if (!ret || ret == -ERFKILL)
114 return 0;
115 return ret;
116 }
117
118 int iwl_mvm_send_cmd_pdu(struct iwl_mvm *mvm, u32 id,
119 u32 flags, u16 len, const void *data)
120 {
121 struct iwl_host_cmd cmd = {
122 .id = id,
123 .len = { len, },
124 .data = { data, },
125 .flags = flags,
126 };
127
128 return iwl_mvm_send_cmd(mvm, &cmd);
129 }
130
131 /*
132 * We assume that the caller set the status to the success value
133 */
134 int iwl_mvm_send_cmd_status(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd,
135 u32 *status)
136 {
137 struct iwl_rx_packet *pkt;
138 struct iwl_cmd_response *resp;
139 int ret, resp_len;
140
141 lockdep_assert_held(&mvm->mutex);
142
143 #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
144 if (WARN_ON(mvm->d3_test_active))
145 return -EIO;
146 #endif
147
148 /*
149 * Only synchronous commands can wait for status,
150 * we use WANT_SKB so the caller can't.
151 */
152 if (WARN_ONCE(cmd->flags & (CMD_ASYNC | CMD_WANT_SKB),
153 "cmd flags %x", cmd->flags))
154 return -EINVAL;
155
156 cmd->flags |= CMD_WANT_SKB;
157
158 ret = iwl_trans_send_cmd(mvm->trans, cmd);
159 if (ret == -ERFKILL) {
160 /*
161 * The command failed because of RFKILL, don't update
162 * the status, leave it as success and return 0.
163 */
164 return 0;
165 } else if (ret) {
166 return ret;
167 }
168
169 pkt = cmd->resp_pkt;
170 /* Can happen if RFKILL is asserted */
171 if (!pkt) {
172 ret = 0;
173 goto out_free_resp;
174 }
175
176 resp_len = iwl_rx_packet_payload_len(pkt);
177 if (WARN_ON_ONCE(resp_len != sizeof(*resp))) {
178 ret = -EIO;
179 goto out_free_resp;
180 }
181
182 resp = (void *)pkt->data;
183 *status = le32_to_cpu(resp->status);
184 out_free_resp:
185 iwl_free_resp(cmd);
186 return ret;
187 }
188
189 /*
190 * We assume that the caller set the status to the sucess value
191 */
192 int iwl_mvm_send_cmd_pdu_status(struct iwl_mvm *mvm, u32 id, u16 len,
193 const void *data, u32 *status)
194 {
195 struct iwl_host_cmd cmd = {
196 .id = id,
197 .len = { len, },
198 .data = { data, },
199 };
200
201 return iwl_mvm_send_cmd_status(mvm, &cmd, status);
202 }
203
204 #define IWL_DECLARE_RATE_INFO(r) \
205 [IWL_RATE_##r##M_INDEX] = IWL_RATE_##r##M_PLCP
206
207 /*
208 * Translate from fw_rate_index (IWL_RATE_XXM_INDEX) to PLCP
209 */
210 static const u8 fw_rate_idx_to_plcp[IWL_RATE_COUNT] = {
211 IWL_DECLARE_RATE_INFO(1),
212 IWL_DECLARE_RATE_INFO(2),
213 IWL_DECLARE_RATE_INFO(5),
214 IWL_DECLARE_RATE_INFO(11),
215 IWL_DECLARE_RATE_INFO(6),
216 IWL_DECLARE_RATE_INFO(9),
217 IWL_DECLARE_RATE_INFO(12),
218 IWL_DECLARE_RATE_INFO(18),
219 IWL_DECLARE_RATE_INFO(24),
220 IWL_DECLARE_RATE_INFO(36),
221 IWL_DECLARE_RATE_INFO(48),
222 IWL_DECLARE_RATE_INFO(54),
223 };
224
225 int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags,
226 enum nl80211_band band)
227 {
228 int rate = rate_n_flags & RATE_LEGACY_RATE_MSK;
229 int idx;
230 int band_offset = 0;
231
232 /* Legacy rate format, search for match in table */
233 if (band == NL80211_BAND_5GHZ)
234 band_offset = IWL_FIRST_OFDM_RATE;
235 for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
236 if (fw_rate_idx_to_plcp[idx] == rate)
237 return idx - band_offset;
238
239 return -1;
240 }
241
242 u8 iwl_mvm_mac80211_idx_to_hwrate(int rate_idx)
243 {
244 /* Get PLCP rate for tx_cmd->rate_n_flags */
245 return fw_rate_idx_to_plcp[rate_idx];
246 }
247
248 void iwl_mvm_rx_fw_error(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb)
249 {
250 struct iwl_rx_packet *pkt = rxb_addr(rxb);
251 struct iwl_error_resp *err_resp = (void *)pkt->data;
252
253 IWL_ERR(mvm, "FW Error notification: type 0x%08X cmd_id 0x%02X\n",
254 le32_to_cpu(err_resp->error_type), err_resp->cmd_id);
255 IWL_ERR(mvm, "FW Error notification: seq 0x%04X service 0x%08X\n",
256 le16_to_cpu(err_resp->bad_cmd_seq_num),
257 le32_to_cpu(err_resp->error_service));
258 IWL_ERR(mvm, "FW Error notification: timestamp 0x%16llX\n",
259 le64_to_cpu(err_resp->timestamp));
260 }
261
262 /*
263 * Returns the first antenna as ANT_[ABC], as defined in iwl-config.h.
264 * The parameter should also be a combination of ANT_[ABC].
265 */
266 u8 first_antenna(u8 mask)
267 {
268 BUILD_BUG_ON(ANT_A != BIT(0)); /* using ffs is wrong if not */
269 if (WARN_ON_ONCE(!mask)) /* ffs will return 0 if mask is zeroed */
270 return BIT(0);
271 return BIT(ffs(mask) - 1);
272 }
273
274 /*
275 * Toggles between TX antennas to send the probe request on.
276 * Receives the bitmask of valid TX antennas and the *index* used
277 * for the last TX, and returns the next valid *index* to use.
278 * In order to set it in the tx_cmd, must do BIT(idx).
279 */
280 u8 iwl_mvm_next_antenna(struct iwl_mvm *mvm, u8 valid, u8 last_idx)
281 {
282 u8 ind = last_idx;
283 int i;
284
285 for (i = 0; i < RATE_MCS_ANT_NUM; i++) {
286 ind = (ind + 1) % RATE_MCS_ANT_NUM;
287 if (valid & BIT(ind))
288 return ind;
289 }
290
291 WARN_ONCE(1, "Failed to toggle between antennas 0x%x", valid);
292 return last_idx;
293 }
294
295 static const struct {
296 const char *name;
297 u8 num;
298 } advanced_lookup[] = {
299 { "NMI_INTERRUPT_WDG", 0x34 },
300 { "SYSASSERT", 0x35 },
301 { "UCODE_VERSION_MISMATCH", 0x37 },
302 { "BAD_COMMAND", 0x38 },
303 { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
304 { "FATAL_ERROR", 0x3D },
305 { "NMI_TRM_HW_ERR", 0x46 },
306 { "NMI_INTERRUPT_TRM", 0x4C },
307 { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
308 { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
309 { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
310 { "NMI_INTERRUPT_HOST", 0x66 },
311 { "NMI_INTERRUPT_ACTION_PT", 0x7C },
312 { "NMI_INTERRUPT_UNKNOWN", 0x84 },
313 { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
314 { "ADVANCED_SYSASSERT", 0 },
315 };
316
317 static const char *desc_lookup(u32 num)
318 {
319 int i;
320
321 for (i = 0; i < ARRAY_SIZE(advanced_lookup) - 1; i++)
322 if (advanced_lookup[i].num == num)
323 return advanced_lookup[i].name;
324
325 /* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */
326 return advanced_lookup[i].name;
327 }
328
329 /*
330 * Note: This structure is read from the device with IO accesses,
331 * and the reading already does the endian conversion. As it is
332 * read with u32-sized accesses, any members with a different size
333 * need to be ordered correctly though!
334 */
335 struct iwl_error_event_table_v1 {
336 u32 valid; /* (nonzero) valid, (0) log is empty */
337 u32 error_id; /* type of error */
338 u32 pc; /* program counter */
339 u32 blink1; /* branch link */
340 u32 blink2; /* branch link */
341 u32 ilink1; /* interrupt link */
342 u32 ilink2; /* interrupt link */
343 u32 data1; /* error-specific data */
344 u32 data2; /* error-specific data */
345 u32 data3; /* error-specific data */
346 u32 bcon_time; /* beacon timer */
347 u32 tsf_low; /* network timestamp function timer */
348 u32 tsf_hi; /* network timestamp function timer */
349 u32 gp1; /* GP1 timer register */
350 u32 gp2; /* GP2 timer register */
351 u32 gp3; /* GP3 timer register */
352 u32 ucode_ver; /* uCode version */
353 u32 hw_ver; /* HW Silicon version */
354 u32 brd_ver; /* HW board version */
355 u32 log_pc; /* log program counter */
356 u32 frame_ptr; /* frame pointer */
357 u32 stack_ptr; /* stack pointer */
358 u32 hcmd; /* last host command header */
359 u32 isr0; /* isr status register LMPM_NIC_ISR0:
360 * rxtx_flag */
361 u32 isr1; /* isr status register LMPM_NIC_ISR1:
362 * host_flag */
363 u32 isr2; /* isr status register LMPM_NIC_ISR2:
364 * enc_flag */
365 u32 isr3; /* isr status register LMPM_NIC_ISR3:
366 * time_flag */
367 u32 isr4; /* isr status register LMPM_NIC_ISR4:
368 * wico interrupt */
369 u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
370 u32 wait_event; /* wait event() caller address */
371 u32 l2p_control; /* L2pControlField */
372 u32 l2p_duration; /* L2pDurationField */
373 u32 l2p_mhvalid; /* L2pMhValidBits */
374 u32 l2p_addr_match; /* L2pAddrMatchStat */
375 u32 lmpm_pmg_sel; /* indicate which clocks are turned on
376 * (LMPM_PMG_SEL) */
377 u32 u_timestamp; /* indicate when the date and time of the
378 * compilation */
379 u32 flow_handler; /* FH read/write pointers, RX credit */
380 } __packed /* LOG_ERROR_TABLE_API_S_VER_1 */;
381
382 struct iwl_error_event_table {
383 u32 valid; /* (nonzero) valid, (0) log is empty */
384 u32 error_id; /* type of error */
385 u32 trm_hw_status0; /* TRM HW status */
386 u32 trm_hw_status1; /* TRM HW status */
387 u32 blink2; /* branch link */
388 u32 ilink1; /* interrupt link */
389 u32 ilink2; /* interrupt link */
390 u32 data1; /* error-specific data */
391 u32 data2; /* error-specific data */
392 u32 data3; /* error-specific data */
393 u32 bcon_time; /* beacon timer */
394 u32 tsf_low; /* network timestamp function timer */
395 u32 tsf_hi; /* network timestamp function timer */
396 u32 gp1; /* GP1 timer register */
397 u32 gp2; /* GP2 timer register */
398 u32 fw_rev_type; /* firmware revision type */
399 u32 major; /* uCode version major */
400 u32 minor; /* uCode version minor */
401 u32 hw_ver; /* HW Silicon version */
402 u32 brd_ver; /* HW board version */
403 u32 log_pc; /* log program counter */
404 u32 frame_ptr; /* frame pointer */
405 u32 stack_ptr; /* stack pointer */
406 u32 hcmd; /* last host command header */
407 u32 isr0; /* isr status register LMPM_NIC_ISR0:
408 * rxtx_flag */
409 u32 isr1; /* isr status register LMPM_NIC_ISR1:
410 * host_flag */
411 u32 isr2; /* isr status register LMPM_NIC_ISR2:
412 * enc_flag */
413 u32 isr3; /* isr status register LMPM_NIC_ISR3:
414 * time_flag */
415 u32 isr4; /* isr status register LMPM_NIC_ISR4:
416 * wico interrupt */
417 u32 last_cmd_id; /* last HCMD id handled by the firmware */
418 u32 wait_event; /* wait event() caller address */
419 u32 l2p_control; /* L2pControlField */
420 u32 l2p_duration; /* L2pDurationField */
421 u32 l2p_mhvalid; /* L2pMhValidBits */
422 u32 l2p_addr_match; /* L2pAddrMatchStat */
423 u32 lmpm_pmg_sel; /* indicate which clocks are turned on
424 * (LMPM_PMG_SEL) */
425 u32 u_timestamp; /* indicate when the date and time of the
426 * compilation */
427 u32 flow_handler; /* FH read/write pointers, RX credit */
428 } __packed /* LOG_ERROR_TABLE_API_S_VER_3 */;
429
430 /*
431 * UMAC error struct - relevant starting from family 8000 chip.
432 * Note: This structure is read from the device with IO accesses,
433 * and the reading already does the endian conversion. As it is
434 * read with u32-sized accesses, any members with a different size
435 * need to be ordered correctly though!
436 */
437 struct iwl_umac_error_event_table {
438 u32 valid; /* (nonzero) valid, (0) log is empty */
439 u32 error_id; /* type of error */
440 u32 blink1; /* branch link */
441 u32 blink2; /* branch link */
442 u32 ilink1; /* interrupt link */
443 u32 ilink2; /* interrupt link */
444 u32 data1; /* error-specific data */
445 u32 data2; /* error-specific data */
446 u32 data3; /* error-specific data */
447 u32 umac_major;
448 u32 umac_minor;
449 u32 frame_pointer; /* core register 27*/
450 u32 stack_pointer; /* core register 28 */
451 u32 cmd_header; /* latest host cmd sent to UMAC */
452 u32 nic_isr_pref; /* ISR status register */
453 } __packed;
454
455 #define ERROR_START_OFFSET (1 * sizeof(u32))
456 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
457
458 static void iwl_mvm_dump_umac_error_log(struct iwl_mvm *mvm)
459 {
460 struct iwl_trans *trans = mvm->trans;
461 struct iwl_umac_error_event_table table;
462 u32 base;
463
464 base = mvm->umac_error_event_table;
465
466 if (base < 0x800000) {
467 IWL_ERR(mvm,
468 "Not valid error log pointer 0x%08X for %s uCode\n",
469 base,
470 (mvm->cur_ucode == IWL_UCODE_INIT)
471 ? "Init" : "RT");
472 return;
473 }
474
475 iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
476
477 if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
478 IWL_ERR(trans, "Start IWL Error Log Dump:\n");
479 IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
480 mvm->status, table.valid);
481 }
482
483 IWL_ERR(mvm, "0x%08X | %s\n", table.error_id,
484 desc_lookup(table.error_id));
485 IWL_ERR(mvm, "0x%08X | umac branchlink1\n", table.blink1);
486 IWL_ERR(mvm, "0x%08X | umac branchlink2\n", table.blink2);
487 IWL_ERR(mvm, "0x%08X | umac interruptlink1\n", table.ilink1);
488 IWL_ERR(mvm, "0x%08X | umac interruptlink2\n", table.ilink2);
489 IWL_ERR(mvm, "0x%08X | umac data1\n", table.data1);
490 IWL_ERR(mvm, "0x%08X | umac data2\n", table.data2);
491 IWL_ERR(mvm, "0x%08X | umac data3\n", table.data3);
492 IWL_ERR(mvm, "0x%08X | umac major\n", table.umac_major);
493 IWL_ERR(mvm, "0x%08X | umac minor\n", table.umac_minor);
494 IWL_ERR(mvm, "0x%08X | frame pointer\n", table.frame_pointer);
495 IWL_ERR(mvm, "0x%08X | stack pointer\n", table.stack_pointer);
496 IWL_ERR(mvm, "0x%08X | last host cmd\n", table.cmd_header);
497 IWL_ERR(mvm, "0x%08X | isr status reg\n", table.nic_isr_pref);
498 }
499
500 void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
501 {
502 struct iwl_trans *trans = mvm->trans;
503 struct iwl_error_event_table table;
504 u32 base;
505
506 base = mvm->error_event_table;
507 if (mvm->cur_ucode == IWL_UCODE_INIT) {
508 if (!base)
509 base = mvm->fw->init_errlog_ptr;
510 } else {
511 if (!base)
512 base = mvm->fw->inst_errlog_ptr;
513 }
514
515 if (base < 0x800000) {
516 IWL_ERR(mvm,
517 "Not valid error log pointer 0x%08X for %s uCode\n",
518 base,
519 (mvm->cur_ucode == IWL_UCODE_INIT)
520 ? "Init" : "RT");
521 return;
522 }
523
524 iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
525
526 if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
527 IWL_ERR(trans, "Start IWL Error Log Dump:\n");
528 IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
529 mvm->status, table.valid);
530 }
531
532 /* Do not change this output - scripts rely on it */
533
534 IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version);
535
536 trace_iwlwifi_dev_ucode_error(trans->dev, table.error_id, table.tsf_low,
537 table.data1, table.data2, table.data3,
538 table.blink2, table.ilink1,
539 table.ilink2, table.bcon_time, table.gp1,
540 table.gp2, table.fw_rev_type, table.major,
541 table.minor, table.hw_ver, table.brd_ver);
542 IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id,
543 desc_lookup(table.error_id));
544 IWL_ERR(mvm, "0x%08X | trm_hw_status0\n", table.trm_hw_status0);
545 IWL_ERR(mvm, "0x%08X | trm_hw_status1\n", table.trm_hw_status1);
546 IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2);
547 IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1);
548 IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2);
549 IWL_ERR(mvm, "0x%08X | data1\n", table.data1);
550 IWL_ERR(mvm, "0x%08X | data2\n", table.data2);
551 IWL_ERR(mvm, "0x%08X | data3\n", table.data3);
552 IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time);
553 IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low);
554 IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi);
555 IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1);
556 IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2);
557 IWL_ERR(mvm, "0x%08X | uCode revision type\n", table.fw_rev_type);
558 IWL_ERR(mvm, "0x%08X | uCode version major\n", table.major);
559 IWL_ERR(mvm, "0x%08X | uCode version minor\n", table.minor);
560 IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver);
561 IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver);
562 IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd);
563 IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0);
564 IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1);
565 IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2);
566 IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3);
567 IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4);
568 IWL_ERR(mvm, "0x%08X | last cmd Id\n", table.last_cmd_id);
569 IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event);
570 IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control);
571 IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration);
572 IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid);
573 IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match);
574 IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);
575 IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp);
576 IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler);
577
578 if (mvm->support_umac_log)
579 iwl_mvm_dump_umac_error_log(mvm);
580 }
581
582 int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 minq, u8 maxq)
583 {
584 int i;
585
586 lockdep_assert_held(&mvm->queue_info_lock);
587
588 for (i = minq; i <= maxq; i++)
589 if (mvm->queue_info[i].hw_queue_refcount == 0 &&
590 mvm->queue_info[i].status == IWL_MVM_QUEUE_FREE)
591 return i;
592
593 return -ENOSPC;
594 }
595
596 int iwl_mvm_reconfig_scd(struct iwl_mvm *mvm, int queue, int fifo, int sta_id,
597 int tid, int frame_limit, u16 ssn)
598 {
599 struct iwl_scd_txq_cfg_cmd cmd = {
600 .scd_queue = queue,
601 .enable = 1,
602 .window = frame_limit,
603 .sta_id = sta_id,
604 .ssn = cpu_to_le16(ssn),
605 .tx_fifo = fifo,
606 .aggregate = (queue >= IWL_MVM_DQA_MIN_DATA_QUEUE ||
607 queue == IWL_MVM_DQA_BSS_CLIENT_QUEUE),
608 .tid = tid,
609 };
610 int ret;
611
612 spin_lock_bh(&mvm->queue_info_lock);
613 if (WARN(mvm->queue_info[queue].hw_queue_refcount == 0,
614 "Trying to reconfig unallocated queue %d\n", queue)) {
615 spin_unlock_bh(&mvm->queue_info_lock);
616 return -ENXIO;
617 }
618 spin_unlock_bh(&mvm->queue_info_lock);
619
620 IWL_DEBUG_TX_QUEUES(mvm, "Reconfig SCD for TXQ #%d\n", queue);
621
622 ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd);
623 WARN_ONCE(ret, "Failed to re-configure queue %d on FIFO %d, ret=%d\n",
624 queue, fifo, ret);
625
626 return ret;
627 }
628
629 void iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
630 u16 ssn, const struct iwl_trans_txq_scd_cfg *cfg,
631 unsigned int wdg_timeout)
632 {
633 bool enable_queue = true;
634
635 spin_lock_bh(&mvm->queue_info_lock);
636
637 /* Make sure this TID isn't already enabled */
638 if (mvm->queue_info[queue].tid_bitmap & BIT(cfg->tid)) {
639 spin_unlock_bh(&mvm->queue_info_lock);
640 IWL_ERR(mvm, "Trying to enable TXQ with existing TID %d\n",
641 cfg->tid);
642 return;
643 }
644
645 /* Update mappings and refcounts */
646 mvm->queue_info[queue].hw_queue_to_mac80211 |= BIT(mac80211_queue);
647 mvm->queue_info[queue].hw_queue_refcount++;
648 if (mvm->queue_info[queue].hw_queue_refcount > 1)
649 enable_queue = false;
650 else
651 mvm->queue_info[queue].ra_sta_id = cfg->sta_id;
652 mvm->queue_info[queue].tid_bitmap |= BIT(cfg->tid);
653
654 IWL_DEBUG_TX_QUEUES(mvm,
655 "Enabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
656 queue, mvm->queue_info[queue].hw_queue_refcount,
657 mvm->queue_info[queue].hw_queue_to_mac80211);
658
659 spin_unlock_bh(&mvm->queue_info_lock);
660
661 /* Send the enabling command if we need to */
662 if (enable_queue) {
663 struct iwl_scd_txq_cfg_cmd cmd = {
664 .scd_queue = queue,
665 .enable = 1,
666 .window = cfg->frame_limit,
667 .sta_id = cfg->sta_id,
668 .ssn = cpu_to_le16(ssn),
669 .tx_fifo = cfg->fifo,
670 .aggregate = cfg->aggregate,
671 .tid = cfg->tid,
672 };
673
674 iwl_trans_txq_enable_cfg(mvm->trans, queue, ssn, NULL,
675 wdg_timeout);
676 WARN(iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd),
677 &cmd),
678 "Failed to configure queue %d on FIFO %d\n", queue,
679 cfg->fifo);
680 }
681 }
682
683 void iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
684 u8 tid, u8 flags)
685 {
686 struct iwl_scd_txq_cfg_cmd cmd = {
687 .scd_queue = queue,
688 .enable = 0,
689 };
690 bool remove_mac_queue = true;
691 int ret;
692
693 spin_lock_bh(&mvm->queue_info_lock);
694
695 if (WARN_ON(mvm->queue_info[queue].hw_queue_refcount == 0)) {
696 spin_unlock_bh(&mvm->queue_info_lock);
697 return;
698 }
699
700 mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
701
702 /*
703 * If there is another TID with the same AC - don't remove the MAC queue
704 * from the mapping
705 */
706 if (tid < IWL_MAX_TID_COUNT) {
707 unsigned long tid_bitmap =
708 mvm->queue_info[queue].tid_bitmap;
709 int ac = tid_to_mac80211_ac[tid];
710 int i;
711
712 for_each_set_bit(i, &tid_bitmap, IWL_MAX_TID_COUNT) {
713 if (tid_to_mac80211_ac[i] == ac)
714 remove_mac_queue = false;
715 }
716 }
717
718 if (remove_mac_queue)
719 mvm->queue_info[queue].hw_queue_to_mac80211 &=
720 ~BIT(mac80211_queue);
721 mvm->queue_info[queue].hw_queue_refcount--;
722
723 cmd.enable = mvm->queue_info[queue].hw_queue_refcount ? 1 : 0;
724 if (!cmd.enable)
725 mvm->queue_info[queue].status = IWL_MVM_QUEUE_FREE;
726
727 IWL_DEBUG_TX_QUEUES(mvm,
728 "Disabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
729 queue,
730 mvm->queue_info[queue].hw_queue_refcount,
731 mvm->queue_info[queue].hw_queue_to_mac80211);
732
733 /* If the queue is still enabled - nothing left to do in this func */
734 if (cmd.enable) {
735 spin_unlock_bh(&mvm->queue_info_lock);
736 return;
737 }
738
739 cmd.sta_id = mvm->queue_info[queue].ra_sta_id;
740
741 /* Make sure queue info is correct even though we overwrite it */
742 WARN(mvm->queue_info[queue].hw_queue_refcount ||
743 mvm->queue_info[queue].tid_bitmap ||
744 mvm->queue_info[queue].hw_queue_to_mac80211,
745 "TXQ #%d info out-of-sync - refcount=%d, mac map=0x%x, tid=0x%x\n",
746 queue, mvm->queue_info[queue].hw_queue_refcount,
747 mvm->queue_info[queue].hw_queue_to_mac80211,
748 mvm->queue_info[queue].tid_bitmap);
749
750 /* If we are here - the queue is freed and we can zero out these vals */
751 mvm->queue_info[queue].hw_queue_refcount = 0;
752 mvm->queue_info[queue].tid_bitmap = 0;
753 mvm->queue_info[queue].hw_queue_to_mac80211 = 0;
754
755 spin_unlock_bh(&mvm->queue_info_lock);
756
757 iwl_trans_txq_disable(mvm->trans, queue, false);
758 ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, flags,
759 sizeof(cmd), &cmd);
760 if (ret)
761 IWL_ERR(mvm, "Failed to disable queue %d (ret=%d)\n",
762 queue, ret);
763 }
764
765 /**
766 * iwl_mvm_send_lq_cmd() - Send link quality command
767 * @init: This command is sent as part of station initialization right
768 * after station has been added.
769 *
770 * The link quality command is sent as the last step of station creation.
771 * This is the special case in which init is set and we call a callback in
772 * this case to clear the state indicating that station creation is in
773 * progress.
774 */
775 int iwl_mvm_send_lq_cmd(struct iwl_mvm *mvm, struct iwl_lq_cmd *lq, bool init)
776 {
777 struct iwl_host_cmd cmd = {
778 .id = LQ_CMD,
779 .len = { sizeof(struct iwl_lq_cmd), },
780 .flags = init ? 0 : CMD_ASYNC,
781 .data = { lq, },
782 };
783
784 if (WARN_ON(lq->sta_id == IWL_MVM_STATION_COUNT))
785 return -EINVAL;
786
787 return iwl_mvm_send_cmd(mvm, &cmd);
788 }
789
790 /**
791 * iwl_mvm_update_smps - Get a request to change the SMPS mode
792 * @req_type: The part of the driver who call for a change.
793 * @smps_requests: The request to change the SMPS mode.
794 *
795 * Get a requst to change the SMPS mode,
796 * and change it according to all other requests in the driver.
797 */
798 void iwl_mvm_update_smps(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
799 enum iwl_mvm_smps_type_request req_type,
800 enum ieee80211_smps_mode smps_request)
801 {
802 struct iwl_mvm_vif *mvmvif;
803 enum ieee80211_smps_mode smps_mode;
804 int i;
805
806 lockdep_assert_held(&mvm->mutex);
807
808 /* SMPS is irrelevant for NICs that don't have at least 2 RX antenna */
809 if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
810 return;
811
812 if (vif->type == NL80211_IFTYPE_AP)
813 smps_mode = IEEE80211_SMPS_OFF;
814 else
815 smps_mode = IEEE80211_SMPS_AUTOMATIC;
816
817 mvmvif = iwl_mvm_vif_from_mac80211(vif);
818 mvmvif->smps_requests[req_type] = smps_request;
819 for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
820 if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC) {
821 smps_mode = IEEE80211_SMPS_STATIC;
822 break;
823 }
824 if (mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
825 smps_mode = IEEE80211_SMPS_DYNAMIC;
826 }
827
828 ieee80211_request_smps(vif, smps_mode);
829 }
830
831 int iwl_mvm_request_statistics(struct iwl_mvm *mvm, bool clear)
832 {
833 struct iwl_statistics_cmd scmd = {
834 .flags = clear ? cpu_to_le32(IWL_STATISTICS_FLG_CLEAR) : 0,
835 };
836 struct iwl_host_cmd cmd = {
837 .id = STATISTICS_CMD,
838 .len[0] = sizeof(scmd),
839 .data[0] = &scmd,
840 .flags = CMD_WANT_SKB,
841 };
842 int ret;
843
844 ret = iwl_mvm_send_cmd(mvm, &cmd);
845 if (ret)
846 return ret;
847
848 iwl_mvm_handle_rx_statistics(mvm, cmd.resp_pkt);
849 iwl_free_resp(&cmd);
850
851 if (clear)
852 iwl_mvm_accu_radio_stats(mvm);
853
854 return 0;
855 }
856
857 void iwl_mvm_accu_radio_stats(struct iwl_mvm *mvm)
858 {
859 mvm->accu_radio_stats.rx_time += mvm->radio_stats.rx_time;
860 mvm->accu_radio_stats.tx_time += mvm->radio_stats.tx_time;
861 mvm->accu_radio_stats.on_time_rf += mvm->radio_stats.on_time_rf;
862 mvm->accu_radio_stats.on_time_scan += mvm->radio_stats.on_time_scan;
863 }
864
865 static void iwl_mvm_diversity_iter(void *_data, u8 *mac,
866 struct ieee80211_vif *vif)
867 {
868 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
869 bool *result = _data;
870 int i;
871
872 for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
873 if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC ||
874 mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
875 *result = false;
876 }
877 }
878
879 bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm)
880 {
881 bool result = true;
882
883 lockdep_assert_held(&mvm->mutex);
884
885 if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
886 return false;
887
888 if (mvm->cfg->rx_with_siso_diversity)
889 return false;
890
891 ieee80211_iterate_active_interfaces_atomic(
892 mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
893 iwl_mvm_diversity_iter, &result);
894
895 return result;
896 }
897
898 int iwl_mvm_update_low_latency(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
899 bool prev)
900 {
901 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
902 int res;
903
904 lockdep_assert_held(&mvm->mutex);
905
906 if (iwl_mvm_vif_low_latency(mvmvif) == prev)
907 return 0;
908
909 res = iwl_mvm_update_quotas(mvm, false, NULL);
910 if (res)
911 return res;
912
913 iwl_mvm_bt_coex_vif_change(mvm);
914
915 return iwl_mvm_power_update_mac(mvm);
916 }
917
918 static void iwl_mvm_ll_iter(void *_data, u8 *mac, struct ieee80211_vif *vif)
919 {
920 bool *result = _data;
921
922 if (iwl_mvm_vif_low_latency(iwl_mvm_vif_from_mac80211(vif)))
923 *result = true;
924 }
925
926 bool iwl_mvm_low_latency(struct iwl_mvm *mvm)
927 {
928 bool result = false;
929
930 ieee80211_iterate_active_interfaces_atomic(
931 mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
932 iwl_mvm_ll_iter, &result);
933
934 return result;
935 }
936
937 struct iwl_bss_iter_data {
938 struct ieee80211_vif *vif;
939 bool error;
940 };
941
942 static void iwl_mvm_bss_iface_iterator(void *_data, u8 *mac,
943 struct ieee80211_vif *vif)
944 {
945 struct iwl_bss_iter_data *data = _data;
946
947 if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
948 return;
949
950 if (data->vif) {
951 data->error = true;
952 return;
953 }
954
955 data->vif = vif;
956 }
957
958 struct ieee80211_vif *iwl_mvm_get_bss_vif(struct iwl_mvm *mvm)
959 {
960 struct iwl_bss_iter_data bss_iter_data = {};
961
962 ieee80211_iterate_active_interfaces_atomic(
963 mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
964 iwl_mvm_bss_iface_iterator, &bss_iter_data);
965
966 if (bss_iter_data.error) {
967 IWL_ERR(mvm, "More than one managed interface active!\n");
968 return ERR_PTR(-EINVAL);
969 }
970
971 return bss_iter_data.vif;
972 }
973
974 unsigned int iwl_mvm_get_wd_timeout(struct iwl_mvm *mvm,
975 struct ieee80211_vif *vif,
976 bool tdls, bool cmd_q)
977 {
978 struct iwl_fw_dbg_trigger_tlv *trigger;
979 struct iwl_fw_dbg_trigger_txq_timer *txq_timer;
980 unsigned int default_timeout =
981 cmd_q ? IWL_DEF_WD_TIMEOUT : mvm->cfg->base_params->wd_timeout;
982
983 if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS))
984 return iwlmvm_mod_params.tfd_q_hang_detect ?
985 default_timeout : IWL_WATCHDOG_DISABLED;
986
987 trigger = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS);
988 txq_timer = (void *)trigger->data;
989
990 if (tdls)
991 return le32_to_cpu(txq_timer->tdls);
992
993 if (cmd_q)
994 return le32_to_cpu(txq_timer->command_queue);
995
996 if (WARN_ON(!vif))
997 return default_timeout;
998
999 switch (ieee80211_vif_type_p2p(vif)) {
1000 case NL80211_IFTYPE_ADHOC:
1001 return le32_to_cpu(txq_timer->ibss);
1002 case NL80211_IFTYPE_STATION:
1003 return le32_to_cpu(txq_timer->bss);
1004 case NL80211_IFTYPE_AP:
1005 return le32_to_cpu(txq_timer->softap);
1006 case NL80211_IFTYPE_P2P_CLIENT:
1007 return le32_to_cpu(txq_timer->p2p_client);
1008 case NL80211_IFTYPE_P2P_GO:
1009 return le32_to_cpu(txq_timer->p2p_go);
1010 case NL80211_IFTYPE_P2P_DEVICE:
1011 return le32_to_cpu(txq_timer->p2p_device);
1012 default:
1013 WARN_ON(1);
1014 return mvm->cfg->base_params->wd_timeout;
1015 }
1016 }
1017
1018 void iwl_mvm_connection_loss(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
1019 const char *errmsg)
1020 {
1021 struct iwl_fw_dbg_trigger_tlv *trig;
1022 struct iwl_fw_dbg_trigger_mlme *trig_mlme;
1023
1024 if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_MLME))
1025 goto out;
1026
1027 trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_MLME);
1028 trig_mlme = (void *)trig->data;
1029 if (!iwl_fw_dbg_trigger_check_stop(mvm, vif, trig))
1030 goto out;
1031
1032 if (trig_mlme->stop_connection_loss &&
1033 --trig_mlme->stop_connection_loss)
1034 goto out;
1035
1036 iwl_mvm_fw_dbg_collect_trig(mvm, trig, "%s", errmsg);
1037
1038 out:
1039 ieee80211_connection_loss(vif);
1040 }
1041
1042 int iwl_mvm_send_lqm_cmd(struct ieee80211_vif *vif,
1043 enum iwl_lqm_cmd_operatrions operation,
1044 u32 duration, u32 timeout)
1045 {
1046 struct iwl_mvm_vif *mvm_vif = iwl_mvm_vif_from_mac80211(vif);
1047 struct iwl_link_qual_msrmnt_cmd cmd = {
1048 .cmd_operation = cpu_to_le32(operation),
1049 .mac_id = cpu_to_le32(mvm_vif->id),
1050 .measurement_time = cpu_to_le32(duration),
1051 .timeout = cpu_to_le32(timeout),
1052 };
1053 u32 cmdid =
1054 iwl_cmd_id(LINK_QUALITY_MEASUREMENT_CMD, MAC_CONF_GROUP, 0);
1055 int ret;
1056
1057 if (!fw_has_capa(&mvm_vif->mvm->fw->ucode_capa,
1058 IWL_UCODE_TLV_CAPA_LQM_SUPPORT))
1059 return -EOPNOTSUPP;
1060
1061 if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
1062 return -EINVAL;
1063
1064 switch (operation) {
1065 case LQM_CMD_OPERATION_START_MEASUREMENT:
1066 if (iwl_mvm_lqm_active(mvm_vif->mvm))
1067 return -EBUSY;
1068 if (!vif->bss_conf.assoc)
1069 return -EINVAL;
1070 mvm_vif->lqm_active = true;
1071 break;
1072 case LQM_CMD_OPERATION_STOP_MEASUREMENT:
1073 if (!iwl_mvm_lqm_active(mvm_vif->mvm))
1074 return -EINVAL;
1075 break;
1076 default:
1077 return -EINVAL;
1078 }
1079
1080 ret = iwl_mvm_send_cmd_pdu(mvm_vif->mvm, cmdid, 0, sizeof(cmd),
1081 &cmd);
1082
1083 /* command failed - roll back lqm_active state */
1084 if (ret) {
1085 mvm_vif->lqm_active =
1086 operation == LQM_CMD_OPERATION_STOP_MEASUREMENT;
1087 }
1088
1089 return ret;
1090 }
1091
1092 static void iwl_mvm_lqm_active_iterator(void *_data, u8 *mac,
1093 struct ieee80211_vif *vif)
1094 {
1095 struct iwl_mvm_vif *mvm_vif = iwl_mvm_vif_from_mac80211(vif);
1096 bool *lqm_active = _data;
1097
1098 *lqm_active = *lqm_active || mvm_vif->lqm_active;
1099 }
1100
1101 bool iwl_mvm_lqm_active(struct iwl_mvm *mvm)
1102 {
1103 bool ret = false;
1104
1105 lockdep_assert_held(&mvm->mutex);
1106 ieee80211_iterate_active_interfaces_atomic(
1107 mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
1108 iwl_mvm_lqm_active_iterator, &ret);
1109
1110 return ret;
1111 }
Linux with added FPC-III support