2 * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
3 * Author:Mark Yao <mark.yao@rock-chips.com>
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #ifndef _ROCKCHIP_DRM_VOP_H
16 #define _ROCKCHIP_DRM_VOP_H
18 enum vop_data_format
{
40 struct vop_reg standby
;
41 struct vop_reg data_blank
;
42 struct vop_reg gate_en
;
43 struct vop_reg mmu_en
;
44 struct vop_reg rgb_en
;
45 struct vop_reg edp_en
;
46 struct vop_reg hdmi_en
;
47 struct vop_reg mipi_en
;
48 struct vop_reg out_mode
;
49 struct vop_reg dither_down
;
50 struct vop_reg dither_up
;
51 struct vop_reg pin_pol
;
52 struct vop_reg rgb_pin_pol
;
53 struct vop_reg hdmi_pin_pol
;
54 struct vop_reg edp_pin_pol
;
55 struct vop_reg mipi_pin_pol
;
57 struct vop_reg htotal_pw
;
58 struct vop_reg hact_st_end
;
59 struct vop_reg vtotal_pw
;
60 struct vop_reg vact_st_end
;
61 struct vop_reg hpost_st_end
;
62 struct vop_reg vpost_st_end
;
64 struct vop_reg line_flag_num
[2];
66 struct vop_reg cfg_done
;
72 struct vop_reg enable
;
74 struct vop_reg status
;
77 struct vop_scl_extension
{
78 struct vop_reg cbcr_vsd_mode
;
79 struct vop_reg cbcr_vsu_mode
;
80 struct vop_reg cbcr_hsd_mode
;
81 struct vop_reg cbcr_ver_scl_mode
;
82 struct vop_reg cbcr_hor_scl_mode
;
83 struct vop_reg yrgb_vsd_mode
;
84 struct vop_reg yrgb_vsu_mode
;
85 struct vop_reg yrgb_hsd_mode
;
86 struct vop_reg yrgb_ver_scl_mode
;
87 struct vop_reg yrgb_hor_scl_mode
;
88 struct vop_reg line_load_mode
;
89 struct vop_reg cbcr_axi_gather_num
;
90 struct vop_reg yrgb_axi_gather_num
;
91 struct vop_reg vsd_cbcr_gt2
;
92 struct vop_reg vsd_cbcr_gt4
;
93 struct vop_reg vsd_yrgb_gt2
;
94 struct vop_reg vsd_yrgb_gt4
;
95 struct vop_reg bic_coe_sel
;
96 struct vop_reg cbcr_axi_gather_en
;
97 struct vop_reg yrgb_axi_gather_en
;
98 struct vop_reg lb_mode
;
101 struct vop_scl_regs
{
102 const struct vop_scl_extension
*ext
;
104 struct vop_reg scale_yrgb_x
;
105 struct vop_reg scale_yrgb_y
;
106 struct vop_reg scale_cbcr_x
;
107 struct vop_reg scale_cbcr_y
;
111 const struct vop_scl_regs
*scl
;
112 const uint32_t *data_formats
;
115 struct vop_reg enable
;
116 struct vop_reg format
;
117 struct vop_reg rb_swap
;
118 struct vop_reg act_info
;
119 struct vop_reg dsp_info
;
120 struct vop_reg dsp_st
;
121 struct vop_reg yrgb_mst
;
122 struct vop_reg uv_mst
;
123 struct vop_reg yrgb_vir
;
124 struct vop_reg uv_vir
;
126 struct vop_reg dst_alpha_ctl
;
127 struct vop_reg src_alpha_ctl
;
130 struct vop_win_data
{
132 const struct vop_win_phy
*phy
;
133 enum drm_plane_type type
;
137 const struct vop_reg_data
*init_table
;
138 unsigned int table_size
;
139 const struct vop_ctrl
*ctrl
;
140 const struct vop_intr
*intr
;
141 const struct vop_win_data
*win
;
142 unsigned int win_size
;
145 /* interrupt define */
146 #define DSP_HOLD_VALID_INTR (1 << 0)
147 #define FS_INTR (1 << 1)
148 #define LINE_FLAG_INTR (1 << 2)
149 #define BUS_ERROR_INTR (1 << 3)
151 #define INTR_MASK (DSP_HOLD_VALID_INTR | FS_INTR | \
152 LINE_FLAG_INTR | BUS_ERROR_INTR)
154 #define DSP_HOLD_VALID_INTR_EN(x) ((x) << 4)
155 #define FS_INTR_EN(x) ((x) << 5)
156 #define LINE_FLAG_INTR_EN(x) ((x) << 6)
157 #define BUS_ERROR_INTR_EN(x) ((x) << 7)
158 #define DSP_HOLD_VALID_INTR_MASK (1 << 4)
159 #define FS_INTR_MASK (1 << 5)
160 #define LINE_FLAG_INTR_MASK (1 << 6)
161 #define BUS_ERROR_INTR_MASK (1 << 7)
163 #define INTR_CLR_SHIFT 8
164 #define DSP_HOLD_VALID_INTR_CLR (1 << (INTR_CLR_SHIFT + 0))
165 #define FS_INTR_CLR (1 << (INTR_CLR_SHIFT + 1))
166 #define LINE_FLAG_INTR_CLR (1 << (INTR_CLR_SHIFT + 2))
167 #define BUS_ERROR_INTR_CLR (1 << (INTR_CLR_SHIFT + 3))
169 #define DSP_LINE_NUM(x) (((x) & 0x1fff) << 12)
170 #define DSP_LINE_NUM_MASK (0x1fff << 12)
172 /* src alpha ctrl define */
173 #define SRC_FADING_VALUE(x) (((x) & 0xff) << 24)
174 #define SRC_GLOBAL_ALPHA(x) (((x) & 0xff) << 16)
175 #define SRC_FACTOR_M0(x) (((x) & 0x7) << 6)
176 #define SRC_ALPHA_CAL_M0(x) (((x) & 0x1) << 5)
177 #define SRC_BLEND_M0(x) (((x) & 0x3) << 3)
178 #define SRC_ALPHA_M0(x) (((x) & 0x1) << 2)
179 #define SRC_COLOR_M0(x) (((x) & 0x1) << 1)
180 #define SRC_ALPHA_EN(x) (((x) & 0x1) << 0)
181 /* dst alpha ctrl define */
182 #define DST_FACTOR_M0(x) (((x) & 0x7) << 6)
185 * display output interface supported by rockchip lcdc
187 #define ROCKCHIP_OUT_MODE_P888 0
188 #define ROCKCHIP_OUT_MODE_P666 1
189 #define ROCKCHIP_OUT_MODE_P565 2
190 /* for use special outface */
191 #define ROCKCHIP_OUT_MODE_AAAA 15
198 enum global_blend_mode
{
201 ALPHA_PER_PIX_GLOBAL
,
204 enum alpha_cal_mode
{
211 ALPHA_SRC_NO_PRE_MUL
,
242 enum scale_down_mode
{
243 SCALE_DOWN_BIL
= 0x0,
247 #define FRAC_16_16(mult, div) (((mult) << 16) / (div))
248 #define SCL_FT_DEFAULT_FIXPOINT_SHIFT 12
249 #define SCL_MAX_VSKIPLINES 4
250 #define MIN_SCL_FT_AFTER_VSKIP 1
252 static inline uint16_t scl_cal_scale(int src
, int dst
, int shift
)
254 return ((src
* 2 - 3) << (shift
- 1)) / (dst
- 1);
257 static inline uint16_t scl_cal_scale2(int src
, int dst
)
259 return ((src
- 1) << 12) / (dst
- 1);
262 #define GET_SCL_FT_BILI_DN(src, dst) scl_cal_scale(src, dst, 12)
263 #define GET_SCL_FT_BILI_UP(src, dst) scl_cal_scale(src, dst, 16)
264 #define GET_SCL_FT_BIC(src, dst) scl_cal_scale(src, dst, 16)
266 static inline uint16_t scl_get_bili_dn_vskip(int src_h
, int dst_h
,
271 act_height
= (src_h
+ vskiplines
- 1) / vskiplines
;
273 return GET_SCL_FT_BILI_DN(act_height
, dst_h
);
276 static inline enum scale_mode
scl_get_scl_mode(int src
, int dst
)
286 static inline int scl_get_vskiplines(uint32_t srch
, uint32_t dsth
)
290 for (vskiplines
= SCL_MAX_VSKIPLINES
; vskiplines
> 1; vskiplines
/= 2)
291 if (srch
>= vskiplines
* dsth
* MIN_SCL_FT_AFTER_VSKIP
)
297 static inline int scl_vop_cal_lb_mode(int width
, bool is_yuv
)
302 lb_mode
= LB_RGB_3840X2
;
303 else if (width
> 1920)
304 lb_mode
= LB_RGB_2560X4
;
306 lb_mode
= LB_RGB_1920X5
;
307 else if (width
> 1280)
308 lb_mode
= LB_YUV_3840X5
;
310 lb_mode
= LB_YUV_2560X8
;
315 extern const struct component_ops vop_component_ops
;
316 #endif /* _ROCKCHIP_DRM_VOP_H */