ARM: dts: add 'dr_mode' property to hsotg devices for exynos boards
[linux/fpc-iii.git] / drivers / clk / clk-max77802.c
blob0729dc723a8ff81099bc9e0071a9784f6fd9e4d3
1 /*
2 * clk-max77802.c - Clock driver for Maxim 77802
4 * Copyright (C) 2014 Google, Inc
6 * Copyright (C) 2012 Samsung Electornics
7 * Jonghwa Lee <jonghwa3.lee@samsung.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * This driver is based on clk-max77686.c
22 #include <linux/kernel.h>
23 #include <linux/slab.h>
24 #include <linux/err.h>
25 #include <linux/platform_device.h>
26 #include <linux/mfd/max77686-private.h>
27 #include <linux/clk-provider.h>
28 #include <linux/mutex.h>
29 #include <linux/clkdev.h>
31 #include <dt-bindings/clock/maxim,max77802.h>
32 #include "clk-max-gen.h"
34 #define MAX77802_CLOCK_OPMODE_MASK 0x1
35 #define MAX77802_CLOCK_LOW_JITTER_SHIFT 0x3
37 static struct clk_init_data max77802_clks_init[MAX77802_CLKS_NUM] = {
38 [MAX77802_CLK_32K_AP] = {
39 .name = "32khz_ap",
40 .ops = &max_gen_clk_ops,
41 .flags = CLK_IS_ROOT,
43 [MAX77802_CLK_32K_CP] = {
44 .name = "32khz_cp",
45 .ops = &max_gen_clk_ops,
46 .flags = CLK_IS_ROOT,
50 static int max77802_clk_probe(struct platform_device *pdev)
52 struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
53 int ret;
55 ret = max_gen_clk_probe(pdev, iodev->regmap, MAX77802_REG_32KHZ,
56 max77802_clks_init, MAX77802_CLKS_NUM);
58 if (ret) {
59 dev_err(&pdev->dev, "generic probe failed %d\n", ret);
60 return ret;
63 /* Enable low-jitter mode on the 32khz clocks. */
64 ret = regmap_update_bits(iodev->regmap, MAX77802_REG_32KHZ,
65 1 << MAX77802_CLOCK_LOW_JITTER_SHIFT,
66 1 << MAX77802_CLOCK_LOW_JITTER_SHIFT);
67 if (ret < 0)
68 dev_err(&pdev->dev, "failed to enable low-jitter mode\n");
70 return ret;
73 static int max77802_clk_remove(struct platform_device *pdev)
75 return max_gen_clk_remove(pdev, MAX77802_CLKS_NUM);
78 static const struct platform_device_id max77802_clk_id[] = {
79 { "max77802-clk", 0},
80 { },
82 MODULE_DEVICE_TABLE(platform, max77802_clk_id);
84 static struct platform_driver max77802_clk_driver = {
85 .driver = {
86 .name = "max77802-clk",
88 .probe = max77802_clk_probe,
89 .remove = max77802_clk_remove,
90 .id_table = max77802_clk_id,
93 module_platform_driver(max77802_clk_driver);
95 MODULE_DESCRIPTION("MAXIM 77802 Clock Driver");
96 MODULE_AUTHOR("Javier Martinez Canillas <javier.martinez@collabora.co.uk>");
97 MODULE_LICENSE("GPL");