drivers/watchdog/booke_wdt.c

   1 /*
   2  * Watchdog timer for PowerPC Book-E systems
   3  *
   4  * Author: Matthew McClintock
   5  * Maintainer: Kumar Gala <galak@kernel.crashing.org>
   6  *
   7  * Copyright 2005, 2008, 2010-2011 Freescale Semiconductor Inc.
   8  *
   9  * This program is free software; you can redistribute  it and/or modify it
  10  * under  the terms of  the GNU General  Public License as published by the
  11  * Free Software Foundation;  either version 2 of the  License, or (at your
  12  * option) any later version.
  13  */
  14
  15 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  16
  17 #include <linux/module.h>
  18 #include <linux/smp.h>
  19 #include <linux/watchdog.h>
  20
  21 #include <asm/reg_booke.h>
  22 #include <asm/time.h>
  23 #include <asm/div64.h>
  24
  25 /* If the kernel parameter wdt=1, the watchdog will be enabled at boot.
  26  * Also, the wdt_period sets the watchdog timer period timeout.
  27  * For E500 cpus the wdt_period sets which bit changing from 0->1 will
  28  * trigger a watchog timeout. This watchdog timeout will occur 3 times, the
  29  * first time nothing will happen, the second time a watchdog exception will
  30  * occur, and the final time the board will reset.
  31  */
  32
  33
  34 #ifdef  CONFIG_PPC_FSL_BOOK3E
  35 #define WDTP(x)         ((((x)&0x3)<<30)|(((x)&0x3c)<<15))
  36 #define WDTP_MASK       (WDTP(0x3f))
  37 #else
  38 #define WDTP(x)         (TCR_WP(x))
  39 #define WDTP_MASK       (TCR_WP_MASK)
  40 #endif
  41
  42 static bool booke_wdt_enabled;
  43 module_param(booke_wdt_enabled, bool, 0);
  44 static int  booke_wdt_period = CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT;
  45 module_param(booke_wdt_period, int, 0);
  46
  47 #ifdef CONFIG_PPC_FSL_BOOK3E
  48
  49 /* For the specified period, determine the number of seconds
  50  * corresponding to the reset time.  There will be a watchdog
  51  * exception at approximately 3/5 of this time.
  52  *
  53  * The formula to calculate this is given by:
  54  * 2.5 * (2^(63-period+1)) / timebase_freq
  55  *
  56  * In order to simplify things, we assume that period is
  57  * at least 1.  This will still result in a very long timeout.
  58  */
  59 static unsigned long long period_to_sec(unsigned int period)
  60 {
  61         unsigned long long tmp = 1ULL << (64 - period);
  62         unsigned long tmp2 = ppc_tb_freq;
  63
  64         /* tmp may be a very large number and we don't want to overflow,
  65          * so divide the timebase freq instead of multiplying tmp
  66          */
  67         tmp2 = tmp2 / 5 * 2;
  68
  69         do_div(tmp, tmp2);
  70         return tmp;
  71 }
  72
  73 /*
  74  * This procedure will find the highest period which will give a timeout
  75  * greater than the one required. e.g. for a bus speed of 66666666 and
  76  * and a parameter of 2 secs, then this procedure will return a value of 38.
  77  */
  78 static unsigned int sec_to_period(unsigned int secs)
  79 {
  80         unsigned int period;
  81         for (period = 63; period > 0; period--) {
  82                 if (period_to_sec(period) >= secs)
  83                         return period;
  84         }
  85         return 0;
  86 }
  87
  88 #define MAX_WDT_TIMEOUT         period_to_sec(1)
  89
  90 #else /* CONFIG_PPC_FSL_BOOK3E */
  91
  92 static unsigned long long period_to_sec(unsigned int period)
  93 {
  94         return period;
  95 }
  96
  97 static unsigned int sec_to_period(unsigned int secs)
  98 {
  99         return secs;
 100 }
 101
 102 #define MAX_WDT_TIMEOUT         3       /* from Kconfig */
 103
 104 #endif /* !CONFIG_PPC_FSL_BOOK3E */
 105
 106 static void __booke_wdt_set(void *data)
 107 {
 108         u32 val;
 109         struct watchdog_device *wdog = data;
 110
 111         val = mfspr(SPRN_TCR);
 112         val &= ~WDTP_MASK;
 113         val |= WDTP(sec_to_period(wdog->timeout));
 114
 115         mtspr(SPRN_TCR, val);
 116 }
 117
 118 static void booke_wdt_set(void *data)
 119 {
 120         on_each_cpu(__booke_wdt_set, data, 0);
 121 }
 122
 123 static void __booke_wdt_ping(void *data)
 124 {
 125         mtspr(SPRN_TSR, TSR_ENW|TSR_WIS);
 126 }
 127
 128 static int booke_wdt_ping(struct watchdog_device *wdog)
 129 {
 130         on_each_cpu(__booke_wdt_ping, NULL, 0);
 131
 132         return 0;
 133 }
 134
 135 static void __booke_wdt_enable(void *data)
 136 {
 137         u32 val;
 138         struct watchdog_device *wdog = data;
 139
 140         /* clear status before enabling watchdog */
 141         __booke_wdt_ping(NULL);
 142         val = mfspr(SPRN_TCR);
 143         val &= ~WDTP_MASK;
 144         val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(sec_to_period(wdog->timeout)));
 145
 146         mtspr(SPRN_TCR, val);
 147 }
 148
 149 /**
 150  * booke_wdt_disable - disable the watchdog on the given CPU
 151  *
 152  * This function is called on each CPU.  It disables the watchdog on that CPU.
 153  *
 154  * TCR[WRC] cannot be changed once it has been set to non-zero, but we can
 155  * effectively disable the watchdog by setting its period to the maximum value.
 156  */
 157 static void __booke_wdt_disable(void *data)
 158 {
 159         u32 val;
 160
 161         val = mfspr(SPRN_TCR);
 162         val &= ~(TCR_WIE | WDTP_MASK);
 163         mtspr(SPRN_TCR, val);
 164
 165         /* clear status to make sure nothing is pending */
 166         __booke_wdt_ping(NULL);
 167
 168 }
 169
 170 static int booke_wdt_start(struct watchdog_device *wdog)
 171 {
 172         on_each_cpu(__booke_wdt_enable, wdog, 0);
 173         pr_debug("watchdog enabled (timeout = %u sec)\n", wdog->timeout);
 174
 175         return 0;
 176 }
 177
 178 static int booke_wdt_stop(struct watchdog_device *wdog)
 179 {
 180         on_each_cpu(__booke_wdt_disable, NULL, 0);
 181         pr_debug("watchdog disabled\n");
 182
 183         return 0;
 184 }
 185
 186 static int booke_wdt_set_timeout(struct watchdog_device *wdt_dev,
 187                                  unsigned int timeout)
 188 {
 189         if (timeout > MAX_WDT_TIMEOUT)
 190                 return -EINVAL;
 191         wdt_dev->timeout = timeout;
 192         booke_wdt_set(wdt_dev);
 193
 194         return 0;
 195 }
 196
 197 static struct watchdog_info booke_wdt_info = {
 198         .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
 199         .identity = "PowerPC Book-E Watchdog",
 200 };
 201
 202 static struct watchdog_ops booke_wdt_ops = {
 203         .owner = THIS_MODULE,
 204         .start = booke_wdt_start,
 205         .stop = booke_wdt_stop,
 206         .ping = booke_wdt_ping,
 207         .set_timeout = booke_wdt_set_timeout,
 208 };
 209
 210 static struct watchdog_device booke_wdt_dev = {
 211         .info = &booke_wdt_info,
 212         .ops = &booke_wdt_ops,
 213         .min_timeout = 1,
 214         .max_timeout = 0xFFFF
 215 };
 216
 217 static void __exit booke_wdt_exit(void)
 218 {
 219         watchdog_unregister_device(&booke_wdt_dev);
 220 }
 221
 222 static int __init booke_wdt_init(void)
 223 {
 224         int ret = 0;
 225         bool nowayout = WATCHDOG_NOWAYOUT;
 226
 227         pr_info("powerpc book-e watchdog driver loaded\n");
 228         booke_wdt_info.firmware_version = cur_cpu_spec->pvr_value;
 229         booke_wdt_set_timeout(&booke_wdt_dev,
 230                               period_to_sec(booke_wdt_period));
 231         watchdog_set_nowayout(&booke_wdt_dev, nowayout);
 232         if (booke_wdt_enabled)
 233                 booke_wdt_start(&booke_wdt_dev);
 234
 235         ret = watchdog_register_device(&booke_wdt_dev);
 236
 237         return ret;
 238 }
 239
 240 module_init(booke_wdt_init);
 241 module_exit(booke_wdt_exit);
 242
 243 MODULE_ALIAS("booke_wdt");
 244 MODULE_DESCRIPTION("PowerPC Book-E watchdog driver");
 245 MODULE_LICENSE("GPL");