ARM: dts: add 'dr_mode' property to hsotg devices for exynos boards
[linux/fpc-iii.git] / drivers / watchdog / sp805_wdt.c
blobc1b03f4235b99807d479672abdc6da0243107837
1 /*
2 * drivers/char/watchdog/sp805-wdt.c
4 * Watchdog driver for ARM SP805 watchdog module
6 * Copyright (C) 2010 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com>
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2 or later. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
14 #include <linux/device.h>
15 #include <linux/resource.h>
16 #include <linux/amba/bus.h>
17 #include <linux/bitops.h>
18 #include <linux/clk.h>
19 #include <linux/io.h>
20 #include <linux/ioport.h>
21 #include <linux/kernel.h>
22 #include <linux/math64.h>
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/pm.h>
26 #include <linux/slab.h>
27 #include <linux/spinlock.h>
28 #include <linux/types.h>
29 #include <linux/watchdog.h>
31 /* default timeout in seconds */
32 #define DEFAULT_TIMEOUT 60
34 #define MODULE_NAME "sp805-wdt"
36 /* watchdog register offsets and masks */
37 #define WDTLOAD 0x000
38 #define LOAD_MIN 0x00000001
39 #define LOAD_MAX 0xFFFFFFFF
40 #define WDTVALUE 0x004
41 #define WDTCONTROL 0x008
42 /* control register masks */
43 #define INT_ENABLE (1 << 0)
44 #define RESET_ENABLE (1 << 1)
45 #define WDTINTCLR 0x00C
46 #define WDTRIS 0x010
47 #define WDTMIS 0x014
48 #define INT_MASK (1 << 0)
49 #define WDTLOCK 0xC00
50 #define UNLOCK 0x1ACCE551
51 #define LOCK 0x00000001
53 /**
54 * struct sp805_wdt: sp805 wdt device structure
55 * @wdd: instance of struct watchdog_device
56 * @lock: spin lock protecting dev structure and io access
57 * @base: base address of wdt
58 * @clk: clock structure of wdt
59 * @adev: amba device structure of wdt
60 * @status: current status of wdt
61 * @load_val: load value to be set for current timeout
63 struct sp805_wdt {
64 struct watchdog_device wdd;
65 spinlock_t lock;
66 void __iomem *base;
67 struct clk *clk;
68 struct amba_device *adev;
69 unsigned int load_val;
72 static bool nowayout = WATCHDOG_NOWAYOUT;
73 module_param(nowayout, bool, 0);
74 MODULE_PARM_DESC(nowayout,
75 "Set to 1 to keep watchdog running after device release");
77 /* This routine finds load value that will reset system in required timout */
78 static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
80 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
81 u64 load, rate;
83 rate = clk_get_rate(wdt->clk);
86 * sp805 runs counter with given value twice, after the end of first
87 * counter it gives an interrupt and then starts counter again. If
88 * interrupt already occurred then it resets the system. This is why
89 * load is half of what should be required.
91 load = div_u64(rate, 2) * timeout - 1;
93 load = (load > LOAD_MAX) ? LOAD_MAX : load;
94 load = (load < LOAD_MIN) ? LOAD_MIN : load;
96 spin_lock(&wdt->lock);
97 wdt->load_val = load;
98 /* roundup timeout to closest positive integer value */
99 wdd->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
100 spin_unlock(&wdt->lock);
102 return 0;
105 /* returns number of seconds left for reset to occur */
106 static unsigned int wdt_timeleft(struct watchdog_device *wdd)
108 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
109 u64 load, rate;
111 rate = clk_get_rate(wdt->clk);
113 spin_lock(&wdt->lock);
114 load = readl_relaxed(wdt->base + WDTVALUE);
116 /*If the interrupt is inactive then time left is WDTValue + WDTLoad. */
117 if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK))
118 load += wdt->load_val + 1;
119 spin_unlock(&wdt->lock);
121 return div_u64(load, rate);
124 static int wdt_config(struct watchdog_device *wdd, bool ping)
126 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
127 int ret;
129 if (!ping) {
131 ret = clk_prepare_enable(wdt->clk);
132 if (ret) {
133 dev_err(&wdt->adev->dev, "clock enable fail");
134 return ret;
138 spin_lock(&wdt->lock);
140 writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
141 writel_relaxed(wdt->load_val, wdt->base + WDTLOAD);
143 if (!ping) {
144 writel_relaxed(INT_MASK, wdt->base + WDTINTCLR);
145 writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base +
146 WDTCONTROL);
149 writel_relaxed(LOCK, wdt->base + WDTLOCK);
151 /* Flush posted writes. */
152 readl_relaxed(wdt->base + WDTLOCK);
153 spin_unlock(&wdt->lock);
155 return 0;
158 static int wdt_ping(struct watchdog_device *wdd)
160 return wdt_config(wdd, true);
163 /* enables watchdog timers reset */
164 static int wdt_enable(struct watchdog_device *wdd)
166 return wdt_config(wdd, false);
169 /* disables watchdog timers reset */
170 static int wdt_disable(struct watchdog_device *wdd)
172 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
174 spin_lock(&wdt->lock);
176 writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
177 writel_relaxed(0, wdt->base + WDTCONTROL);
178 writel_relaxed(LOCK, wdt->base + WDTLOCK);
180 /* Flush posted writes. */
181 readl_relaxed(wdt->base + WDTLOCK);
182 spin_unlock(&wdt->lock);
184 clk_disable_unprepare(wdt->clk);
186 return 0;
189 static const struct watchdog_info wdt_info = {
190 .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
191 .identity = MODULE_NAME,
194 static const struct watchdog_ops wdt_ops = {
195 .owner = THIS_MODULE,
196 .start = wdt_enable,
197 .stop = wdt_disable,
198 .ping = wdt_ping,
199 .set_timeout = wdt_setload,
200 .get_timeleft = wdt_timeleft,
203 static int
204 sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
206 struct sp805_wdt *wdt;
207 int ret = 0;
209 wdt = devm_kzalloc(&adev->dev, sizeof(*wdt), GFP_KERNEL);
210 if (!wdt) {
211 ret = -ENOMEM;
212 goto err;
215 wdt->base = devm_ioremap_resource(&adev->dev, &adev->res);
216 if (IS_ERR(wdt->base))
217 return PTR_ERR(wdt->base);
219 wdt->clk = devm_clk_get(&adev->dev, NULL);
220 if (IS_ERR(wdt->clk)) {
221 dev_warn(&adev->dev, "Clock not found\n");
222 ret = PTR_ERR(wdt->clk);
223 goto err;
226 wdt->adev = adev;
227 wdt->wdd.info = &wdt_info;
228 wdt->wdd.ops = &wdt_ops;
230 spin_lock_init(&wdt->lock);
231 watchdog_set_nowayout(&wdt->wdd, nowayout);
232 watchdog_set_drvdata(&wdt->wdd, wdt);
233 wdt_setload(&wdt->wdd, DEFAULT_TIMEOUT);
235 ret = watchdog_register_device(&wdt->wdd);
236 if (ret) {
237 dev_err(&adev->dev, "watchdog_register_device() failed: %d\n",
238 ret);
239 goto err;
241 amba_set_drvdata(adev, wdt);
243 dev_info(&adev->dev, "registration successful\n");
244 return 0;
246 err:
247 dev_err(&adev->dev, "Probe Failed!!!\n");
248 return ret;
251 static int sp805_wdt_remove(struct amba_device *adev)
253 struct sp805_wdt *wdt = amba_get_drvdata(adev);
255 watchdog_unregister_device(&wdt->wdd);
256 watchdog_set_drvdata(&wdt->wdd, NULL);
258 return 0;
261 static int __maybe_unused sp805_wdt_suspend(struct device *dev)
263 struct sp805_wdt *wdt = dev_get_drvdata(dev);
265 if (watchdog_active(&wdt->wdd))
266 return wdt_disable(&wdt->wdd);
268 return 0;
271 static int __maybe_unused sp805_wdt_resume(struct device *dev)
273 struct sp805_wdt *wdt = dev_get_drvdata(dev);
275 if (watchdog_active(&wdt->wdd))
276 return wdt_enable(&wdt->wdd);
278 return 0;
281 static SIMPLE_DEV_PM_OPS(sp805_wdt_dev_pm_ops, sp805_wdt_suspend,
282 sp805_wdt_resume);
284 static struct amba_id sp805_wdt_ids[] = {
286 .id = 0x00141805,
287 .mask = 0x00ffffff,
289 { 0, 0 },
292 MODULE_DEVICE_TABLE(amba, sp805_wdt_ids);
294 static struct amba_driver sp805_wdt_driver = {
295 .drv = {
296 .name = MODULE_NAME,
297 .pm = &sp805_wdt_dev_pm_ops,
299 .id_table = sp805_wdt_ids,
300 .probe = sp805_wdt_probe,
301 .remove = sp805_wdt_remove,
304 module_amba_driver(sp805_wdt_driver);
306 MODULE_AUTHOR("Viresh Kumar <viresh.linux@gmail.com>");
307 MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
308 MODULE_LICENSE("GPL");