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cgroup: reimplement rebind_subsystems() using cgroup_apply_control() and friends
[linux/fpc-iii.git] / sound / pci / emu10k1 / emu10k1_main.c
blob28e2f8b42f5e8e4e7f3aaaaa88f45d6834b02591
1 /*
2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3 * Creative Labs, Inc.
4 * Routines for control of EMU10K1 chips
5 *
6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
7 * Added support for Audigy 2 Value.
8 * Added EMU 1010 support.
9 * General bug fixes and enhancements.
10 *
11 *
12 * BUGS:
13 * --
14 *
15 * TODO:
16 * --
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 *
32 */
33
34 #include <linux/sched.h>
35 #include <linux/kthread.h>
36 #include <linux/delay.h>
37 #include <linux/init.h>
38 #include <linux/module.h>
39 #include <linux/interrupt.h>
40 #include <linux/pci.h>
41 #include <linux/slab.h>
42 #include <linux/vmalloc.h>
43 #include <linux/mutex.h>
44
45
46 #include <sound/core.h>
47 #include <sound/emu10k1.h>
48 #include <linux/firmware.h>
49 #include "p16v.h"
50 #include "tina2.h"
51 #include "p17v.h"
52
53
54 #define HANA_FILENAME "emu/hana.fw"
55 #define DOCK_FILENAME "emu/audio_dock.fw"
56 #define EMU1010B_FILENAME "emu/emu1010b.fw"
57 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
58 #define EMU0404_FILENAME "emu/emu0404.fw"
59 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
60
61 MODULE_FIRMWARE(HANA_FILENAME);
62 MODULE_FIRMWARE(DOCK_FILENAME);
63 MODULE_FIRMWARE(EMU1010B_FILENAME);
64 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
65 MODULE_FIRMWARE(EMU0404_FILENAME);
66 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
67
68
69 /*************************************************************************
70 * EMU10K1 init / done
71 *************************************************************************/
72
73 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
74 {
75 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
76 snd_emu10k1_ptr_write(emu, IP, ch, 0);
77 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
78 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
79 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
80 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
81 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
82
83 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
84 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
85 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
86 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
87 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
88 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
89
90 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
91 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
92 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
93 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
94 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
95 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
96 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
97 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
98
99 /*** these are last so OFF prevents writing ***/
100 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
101 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
102 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
103 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
104 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
105
106 /* Audigy extra stuffs */
107 if (emu->audigy) {
108 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
109 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
110 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
111 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
112 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
113 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
114 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
115 }
116 }
117
118 static unsigned int spi_dac_init[] = {
119 0x00ff,
120 0x02ff,
121 0x0400,
122 0x0520,
123 0x0600,
124 0x08ff,
125 0x0aff,
126 0x0cff,
127 0x0eff,
128 0x10ff,
129 0x1200,
130 0x1400,
131 0x1480,
132 0x1800,
133 0x1aff,
134 0x1cff,
135 0x1e00,
136 0x0530,
137 0x0602,
138 0x0622,
139 0x1400,
140 };
141
142 static unsigned int i2c_adc_init[][2] = {
143 { 0x17, 0x00 }, /* Reset */
144 { 0x07, 0x00 }, /* Timeout */
145 { 0x0b, 0x22 }, /* Interface control */
146 { 0x0c, 0x22 }, /* Master mode control */
147 { 0x0d, 0x08 }, /* Powerdown control */
148 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
149 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
150 { 0x10, 0x7b }, /* ALC Control 1 */
151 { 0x11, 0x00 }, /* ALC Control 2 */
152 { 0x12, 0x32 }, /* ALC Control 3 */
153 { 0x13, 0x00 }, /* Noise gate control */
154 { 0x14, 0xa6 }, /* Limiter control */
155 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */
156 };
157
158 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
159 {
160 unsigned int silent_page;
161 int ch;
162 u32 tmp;
163
164 /* disable audio and lock cache */
165 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
166 HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
167
168 /* reset recording buffers */
169 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
170 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
171 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
172 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
173 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
174 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
175
176 /* disable channel interrupt */
177 outl(0, emu->port + INTE);
178 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
179 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
180 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
181 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
182
183 if (emu->audigy) {
184 /* set SPDIF bypass mode */
185 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
186 /* enable rear left + rear right AC97 slots */
187 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
188 AC97SLOT_REAR_LEFT);
189 }
190
191 /* init envelope engine */
192 for (ch = 0; ch < NUM_G; ch++)
193 snd_emu10k1_voice_init(emu, ch);
194
195 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
196 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
197 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
198
199 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
200 /* Hacks for Alice3 to work independent of haP16V driver */
201 /* Setup SRCMulti_I2S SamplingRate */
202 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
203 tmp &= 0xfffff1ff;
204 tmp |= (0x2<<9);
205 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
206
207 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
208 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
209 /* Setup SRCMulti Input Audio Enable */
210 /* Use 0xFFFFFFFF to enable P16V sounds. */
211 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
212
213 /* Enabled Phased (8-channel) P16V playback */
214 outl(0x0201, emu->port + HCFG2);
215 /* Set playback routing. */
216 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
217 }
218 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
219 /* Hacks for Alice3 to work independent of haP16V driver */
220 dev_info(emu->card->dev, "Audigy2 value: Special config.\n");
221 /* Setup SRCMulti_I2S SamplingRate */
222 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
223 tmp &= 0xfffff1ff;
224 tmp |= (0x2<<9);
225 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
226
227 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
228 outl(0x600000, emu->port + 0x20);
229 outl(0x14, emu->port + 0x24);
230
231 /* Setup SRCMulti Input Audio Enable */
232 outl(0x7b0000, emu->port + 0x20);
233 outl(0xFF000000, emu->port + 0x24);
234
235 /* Setup SPDIF Out Audio Enable */
236 /* The Audigy 2 Value has a separate SPDIF out,
237 * so no need for a mixer switch
238 */
239 outl(0x7a0000, emu->port + 0x20);
240 outl(0xFF000000, emu->port + 0x24);
241 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
242 outl(tmp, emu->port + A_IOCFG);
243 }
244 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
245 int size, n;
246
247 size = ARRAY_SIZE(spi_dac_init);
248 for (n = 0; n < size; n++)
249 snd_emu10k1_spi_write(emu, spi_dac_init[n]);
250
251 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
252 /* Enable GPIOs
253 * GPIO0: Unknown
254 * GPIO1: Speakers-enabled.
255 * GPIO2: Unknown
256 * GPIO3: Unknown
257 * GPIO4: IEC958 Output on.
258 * GPIO5: Unknown
259 * GPIO6: Unknown
260 * GPIO7: Unknown
261 */
262 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
263 }
264 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
265 int size, n;
266
267 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
268 tmp = inl(emu->port + A_IOCFG);
269 outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
270 tmp = inl(emu->port + A_IOCFG);
271 size = ARRAY_SIZE(i2c_adc_init);
272 for (n = 0; n < size; n++)
273 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
274 for (n = 0; n < 4; n++) {
275 emu->i2c_capture_volume[n][0] = 0xcf;
276 emu->i2c_capture_volume[n][1] = 0xcf;
277 }
278 }
279
280
281 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
282 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
283 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
284
285 silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0);
286 for (ch = 0; ch < NUM_G; ch++) {
287 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
288 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
289 }
290
291 if (emu->card_capabilities->emu_model) {
292 outl(HCFG_AUTOMUTE_ASYNC |
293 HCFG_EMU32_SLAVE |
294 HCFG_AUDIOENABLE, emu->port + HCFG);
295 /*
296 * Hokay, setup HCFG
297 * Mute Disable Audio = 0
298 * Lock Tank Memory = 1
299 * Lock Sound Memory = 0
300 * Auto Mute = 1
301 */
302 } else if (emu->audigy) {
303 if (emu->revision == 4) /* audigy2 */
304 outl(HCFG_AUDIOENABLE |
305 HCFG_AC3ENABLE_CDSPDIF |
306 HCFG_AC3ENABLE_GPSPDIF |
307 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
308 else
309 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
310 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
311 * e.g. card_capabilities->joystick */
312 } else if (emu->model == 0x20 ||
313 emu->model == 0xc400 ||
314 (emu->model == 0x21 && emu->revision < 6))
315 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
316 else
317 /* With on-chip joystick */
318 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
319
320 if (enable_ir) { /* enable IR for SB Live */
321 if (emu->card_capabilities->emu_model) {
322 ; /* Disable all access to A_IOCFG for the emu1010 */
323 } else if (emu->card_capabilities->i2c_adc) {
324 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
325 } else if (emu->audigy) {
326 unsigned int reg = inl(emu->port + A_IOCFG);
327 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
328 udelay(500);
329 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
330 udelay(100);
331 outl(reg, emu->port + A_IOCFG);
332 } else {
333 unsigned int reg = inl(emu->port + HCFG);
334 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
335 udelay(500);
336 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
337 udelay(100);
338 outl(reg, emu->port + HCFG);
339 }
340 }
341
342 if (emu->card_capabilities->emu_model) {
343 ; /* Disable all access to A_IOCFG for the emu1010 */
344 } else if (emu->card_capabilities->i2c_adc) {
345 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
346 } else if (emu->audigy) { /* enable analog output */
347 unsigned int reg = inl(emu->port + A_IOCFG);
348 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
349 }
350
351 if (emu->address_mode == 0) {
352 /* use 16M in 4G */
353 outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG);
354 }
355
356 return 0;
357 }
358
359 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
360 {
361 /*
362 * Enable the audio bit
363 */
364 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
365
366 /* Enable analog/digital outs on audigy */
367 if (emu->card_capabilities->emu_model) {
368 ; /* Disable all access to A_IOCFG for the emu1010 */
369 } else if (emu->card_capabilities->i2c_adc) {
370 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
371 } else if (emu->audigy) {
372 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
373
374 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
375 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
376 * This has to be done after init ALice3 I2SOut beyond 48KHz.
377 * So, sequence is important. */
378 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
379 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
380 /* Unmute Analog now. */
381 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
382 } else {
383 /* Disable routing from AC97 line out to Front speakers */
384 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
385 }
386 }
387
388 #if 0
389 {
390 unsigned int tmp;
391 /* FIXME: the following routine disables LiveDrive-II !! */
392 /* TOSLink detection */
393 emu->tos_link = 0;
394 tmp = inl(emu->port + HCFG);
395 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
396 outl(tmp|0x800, emu->port + HCFG);
397 udelay(50);
398 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
399 emu->tos_link = 1;
400 outl(tmp, emu->port + HCFG);
401 }
402 }
403 }
404 #endif
405
406 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
407 }
408
409 int snd_emu10k1_done(struct snd_emu10k1 *emu)
410 {
411 int ch;
412
413 outl(0, emu->port + INTE);
414
415 /*
416 * Shutdown the chip
417 */
418 for (ch = 0; ch < NUM_G; ch++)
419 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
420 for (ch = 0; ch < NUM_G; ch++) {
421 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
422 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
423 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
424 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
425 }
426
427 /* reset recording buffers */
428 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
429 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
430 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
431 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
432 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
433 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
434 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
435 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
436 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
437 if (emu->audigy)
438 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
439 else
440 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
441
442 /* disable channel interrupt */
443 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
444 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
445 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
446 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
447
448 /* disable audio and lock cache */
449 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
450 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
451
452 return 0;
453 }
454
455 /*************************************************************************
456 * ECARD functional implementation
457 *************************************************************************/
458
459 /* In A1 Silicon, these bits are in the HC register */
460 #define HOOKN_BIT (1L << 12)
461 #define HANDN_BIT (1L << 11)
462 #define PULSEN_BIT (1L << 10)
463
464 #define EC_GDI1 (1 << 13)
465 #define EC_GDI0 (1 << 14)
466
467 #define EC_NUM_CONTROL_BITS 20
468
469 #define EC_AC3_DATA_SELN 0x0001L
470 #define EC_EE_DATA_SEL 0x0002L
471 #define EC_EE_CNTRL_SELN 0x0004L
472 #define EC_EECLK 0x0008L
473 #define EC_EECS 0x0010L
474 #define EC_EESDO 0x0020L
475 #define EC_TRIM_CSN 0x0040L
476 #define EC_TRIM_SCLK 0x0080L
477 #define EC_TRIM_SDATA 0x0100L
478 #define EC_TRIM_MUTEN 0x0200L
479 #define EC_ADCCAL 0x0400L
480 #define EC_ADCRSTN 0x0800L
481 #define EC_DACCAL 0x1000L
482 #define EC_DACMUTEN 0x2000L
483 #define EC_LEDN 0x4000L
484
485 #define EC_SPDIF0_SEL_SHIFT 15
486 #define EC_SPDIF1_SEL_SHIFT 17
487 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
488 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
489 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
490 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
491 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
492 * be incremented any time the EEPROM's
493 * format is changed. */
494
495 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
496
497 /* Addresses for special values stored in to EEPROM */
498 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
499 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
500 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
501
502 #define EC_LAST_PROMFILE_ADDR 0x2f
503
504 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
505 * can be up to 30 characters in length
506 * and is stored as a NULL-terminated
507 * ASCII string. Any unused bytes must be
508 * filled with zeros */
509 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
510
511
512 /* Most of this stuff is pretty self-evident. According to the hardware
513 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
514 * offset problem. Weird.
515 */
516 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
517 EC_TRIM_CSN)
518
519
520 #define EC_DEFAULT_ADC_GAIN 0xC4C4
521 #define EC_DEFAULT_SPDIF0_SEL 0x0
522 #define EC_DEFAULT_SPDIF1_SEL 0x4
523
524 /**************************************************************************
525 * @func Clock bits into the Ecard's control latch. The Ecard uses a
526 * control latch will is loaded bit-serially by toggling the Modem control
527 * lines from function 2 on the E8010. This function hides these details
528 * and presents the illusion that we are actually writing to a distinct
529 * register.
530 */
531
532 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
533 {
534 unsigned short count;
535 unsigned int data;
536 unsigned long hc_port;
537 unsigned int hc_value;
538
539 hc_port = emu->port + HCFG;
540 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
541 outl(hc_value, hc_port);
542
543 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
544
545 /* Set up the value */
546 data = ((value & 0x1) ? PULSEN_BIT : 0);
547 value >>= 1;
548
549 outl(hc_value | data, hc_port);
550
551 /* Clock the shift register */
552 outl(hc_value | data | HANDN_BIT, hc_port);
553 outl(hc_value | data, hc_port);
554 }
555
556 /* Latch the bits */
557 outl(hc_value | HOOKN_BIT, hc_port);
558 outl(hc_value, hc_port);
559 }
560
561 /**************************************************************************
562 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
563 * trim value consists of a 16bit value which is composed of two
564 * 8 bit gain/trim values, one for the left channel and one for the
565 * right channel. The following table maps from the Gain/Attenuation
566 * value in decibels into the corresponding bit pattern for a single
567 * channel.
568 */
569
570 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
571 unsigned short gain)
572 {
573 unsigned int bit;
574
575 /* Enable writing to the TRIM registers */
576 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
577
578 /* Do it again to insure that we meet hold time requirements */
579 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
580
581 for (bit = (1 << 15); bit; bit >>= 1) {
582 unsigned int value;
583
584 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
585
586 if (gain & bit)
587 value |= EC_TRIM_SDATA;
588
589 /* Clock the bit */
590 snd_emu10k1_ecard_write(emu, value);
591 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
592 snd_emu10k1_ecard_write(emu, value);
593 }
594
595 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
596 }
597
598 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
599 {
600 unsigned int hc_value;
601
602 /* Set up the initial settings */
603 emu->ecard_ctrl = EC_RAW_RUN_MODE |
604 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
605 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
606
607 /* Step 0: Set the codec type in the hardware control register
608 * and enable audio output */
609 hc_value = inl(emu->port + HCFG);
610 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
611 inl(emu->port + HCFG);
612
613 /* Step 1: Turn off the led and deassert TRIM_CS */
614 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
615
616 /* Step 2: Calibrate the ADC and DAC */
617 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
618
619 /* Step 3: Wait for awhile; XXX We can't get away with this
620 * under a real operating system; we'll need to block and wait that
621 * way. */
622 snd_emu10k1_wait(emu, 48000);
623
624 /* Step 4: Switch off the DAC and ADC calibration. Note
625 * That ADC_CAL is actually an inverted signal, so we assert
626 * it here to stop calibration. */
627 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
628
629 /* Step 4: Switch into run mode */
630 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
631
632 /* Step 5: Set the analog input gain */
633 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
634
635 return 0;
636 }
637
638 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
639 {
640 unsigned long special_port;
641 unsigned int value;
642
643 /* Special initialisation routine
644 * before the rest of the IO-Ports become active.
645 */
646 special_port = emu->port + 0x38;
647 value = inl(special_port);
648 outl(0x00d00000, special_port);
649 value = inl(special_port);
650 outl(0x00d00001, special_port);
651 value = inl(special_port);
652 outl(0x00d0005f, special_port);
653 value = inl(special_port);
654 outl(0x00d0007f, special_port);
655 value = inl(special_port);
656 outl(0x0090007f, special_port);
657 value = inl(special_port);
658
659 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
660 /* Delay to give time for ADC chip to switch on. It needs 113ms */
661 msleep(200);
662 return 0;
663 }
664
665 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu,
666 const struct firmware *fw_entry)
667 {
668 int n, i;
669 int reg;
670 int value;
671 unsigned int write_post;
672 unsigned long flags;
673
674 if (!fw_entry)
675 return -EIO;
676
677 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
678 /* GPIO7 -> FPGA PGMN
679 * GPIO6 -> FPGA CCLK
680 * GPIO5 -> FPGA DIN
681 * FPGA CONFIG OFF -> FPGA PGMN
682 */
683 spin_lock_irqsave(&emu->emu_lock, flags);
684 outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
685 write_post = inl(emu->port + A_IOCFG);
686 udelay(100);
687 outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
688 write_post = inl(emu->port + A_IOCFG);
689 udelay(100); /* Allow FPGA memory to clean */
690 for (n = 0; n < fw_entry->size; n++) {
691 value = fw_entry->data[n];
692 for (i = 0; i < 8; i++) {
693 reg = 0x80;
694 if (value & 0x1)
695 reg = reg | 0x20;
696 value = value >> 1;
697 outl(reg, emu->port + A_IOCFG);
698 write_post = inl(emu->port + A_IOCFG);
699 outl(reg | 0x40, emu->port + A_IOCFG);
700 write_post = inl(emu->port + A_IOCFG);
701 }
702 }
703 /* After programming, set GPIO bit 4 high again. */
704 outl(0x10, emu->port + A_IOCFG);
705 write_post = inl(emu->port + A_IOCFG);
706 spin_unlock_irqrestore(&emu->emu_lock, flags);
707
708 return 0;
709 }
710
711 static int emu1010_firmware_thread(void *data)
712 {
713 struct snd_emu10k1 *emu = data;
714 u32 tmp, tmp2, reg;
715 u32 last_reg = 0;
716 int err;
717
718 for (;;) {
719 /* Delay to allow Audio Dock to settle */
720 msleep_interruptible(1000);
721 if (kthread_should_stop())
722 break;
723 #ifdef CONFIG_PM_SLEEP
724 if (emu->suspend)
725 continue;
726 #endif
727 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */
728 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg); /* OPTIONS: Which cards are attached to the EMU */
729 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
730 /* Audio Dock attached */
731 /* Return to Audio Dock programming mode */
732 dev_info(emu->card->dev,
733 "emu1010: Loading Audio Dock Firmware\n");
734 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK);
735
736 if (!emu->dock_fw) {
737 const char *filename = NULL;
738 switch (emu->card_capabilities->emu_model) {
739 case EMU_MODEL_EMU1010:
740 filename = DOCK_FILENAME;
741 break;
742 case EMU_MODEL_EMU1010B:
743 filename = MICRO_DOCK_FILENAME;
744 break;
745 case EMU_MODEL_EMU1616:
746 filename = MICRO_DOCK_FILENAME;
747 break;
748 }
749 if (filename) {
750 err = request_firmware(&emu->dock_fw,
751 filename,
752 &emu->pci->dev);
753 if (err)
754 continue;
755 }
756 }
757
758 if (emu->dock_fw) {
759 err = snd_emu1010_load_firmware(emu, emu->dock_fw);
760 if (err)
761 continue;
762 }
763
764 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
765 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg);
766 dev_info(emu->card->dev,
767 "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n",
768 reg);
769 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
770 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
771 dev_info(emu->card->dev,
772 "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", reg);
773 if ((reg & 0x1f) != 0x15) {
774 /* FPGA failed to be programmed */
775 dev_info(emu->card->dev,
776 "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n",
777 reg);
778 continue;
779 }
780 dev_info(emu->card->dev,
781 "emu1010: Audio Dock Firmware loaded\n");
782 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
783 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
784 dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n",
785 tmp, tmp2);
786 /* Sync clocking between 1010 and Dock */
787 /* Allow DLL to settle */
788 msleep(10);
789 /* Unmute all. Default is muted after a firmware load */
790 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
791 } else if (!reg && last_reg) {
792 /* Audio Dock removed */
793 dev_info(emu->card->dev,
794 "emu1010: Audio Dock detached\n");
795 /* Unmute all */
796 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
797 }
798
799 last_reg = reg;
800 }
801 dev_info(emu->card->dev, "emu1010: firmware thread stopping\n");
802 return 0;
803 }
804
805 /*
806 * EMU-1010 - details found out from this driver, official MS Win drivers,
807 * testing the card:
808 *
809 * Audigy2 (aka Alice2):
810 * ---------------------
811 * * communication over PCI
812 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA
813 * to 2 x 16-bit, using internal DSP instructions
814 * * slave mode, clock supplied by HANA
815 * * linked to HANA using:
816 * 32 x 32-bit serial EMU32 output channels
817 * 16 x EMU32 input channels
818 * (?) x I2S I/O channels (?)
819 *
820 * FPGA (aka HANA):
821 * ---------------
822 * * provides all (?) physical inputs and outputs of the card
823 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
824 * * provides clock signal for the card and Alice2
825 * * two crystals - for 44.1kHz and 48kHz multiples
826 * * provides internal routing of signal sources to signal destinations
827 * * inputs/outputs to Alice2 - see above
828 *
829 * Current status of the driver:
830 * ----------------------------
831 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
832 * * PCM device nb. 2:
833 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
834 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
835 */
836 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
837 {
838 unsigned int i;
839 u32 tmp, tmp2, reg;
840 int err;
841
842 dev_info(emu->card->dev, "emu1010: Special config.\n");
843 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
844 * Lock Sound Memory Cache, Lock Tank Memory Cache,
845 * Mute all codecs.
846 */
847 outl(0x0005a00c, emu->port + HCFG);
848 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
849 * Lock Tank Memory Cache,
850 * Mute all codecs.
851 */
852 outl(0x0005a004, emu->port + HCFG);
853 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
854 * Mute all codecs.
855 */
856 outl(0x0005a000, emu->port + HCFG);
857 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
858 * Mute all codecs.
859 */
860 outl(0x0005a000, emu->port + HCFG);
861
862 /* Disable 48Volt power to Audio Dock */
863 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
864
865 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
866 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
867 dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg);
868 if ((reg & 0x3f) == 0x15) {
869 /* FPGA netlist already present so clear it */
870 /* Return to programming mode */
871
872 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02);
873 }
874 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
875 dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg);
876 if ((reg & 0x3f) == 0x15) {
877 /* FPGA failed to return to programming mode */
878 dev_info(emu->card->dev,
879 "emu1010: FPGA failed to return to programming mode\n");
880 return -ENODEV;
881 }
882 dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg);
883
884 if (!emu->firmware) {
885 const char *filename;
886 switch (emu->card_capabilities->emu_model) {
887 case EMU_MODEL_EMU1010:
888 filename = HANA_FILENAME;
889 break;
890 case EMU_MODEL_EMU1010B:
891 filename = EMU1010B_FILENAME;
892 break;
893 case EMU_MODEL_EMU1616:
894 filename = EMU1010_NOTEBOOK_FILENAME;
895 break;
896 case EMU_MODEL_EMU0404:
897 filename = EMU0404_FILENAME;
898 break;
899 default:
900 return -ENODEV;
901 }
902
903 err = request_firmware(&emu->firmware, filename, &emu->pci->dev);
904 if (err != 0) {
905 dev_info(emu->card->dev,
906 "emu1010: firmware: %s not found. Err = %d\n",
907 filename, err);
908 return err;
909 }
910 dev_info(emu->card->dev,
911 "emu1010: firmware file = %s, size = 0x%zx\n",
912 filename, emu->firmware->size);
913 }
914
915 err = snd_emu1010_load_firmware(emu, emu->firmware);
916 if (err != 0) {
917 dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n");
918 return err;
919 }
920
921 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
922 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
923 if ((reg & 0x3f) != 0x15) {
924 /* FPGA failed to be programmed */
925 dev_info(emu->card->dev,
926 "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n",
927 reg);
928 return -ENODEV;
929 }
930
931 dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n");
932 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
933 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
934 dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2);
935 /* Enable 48Volt power to Audio Dock */
936 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
937
938 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
939 dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
940 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
941 dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
942 snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp);
943 /* Optical -> ADAT I/O */
944 /* 0 : SPDIF
945 * 1 : ADAT
946 */
947 emu->emu1010.optical_in = 1; /* IN_ADAT */
948 emu->emu1010.optical_out = 1; /* IN_ADAT */
949 tmp = 0;
950 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
951 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
952 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
953 snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp);
954 /* Set no attenuation on Audio Dock pads. */
955 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00);
956 emu->emu1010.adc_pads = 0x00;
957 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
958 /* Unmute Audio dock DACs, Headphone source DAC-4. */
959 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
960 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
961 snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp);
962 /* DAC PADs. */
963 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f);
964 emu->emu1010.dac_pads = 0x0f;
965 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
966 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
967 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
968 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
969 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10);
970 /* MIDI routing */
971 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
972 /* Unknown. */
973 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
974 /* IRQ Enable: All on */
975 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
976 /* IRQ Enable: All off */
977 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
978
979 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
980 dev_info(emu->card->dev, "emu1010: Card options3 = 0x%x\n", reg);
981 /* Default WCLK set to 48kHz. */
982 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00);
983 /* Word Clock source, Internal 48kHz x1 */
984 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
985 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
986 /* Audio Dock LEDs. */
987 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
988
989 #if 0
990 /* For 96kHz */
991 snd_emu1010_fpga_link_dst_src_write(emu,
992 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
993 snd_emu1010_fpga_link_dst_src_write(emu,
994 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
995 snd_emu1010_fpga_link_dst_src_write(emu,
996 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
997 snd_emu1010_fpga_link_dst_src_write(emu,
998 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
999 #endif
1000 #if 0
1001 /* For 192kHz */
1002 snd_emu1010_fpga_link_dst_src_write(emu,
1003 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
1004 snd_emu1010_fpga_link_dst_src_write(emu,
1005 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
1006 snd_emu1010_fpga_link_dst_src_write(emu,
1007 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
1008 snd_emu1010_fpga_link_dst_src_write(emu,
1009 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
1010 snd_emu1010_fpga_link_dst_src_write(emu,
1011 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
1012 snd_emu1010_fpga_link_dst_src_write(emu,
1013 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
1014 snd_emu1010_fpga_link_dst_src_write(emu,
1015 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
1016 snd_emu1010_fpga_link_dst_src_write(emu,
1017 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
1018 #endif
1019 #if 1
1020 /* For 48kHz */
1021 snd_emu1010_fpga_link_dst_src_write(emu,
1022 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
1023 snd_emu1010_fpga_link_dst_src_write(emu,
1024 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
1025 snd_emu1010_fpga_link_dst_src_write(emu,
1026 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
1027 snd_emu1010_fpga_link_dst_src_write(emu,
1028 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
1029 snd_emu1010_fpga_link_dst_src_write(emu,
1030 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
1031 snd_emu1010_fpga_link_dst_src_write(emu,
1032 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
1033 snd_emu1010_fpga_link_dst_src_write(emu,
1034 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
1035 snd_emu1010_fpga_link_dst_src_write(emu,
1036 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
1037 /* Pavel Hofman - setting defaults for 8 more capture channels
1038 * Defaults only, users will set their own values anyways, let's
1039 * just copy/paste.
1040 */
1041
1042 snd_emu1010_fpga_link_dst_src_write(emu,
1043 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
1044 snd_emu1010_fpga_link_dst_src_write(emu,
1045 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
1046 snd_emu1010_fpga_link_dst_src_write(emu,
1047 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
1048 snd_emu1010_fpga_link_dst_src_write(emu,
1049 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1050 snd_emu1010_fpga_link_dst_src_write(emu,
1051 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1052 snd_emu1010_fpga_link_dst_src_write(emu,
1053 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1054 snd_emu1010_fpga_link_dst_src_write(emu,
1055 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1056 snd_emu1010_fpga_link_dst_src_write(emu,
1057 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
1058 #endif
1059 #if 0
1060 /* Original */
1061 snd_emu1010_fpga_link_dst_src_write(emu,
1062 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1063 snd_emu1010_fpga_link_dst_src_write(emu,
1064 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1065 snd_emu1010_fpga_link_dst_src_write(emu,
1066 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1067 snd_emu1010_fpga_link_dst_src_write(emu,
1068 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1069 snd_emu1010_fpga_link_dst_src_write(emu,
1070 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1071 snd_emu1010_fpga_link_dst_src_write(emu,
1072 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1073 snd_emu1010_fpga_link_dst_src_write(emu,
1074 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1075 snd_emu1010_fpga_link_dst_src_write(emu,
1076 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1077 snd_emu1010_fpga_link_dst_src_write(emu,
1078 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1079 snd_emu1010_fpga_link_dst_src_write(emu,
1080 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1081 snd_emu1010_fpga_link_dst_src_write(emu,
1082 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1083 snd_emu1010_fpga_link_dst_src_write(emu,
1084 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1085 #endif
1086 for (i = 0; i < 0x20; i++) {
1087 /* AudioDock Elink <- Silence */
1088 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE);
1089 }
1090 for (i = 0; i < 4; i++) {
1091 /* Hana SPDIF Out <- Silence */
1092 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE);
1093 }
1094 for (i = 0; i < 7; i++) {
1095 /* Hamoa DAC <- Silence */
1096 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE);
1097 }
1098 for (i = 0; i < 7; i++) {
1099 /* Hana ADAT Out <- Silence */
1100 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1101 }
1102 snd_emu1010_fpga_link_dst_src_write(emu,
1103 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1104 snd_emu1010_fpga_link_dst_src_write(emu,
1105 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1106 snd_emu1010_fpga_link_dst_src_write(emu,
1107 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1108 snd_emu1010_fpga_link_dst_src_write(emu,
1109 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1110 snd_emu1010_fpga_link_dst_src_write(emu,
1111 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1112 snd_emu1010_fpga_link_dst_src_write(emu,
1113 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1114 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */
1115
1116 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1117
1118 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1119 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1120 * Mute all codecs.
1121 */
1122 outl(0x0000a000, emu->port + HCFG);
1123 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1124 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1125 * Un-Mute all codecs.
1126 */
1127 outl(0x0000a001, emu->port + HCFG);
1128
1129 /* Initial boot complete. Now patches */
1130
1131 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1132 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1133 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1134 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1135 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1136 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
1137 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif (or 0x11 for aes/ebu) */
1138
1139 /* Start Micro/Audio Dock firmware loader thread */
1140 if (!emu->emu1010.firmware_thread) {
1141 emu->emu1010.firmware_thread =
1142 kthread_create(emu1010_firmware_thread, emu,
1143 "emu1010_firmware");
1144 wake_up_process(emu->emu1010.firmware_thread);
1145 }
1146
1147 #if 0
1148 snd_emu1010_fpga_link_dst_src_write(emu,
1149 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1150 snd_emu1010_fpga_link_dst_src_write(emu,
1151 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1152 snd_emu1010_fpga_link_dst_src_write(emu,
1153 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1154 snd_emu1010_fpga_link_dst_src_write(emu,
1155 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1156 #endif
1157 /* Default outputs */
1158 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1159 /* 1616(M) cardbus default outputs */
1160 /* ALICE2 bus 0xa0 */
1161 snd_emu1010_fpga_link_dst_src_write(emu,
1162 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1163 emu->emu1010.output_source[0] = 17;
1164 snd_emu1010_fpga_link_dst_src_write(emu,
1165 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1166 emu->emu1010.output_source[1] = 18;
1167 snd_emu1010_fpga_link_dst_src_write(emu,
1168 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1169 emu->emu1010.output_source[2] = 19;
1170 snd_emu1010_fpga_link_dst_src_write(emu,
1171 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1172 emu->emu1010.output_source[3] = 20;
1173 snd_emu1010_fpga_link_dst_src_write(emu,
1174 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1175 emu->emu1010.output_source[4] = 21;
1176 snd_emu1010_fpga_link_dst_src_write(emu,
1177 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1178 emu->emu1010.output_source[5] = 22;
1179 /* ALICE2 bus 0xa0 */
1180 snd_emu1010_fpga_link_dst_src_write(emu,
1181 EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1182 emu->emu1010.output_source[16] = 17;
1183 snd_emu1010_fpga_link_dst_src_write(emu,
1184 EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1185 emu->emu1010.output_source[17] = 18;
1186 } else {
1187 /* ALICE2 bus 0xa0 */
1188 snd_emu1010_fpga_link_dst_src_write(emu,
1189 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1190 emu->emu1010.output_source[0] = 21;
1191 snd_emu1010_fpga_link_dst_src_write(emu,
1192 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1193 emu->emu1010.output_source[1] = 22;
1194 snd_emu1010_fpga_link_dst_src_write(emu,
1195 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1196 emu->emu1010.output_source[2] = 23;
1197 snd_emu1010_fpga_link_dst_src_write(emu,
1198 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1199 emu->emu1010.output_source[3] = 24;
1200 snd_emu1010_fpga_link_dst_src_write(emu,
1201 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1202 emu->emu1010.output_source[4] = 25;
1203 snd_emu1010_fpga_link_dst_src_write(emu,
1204 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1205 emu->emu1010.output_source[5] = 26;
1206 snd_emu1010_fpga_link_dst_src_write(emu,
1207 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1208 emu->emu1010.output_source[6] = 27;
1209 snd_emu1010_fpga_link_dst_src_write(emu,
1210 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1211 emu->emu1010.output_source[7] = 28;
1212 /* ALICE2 bus 0xa0 */
1213 snd_emu1010_fpga_link_dst_src_write(emu,
1214 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1215 emu->emu1010.output_source[8] = 21;
1216 snd_emu1010_fpga_link_dst_src_write(emu,
1217 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1218 emu->emu1010.output_source[9] = 22;
1219 /* ALICE2 bus 0xa0 */
1220 snd_emu1010_fpga_link_dst_src_write(emu,
1221 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1222 emu->emu1010.output_source[10] = 21;
1223 snd_emu1010_fpga_link_dst_src_write(emu,
1224 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1225 emu->emu1010.output_source[11] = 22;
1226 /* ALICE2 bus 0xa0 */
1227 snd_emu1010_fpga_link_dst_src_write(emu,
1228 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1229 emu->emu1010.output_source[12] = 21;
1230 snd_emu1010_fpga_link_dst_src_write(emu,
1231 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1232 emu->emu1010.output_source[13] = 22;
1233 /* ALICE2 bus 0xa0 */
1234 snd_emu1010_fpga_link_dst_src_write(emu,
1235 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1236 emu->emu1010.output_source[14] = 21;
1237 snd_emu1010_fpga_link_dst_src_write(emu,
1238 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1239 emu->emu1010.output_source[15] = 22;
1240 /* ALICE2 bus 0xa0 */
1241 snd_emu1010_fpga_link_dst_src_write(emu,
1242 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1243 emu->emu1010.output_source[16] = 21;
1244 snd_emu1010_fpga_link_dst_src_write(emu,
1245 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1246 emu->emu1010.output_source[17] = 22;
1247 snd_emu1010_fpga_link_dst_src_write(emu,
1248 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1249 emu->emu1010.output_source[18] = 23;
1250 snd_emu1010_fpga_link_dst_src_write(emu,
1251 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1252 emu->emu1010.output_source[19] = 24;
1253 snd_emu1010_fpga_link_dst_src_write(emu,
1254 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1255 emu->emu1010.output_source[20] = 25;
1256 snd_emu1010_fpga_link_dst_src_write(emu,
1257 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1258 emu->emu1010.output_source[21] = 26;
1259 snd_emu1010_fpga_link_dst_src_write(emu,
1260 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1261 emu->emu1010.output_source[22] = 27;
1262 snd_emu1010_fpga_link_dst_src_write(emu,
1263 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1264 emu->emu1010.output_source[23] = 28;
1265 }
1266 /* TEMP: Select SPDIF in/out */
1267 /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */
1268
1269 /* TEMP: Select 48kHz SPDIF out */
1270 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1271 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1272 /* Word Clock source, Internal 48kHz x1 */
1273 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
1274 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
1275 emu->emu1010.internal_clock = 1; /* 48000 */
1276 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */
1277 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1278 /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */
1279 /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */
1280 /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */
1281
1282 return 0;
1283 }
1284 /*
1285 * Create the EMU10K1 instance
1286 */
1287
1288 #ifdef CONFIG_PM_SLEEP
1289 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1290 static void free_pm_buffer(struct snd_emu10k1 *emu);
1291 #endif
1292
1293 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1294 {
1295 if (emu->port) { /* avoid access to already used hardware */
1296 snd_emu10k1_fx8010_tram_setup(emu, 0);
1297 snd_emu10k1_done(emu);
1298 snd_emu10k1_free_efx(emu);
1299 }
1300 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
1301 /* Disable 48Volt power to Audio Dock */
1302 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
1303 }
1304 if (emu->emu1010.firmware_thread)
1305 kthread_stop(emu->emu1010.firmware_thread);
1306 release_firmware(emu->firmware);
1307 release_firmware(emu->dock_fw);
1308 if (emu->irq >= 0)
1309 free_irq(emu->irq, emu);
1310 /* remove reserved page */
1311 if (emu->reserved_page) {
1312 snd_emu10k1_synth_free(emu,
1313 (struct snd_util_memblk *)emu->reserved_page);
1314 emu->reserved_page = NULL;
1315 }
1316 snd_util_memhdr_free(emu->memhdr);
1317 if (emu->silent_page.area)
1318 snd_dma_free_pages(&emu->silent_page);
1319 if (emu->ptb_pages.area)
1320 snd_dma_free_pages(&emu->ptb_pages);
1321 vfree(emu->page_ptr_table);
1322 vfree(emu->page_addr_table);
1323 #ifdef CONFIG_PM_SLEEP
1324 free_pm_buffer(emu);
1325 #endif
1326 if (emu->port)
1327 pci_release_regions(emu->pci);
1328 if (emu->card_capabilities->ca0151_chip) /* P16V */
1329 snd_p16v_free(emu);
1330 pci_disable_device(emu->pci);
1331 kfree(emu);
1332 return 0;
1333 }
1334
1335 static int snd_emu10k1_dev_free(struct snd_device *device)
1336 {
1337 struct snd_emu10k1 *emu = device->device_data;
1338 return snd_emu10k1_free(emu);
1339 }
1340
1341 static struct snd_emu_chip_details emu_chip_details[] = {
1342 /* Audigy 5/Rx SB1550 */
1343 /* Tested by michael@gernoth.net 28 Mar 2015 */
1344 /* DSP: CA10300-IAT LF
1345 * DAC: Cirrus Logic CS4382-KQZ
1346 * ADC: Philips 1361T
1347 * AC97: Sigmatel STAC9750
1348 * CA0151: None
1349 */
1350 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102,
1351 .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]",
1352 .id = "Audigy2",
1353 .emu10k2_chip = 1,
1354 .ca0108_chip = 1,
1355 .spk71 = 1,
1356 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1357 .ac97_chip = 1},
1358 /* Audigy4 (Not PRO) SB0610 */
1359 /* Tested by James@superbug.co.uk 4th April 2006 */
1360 /* A_IOCFG bits
1361 * Output
1362 * 0: ?
1363 * 1: ?
1364 * 2: ?
1365 * 3: 0 - Digital Out, 1 - Line in
1366 * 4: ?
1367 * 5: ?
1368 * 6: ?
1369 * 7: ?
1370 * Input
1371 * 8: ?
1372 * 9: ?
1373 * A: Green jack sense (Front)
1374 * B: ?
1375 * C: Black jack sense (Rear/Side Right)
1376 * D: Yellow jack sense (Center/LFE/Side Left)
1377 * E: ?
1378 * F: ?
1379 *
1380 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1381 * 0 - Digital Out
1382 * 1 - Line in
1383 */
1384 /* Mic input not tested.
1385 * Analog CD input not tested
1386 * Digital Out not tested.
1387 * Line in working.
1388 * Audio output 5.1 working. Side outputs not working.
1389 */
1390 /* DSP: CA10300-IAT LF
1391 * DAC: Cirrus Logic CS4382-KQZ
1392 * ADC: Philips 1361T
1393 * AC97: Sigmatel STAC9750
1394 * CA0151: None
1395 */
1396 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1397 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
1398 .id = "Audigy2",
1399 .emu10k2_chip = 1,
1400 .ca0108_chip = 1,
1401 .spk71 = 1,
1402 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1403 .ac97_chip = 1} ,
1404 /* Audigy 2 Value AC3 out does not work yet.
1405 * Need to find out how to turn off interpolators.
1406 */
1407 /* Tested by James@superbug.co.uk 3rd July 2005 */
1408 /* DSP: CA0108-IAT
1409 * DAC: CS4382-KQ
1410 * ADC: Philips 1361T
1411 * AC97: STAC9750
1412 * CA0151: None
1413 */
1414 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1415 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1416 .id = "Audigy2",
1417 .emu10k2_chip = 1,
1418 .ca0108_chip = 1,
1419 .spk71 = 1,
1420 .ac97_chip = 1} ,
1421 /* Audigy 2 ZS Notebook Cardbus card.*/
1422 /* Tested by James@superbug.co.uk 6th November 2006 */
1423 /* Audio output 7.1/Headphones working.
1424 * Digital output working. (AC3 not checked, only PCM)
1425 * Audio Mic/Line inputs working.
1426 * Digital input not tested.
1427 */
1428 /* DSP: Tina2
1429 * DAC: Wolfson WM8768/WM8568
1430 * ADC: Wolfson WM8775
1431 * AC97: None
1432 * CA0151: None
1433 */
1434 /* Tested by James@superbug.co.uk 4th April 2006 */
1435 /* A_IOCFG bits
1436 * Output
1437 * 0: Not Used
1438 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1439 * 2: Analog input 0 = line in, 1 = mic in
1440 * 3: Not Used
1441 * 4: Digital output 0 = off, 1 = on.
1442 * 5: Not Used
1443 * 6: Not Used
1444 * 7: Not Used
1445 * Input
1446 * All bits 1 (0x3fxx) means nothing plugged in.
1447 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1448 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1449 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1450 * E-F: Always 0
1451 *
1452 */
1453 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1454 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1455 .id = "Audigy2",
1456 .emu10k2_chip = 1,
1457 .ca0108_chip = 1,
1458 .ca_cardbus_chip = 1,
1459 .spi_dac = 1,
1460 .i2c_adc = 1,
1461 .spk71 = 1} ,
1462 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1463 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1464 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1465 .id = "EMU1010",
1466 .emu10k2_chip = 1,
1467 .ca0108_chip = 1,
1468 .ca_cardbus_chip = 1,
1469 .spk71 = 1 ,
1470 .emu_model = EMU_MODEL_EMU1616},
1471 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1472 /* This is MAEM8960, 0202 is MAEM 8980 */
1473 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1474 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]",
1475 .id = "EMU1010",
1476 .emu10k2_chip = 1,
1477 .ca0108_chip = 1,
1478 .spk71 = 1,
1479 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1480 /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */
1481 /* This is MAEM8986, 0202 is MAEM8980 */
1482 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
1483 .driver = "Audigy2", .name = "E-mu 1010 PCIe [MAEM8986]",
1484 .id = "EMU1010",
1485 .emu10k2_chip = 1,
1486 .ca0108_chip = 1,
1487 .spk71 = 1,
1488 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
1489 /* Tested by James@superbug.co.uk 8th July 2005. */
1490 /* This is MAEM8810, 0202 is MAEM8820 */
1491 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1492 .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]",
1493 .id = "EMU1010",
1494 .emu10k2_chip = 1,
1495 .ca0102_chip = 1,
1496 .spk71 = 1,
1497 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1498 /* EMU0404b */
1499 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1500 .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]",
1501 .id = "EMU0404",
1502 .emu10k2_chip = 1,
1503 .ca0108_chip = 1,
1504 .spk71 = 1,
1505 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1506 /* Tested by James@superbug.co.uk 20-3-2007. */
1507 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1508 .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]",
1509 .id = "EMU0404",
1510 .emu10k2_chip = 1,
1511 .ca0102_chip = 1,
1512 .spk71 = 1,
1513 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1514 /* EMU0404 PCIe */
1515 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
1516 .driver = "Audigy2", .name = "E-mu 0404 PCIe [MAEM8984]",
1517 .id = "EMU0404",
1518 .emu10k2_chip = 1,
1519 .ca0108_chip = 1,
1520 .spk71 = 1,
1521 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
1522 /* Note that all E-mu cards require kernel 2.6 or newer. */
1523 {.vendor = 0x1102, .device = 0x0008,
1524 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1525 .id = "Audigy2",
1526 .emu10k2_chip = 1,
1527 .ca0108_chip = 1,
1528 .ac97_chip = 1} ,
1529 /* Tested by James@superbug.co.uk 3rd July 2005 */
1530 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1531 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1532 .id = "Audigy2",
1533 .emu10k2_chip = 1,
1534 .ca0102_chip = 1,
1535 .ca0151_chip = 1,
1536 .spk71 = 1,
1537 .spdif_bug = 1,
1538 .ac97_chip = 1} ,
1539 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1540 /* The 0x20061102 does have SB0350 written on it
1541 * Just like 0x20021102
1542 */
1543 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1544 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1545 .id = "Audigy2",
1546 .emu10k2_chip = 1,
1547 .ca0102_chip = 1,
1548 .ca0151_chip = 1,
1549 .spk71 = 1,
1550 .spdif_bug = 1,
1551 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1552 .ac97_chip = 1} ,
1553 /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by
1554 Creative's Windows driver */
1555 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102,
1556 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]",
1557 .id = "Audigy2",
1558 .emu10k2_chip = 1,
1559 .ca0102_chip = 1,
1560 .ca0151_chip = 1,
1561 .spk71 = 1,
1562 .spdif_bug = 1,
1563 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1564 .ac97_chip = 1} ,
1565 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1566 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1567 .id = "Audigy2",
1568 .emu10k2_chip = 1,
1569 .ca0102_chip = 1,
1570 .ca0151_chip = 1,
1571 .spk71 = 1,
1572 .spdif_bug = 1,
1573 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1574 .ac97_chip = 1} ,
1575 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1576 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1577 .id = "Audigy2",
1578 .emu10k2_chip = 1,
1579 .ca0102_chip = 1,
1580 .ca0151_chip = 1,
1581 .spk71 = 1,
1582 .spdif_bug = 1,
1583 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1584 .ac97_chip = 1} ,
1585 /* Audigy 2 */
1586 /* Tested by James@superbug.co.uk 3rd July 2005 */
1587 /* DSP: CA0102-IAT
1588 * DAC: CS4382-KQ
1589 * ADC: Philips 1361T
1590 * AC97: STAC9721
1591 * CA0151: Yes
1592 */
1593 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1594 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1595 .id = "Audigy2",
1596 .emu10k2_chip = 1,
1597 .ca0102_chip = 1,
1598 .ca0151_chip = 1,
1599 .spk71 = 1,
1600 .spdif_bug = 1,
1601 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1602 .ac97_chip = 1} ,
1603 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1604 .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]",
1605 .id = "Audigy2",
1606 .emu10k2_chip = 1,
1607 .ca0102_chip = 1,
1608 .ca0151_chip = 1,
1609 .spk71 = 1,
1610 .spdif_bug = 1} ,
1611 /* Dell OEM/Creative Labs Audigy 2 ZS */
1612 /* See ALSA bug#1365 */
1613 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1614 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1615 .id = "Audigy2",
1616 .emu10k2_chip = 1,
1617 .ca0102_chip = 1,
1618 .ca0151_chip = 1,
1619 .spk71 = 1,
1620 .spdif_bug = 1,
1621 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1622 .ac97_chip = 1} ,
1623 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1624 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1625 .id = "Audigy2",
1626 .emu10k2_chip = 1,
1627 .ca0102_chip = 1,
1628 .ca0151_chip = 1,
1629 .spk71 = 1,
1630 .spdif_bug = 1,
1631 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1632 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1633 .ac97_chip = 1} ,
1634 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1635 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1636 .id = "Audigy2",
1637 .emu10k2_chip = 1,
1638 .ca0102_chip = 1,
1639 .ca0151_chip = 1,
1640 .spdif_bug = 1,
1641 .ac97_chip = 1} ,
1642 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1643 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1644 .id = "Audigy",
1645 .emu10k2_chip = 1,
1646 .ca0102_chip = 1,
1647 .ac97_chip = 1} ,
1648 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1649 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1650 .id = "Audigy",
1651 .emu10k2_chip = 1,
1652 .ca0102_chip = 1,
1653 .spdif_bug = 1,
1654 .ac97_chip = 1} ,
1655 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1656 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1657 .id = "Audigy",
1658 .emu10k2_chip = 1,
1659 .ca0102_chip = 1,
1660 .ac97_chip = 1} ,
1661 {.vendor = 0x1102, .device = 0x0004,
1662 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1663 .id = "Audigy",
1664 .emu10k2_chip = 1,
1665 .ca0102_chip = 1,
1666 .ac97_chip = 1} ,
1667 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1668 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1669 .id = "Live",
1670 .emu10k1_chip = 1,
1671 .ac97_chip = 1,
1672 .sblive51 = 1} ,
1673 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1674 .driver = "EMU10K1", .name = "SB Live! [SB0105]",
1675 .id = "Live",
1676 .emu10k1_chip = 1,
1677 .ac97_chip = 1,
1678 .sblive51 = 1} ,
1679 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1680 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1681 .id = "Live",
1682 .emu10k1_chip = 1,
1683 .ac97_chip = 1,
1684 .sblive51 = 1} ,
1685 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1686 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1687 .id = "Live",
1688 .emu10k1_chip = 1,
1689 .ac97_chip = 1,
1690 .sblive51 = 1} ,
1691 /* Tested by ALSA bug#1680 26th December 2005 */
1692 /* note: It really has SB0220 written on the card, */
1693 /* but it's SB0228 according to kx.inf */
1694 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1695 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1696 .id = "Live",
1697 .emu10k1_chip = 1,
1698 .ac97_chip = 1,
1699 .sblive51 = 1} ,
1700 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1701 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1702 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1703 .id = "Live",
1704 .emu10k1_chip = 1,
1705 .ac97_chip = 1,
1706 .sblive51 = 1} ,
1707 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1708 .driver = "EMU10K1", .name = "SB Live! 5.1",
1709 .id = "Live",
1710 .emu10k1_chip = 1,
1711 .ac97_chip = 1,
1712 .sblive51 = 1} ,
1713 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1714 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1715 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1716 .id = "Live",
1717 .emu10k1_chip = 1,
1718 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1719 * share the same IDs!
1720 */
1721 .sblive51 = 1} ,
1722 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1723 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1724 .id = "Live",
1725 .emu10k1_chip = 1,
1726 .ac97_chip = 1,
1727 .sblive51 = 1} ,
1728 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1729 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1730 .id = "Live",
1731 .emu10k1_chip = 1,
1732 .ac97_chip = 1} ,
1733 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1734 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1735 .id = "Live",
1736 .emu10k1_chip = 1,
1737 .ac97_chip = 1,
1738 .sblive51 = 1} ,
1739 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1740 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1741 .id = "Live",
1742 .emu10k1_chip = 1,
1743 .ac97_chip = 1,
1744 .sblive51 = 1} ,
1745 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1746 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1747 .id = "Live",
1748 .emu10k1_chip = 1,
1749 .ac97_chip = 1,
1750 .sblive51 = 1} ,
1751 /* Tested by James@superbug.co.uk 3rd July 2005 */
1752 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1753 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1754 .id = "Live",
1755 .emu10k1_chip = 1,
1756 .ac97_chip = 1,
1757 .sblive51 = 1} ,
1758 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1759 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1760 .id = "Live",
1761 .emu10k1_chip = 1,
1762 .ac97_chip = 1,
1763 .sblive51 = 1} ,
1764 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1765 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1766 .id = "Live",
1767 .emu10k1_chip = 1,
1768 .ac97_chip = 1,
1769 .sblive51 = 1} ,
1770 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1771 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1772 .id = "Live",
1773 .emu10k1_chip = 1,
1774 .ac97_chip = 1,
1775 .sblive51 = 1} ,
1776 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1777 .driver = "EMU10K1", .name = "E-mu APS [PC545]",
1778 .id = "APS",
1779 .emu10k1_chip = 1,
1780 .ecard = 1} ,
1781 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1782 .driver = "EMU10K1", .name = "SB Live! [CT4620]",
1783 .id = "Live",
1784 .emu10k1_chip = 1,
1785 .ac97_chip = 1,
1786 .sblive51 = 1} ,
1787 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1788 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1789 .id = "Live",
1790 .emu10k1_chip = 1,
1791 .ac97_chip = 1,
1792 .sblive51 = 1} ,
1793 {.vendor = 0x1102, .device = 0x0002,
1794 .driver = "EMU10K1", .name = "SB Live! [Unknown]",
1795 .id = "Live",
1796 .emu10k1_chip = 1,
1797 .ac97_chip = 1,
1798 .sblive51 = 1} ,
1799 { } /* terminator */
1800 };
1801
1802 int snd_emu10k1_create(struct snd_card *card,
1803 struct pci_dev *pci,
1804 unsigned short extin_mask,
1805 unsigned short extout_mask,
1806 long max_cache_bytes,
1807 int enable_ir,
1808 uint subsystem,
1809 struct snd_emu10k1 **remu)
1810 {
1811 struct snd_emu10k1 *emu;
1812 int idx, err;
1813 int is_audigy;
1814 unsigned int silent_page;
1815 const struct snd_emu_chip_details *c;
1816 static struct snd_device_ops ops = {
1817 .dev_free = snd_emu10k1_dev_free,
1818 };
1819
1820 *remu = NULL;
1821
1822 /* enable PCI device */
1823 err = pci_enable_device(pci);
1824 if (err < 0)
1825 return err;
1826
1827 emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1828 if (emu == NULL) {
1829 pci_disable_device(pci);
1830 return -ENOMEM;
1831 }
1832 emu->card = card;
1833 spin_lock_init(&emu->reg_lock);
1834 spin_lock_init(&emu->emu_lock);
1835 spin_lock_init(&emu->spi_lock);
1836 spin_lock_init(&emu->i2c_lock);
1837 spin_lock_init(&emu->voice_lock);
1838 spin_lock_init(&emu->synth_lock);
1839 spin_lock_init(&emu->memblk_lock);
1840 mutex_init(&emu->fx8010.lock);
1841 INIT_LIST_HEAD(&emu->mapped_link_head);
1842 INIT_LIST_HEAD(&emu->mapped_order_link_head);
1843 emu->pci = pci;
1844 emu->irq = -1;
1845 emu->synth = NULL;
1846 emu->get_synth_voice = NULL;
1847 /* read revision & serial */
1848 emu->revision = pci->revision;
1849 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1850 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1851 dev_dbg(card->dev,
1852 "vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n",
1853 pci->vendor, pci->device, emu->serial, emu->model);
1854
1855 for (c = emu_chip_details; c->vendor; c++) {
1856 if (c->vendor == pci->vendor && c->device == pci->device) {
1857 if (subsystem) {
1858 if (c->subsystem && (c->subsystem == subsystem))
1859 break;
1860 else
1861 continue;
1862 } else {
1863 if (c->subsystem && (c->subsystem != emu->serial))
1864 continue;
1865 if (c->revision && c->revision != emu->revision)
1866 continue;
1867 }
1868 break;
1869 }
1870 }
1871 if (c->vendor == 0) {
1872 dev_err(card->dev, "emu10k1: Card not recognised\n");
1873 kfree(emu);
1874 pci_disable_device(pci);
1875 return -ENOENT;
1876 }
1877 emu->card_capabilities = c;
1878 if (c->subsystem && !subsystem)
1879 dev_dbg(card->dev, "Sound card name = %s\n", c->name);
1880 else if (subsystem)
1881 dev_dbg(card->dev, "Sound card name = %s, "
1882 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1883 "Forced to subsystem = 0x%x\n", c->name,
1884 pci->vendor, pci->device, emu->serial, c->subsystem);
1885 else
1886 dev_dbg(card->dev, "Sound card name = %s, "
1887 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1888 c->name, pci->vendor, pci->device,
1889 emu->serial);
1890
1891 if (!*card->id && c->id) {
1892 int i, n = 0;
1893 strlcpy(card->id, c->id, sizeof(card->id));
1894 for (;;) {
1895 for (i = 0; i < snd_ecards_limit; i++) {
1896 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1897 break;
1898 }
1899 if (i >= snd_ecards_limit)
1900 break;
1901 n++;
1902 if (n >= SNDRV_CARDS)
1903 break;
1904 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1905 }
1906 }
1907
1908 is_audigy = emu->audigy = c->emu10k2_chip;
1909
1910 /* set addressing mode */
1911 emu->address_mode = is_audigy ? 0 : 1;
1912 /* set the DMA transfer mask */
1913 emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK;
1914 if (dma_set_mask(&pci->dev, emu->dma_mask) < 0 ||
1915 dma_set_coherent_mask(&pci->dev, emu->dma_mask) < 0) {
1916 dev_err(card->dev,
1917 "architecture does not support PCI busmaster DMA with mask 0x%lx\n",
1918 emu->dma_mask);
1919 kfree(emu);
1920 pci_disable_device(pci);
1921 return -ENXIO;
1922 }
1923 if (is_audigy)
1924 emu->gpr_base = A_FXGPREGBASE;
1925 else
1926 emu->gpr_base = FXGPREGBASE;
1927
1928 err = pci_request_regions(pci, "EMU10K1");
1929 if (err < 0) {
1930 kfree(emu);
1931 pci_disable_device(pci);
1932 return err;
1933 }
1934 emu->port = pci_resource_start(pci, 0);
1935
1936 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1937 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1938 (emu->address_mode ? 32 : 16) * 1024, &emu->ptb_pages) < 0) {
1939 err = -ENOMEM;
1940 goto error;
1941 }
1942
1943 emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1944 emu->page_addr_table = vmalloc(emu->max_cache_pages *
1945 sizeof(unsigned long));
1946 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1947 err = -ENOMEM;
1948 goto error;
1949 }
1950
1951 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1952 EMUPAGESIZE, &emu->silent_page) < 0) {
1953 err = -ENOMEM;
1954 goto error;
1955 }
1956 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1957 if (emu->memhdr == NULL) {
1958 err = -ENOMEM;
1959 goto error;
1960 }
1961 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1962 sizeof(struct snd_util_memblk);
1963
1964 pci_set_master(pci);
1965
1966 emu->fx8010.fxbus_mask = 0x303f;
1967 if (extin_mask == 0)
1968 extin_mask = 0x3fcf;
1969 if (extout_mask == 0)
1970 extout_mask = 0x7fff;
1971 emu->fx8010.extin_mask = extin_mask;
1972 emu->fx8010.extout_mask = extout_mask;
1973 emu->enable_ir = enable_ir;
1974
1975 if (emu->card_capabilities->ca_cardbus_chip) {
1976 err = snd_emu10k1_cardbus_init(emu);
1977 if (err < 0)
1978 goto error;
1979 }
1980 if (emu->card_capabilities->ecard) {
1981 err = snd_emu10k1_ecard_init(emu);
1982 if (err < 0)
1983 goto error;
1984 } else if (emu->card_capabilities->emu_model) {
1985 err = snd_emu10k1_emu1010_init(emu);
1986 if (err < 0) {
1987 snd_emu10k1_free(emu);
1988 return err;
1989 }
1990 } else {
1991 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1992 does not support this, it shouldn't do any harm */
1993 snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1994 AC97SLOT_CNTR|AC97SLOT_LFE);
1995 }
1996
1997 /* initialize TRAM setup */
1998 emu->fx8010.itram_size = (16 * 1024)/2;
1999 emu->fx8010.etram_pages.area = NULL;
2000 emu->fx8010.etram_pages.bytes = 0;
2001
2002 /* irq handler must be registered after I/O ports are activated */
2003 if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
2004 KBUILD_MODNAME, emu)) {
2005 err = -EBUSY;
2006 goto error;
2007 }
2008 emu->irq = pci->irq;
2009
2010 /*
2011 * Init to 0x02109204 :
2012 * Clock accuracy = 0 (1000ppm)
2013 * Sample Rate = 2 (48kHz)
2014 * Audio Channel = 1 (Left of 2)
2015 * Source Number = 0 (Unspecified)
2016 * Generation Status = 1 (Original for Cat Code 12)
2017 * Cat Code = 12 (Digital Signal Mixer)
2018 * Mode = 0 (Mode 0)
2019 * Emphasis = 0 (None)
2020 * CP = 1 (Copyright unasserted)
2021 * AN = 0 (Audio data)
2022 * P = 0 (Consumer)
2023 */
2024 emu->spdif_bits[0] = emu->spdif_bits[1] =
2025 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
2026 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
2027 SPCS_GENERATIONSTATUS | 0x00001200 |
2028 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
2029
2030 emu->reserved_page = (struct snd_emu10k1_memblk *)
2031 snd_emu10k1_synth_alloc(emu, 4096);
2032 if (emu->reserved_page)
2033 emu->reserved_page->map_locked = 1;
2034
2035 /* Clear silent pages and set up pointers */
2036 memset(emu->silent_page.area, 0, PAGE_SIZE);
2037 silent_page = emu->silent_page.addr << emu->address_mode;
2038 for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++)
2039 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
2040
2041 /* set up voice indices */
2042 for (idx = 0; idx < NUM_G; idx++) {
2043 emu->voices[idx].emu = emu;
2044 emu->voices[idx].number = idx;
2045 }
2046
2047 err = snd_emu10k1_init(emu, enable_ir, 0);
2048 if (err < 0)
2049 goto error;
2050 #ifdef CONFIG_PM_SLEEP
2051 err = alloc_pm_buffer(emu);
2052 if (err < 0)
2053 goto error;
2054 #endif
2055
2056 /* Initialize the effect engine */
2057 err = snd_emu10k1_init_efx(emu);
2058 if (err < 0)
2059 goto error;
2060 snd_emu10k1_audio_enable(emu);
2061
2062 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops);
2063 if (err < 0)
2064 goto error;
2065
2066 #ifdef CONFIG_SND_PROC_FS
2067 snd_emu10k1_proc_init(emu);
2068 #endif
2069
2070 *remu = emu;
2071 return 0;
2072
2073 error:
2074 snd_emu10k1_free(emu);
2075 return err;
2076 }
2077
2078 #ifdef CONFIG_PM_SLEEP
2079 static unsigned char saved_regs[] = {
2080 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
2081 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
2082 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
2083 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
2084 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
2085 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
2086 0xff /* end */
2087 };
2088 static unsigned char saved_regs_audigy[] = {
2089 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
2090 A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
2091 0xff /* end */
2092 };
2093
2094 static int alloc_pm_buffer(struct snd_emu10k1 *emu)
2095 {
2096 int size;
2097
2098 size = ARRAY_SIZE(saved_regs);
2099 if (emu->audigy)
2100 size += ARRAY_SIZE(saved_regs_audigy);
2101 emu->saved_ptr = vmalloc(4 * NUM_G * size);
2102 if (!emu->saved_ptr)
2103 return -ENOMEM;
2104 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
2105 return -ENOMEM;
2106 if (emu->card_capabilities->ca0151_chip &&
2107 snd_p16v_alloc_pm_buffer(emu) < 0)
2108 return -ENOMEM;
2109 return 0;
2110 }
2111
2112 static void free_pm_buffer(struct snd_emu10k1 *emu)
2113 {
2114 vfree(emu->saved_ptr);
2115 snd_emu10k1_efx_free_pm_buffer(emu);
2116 if (emu->card_capabilities->ca0151_chip)
2117 snd_p16v_free_pm_buffer(emu);
2118 }
2119
2120 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2121 {
2122 int i;
2123 unsigned char *reg;
2124 unsigned int *val;
2125
2126 val = emu->saved_ptr;
2127 for (reg = saved_regs; *reg != 0xff; reg++)
2128 for (i = 0; i < NUM_G; i++, val++)
2129 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2130 if (emu->audigy) {
2131 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2132 for (i = 0; i < NUM_G; i++, val++)
2133 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2134 }
2135 if (emu->audigy)
2136 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2137 emu->saved_hcfg = inl(emu->port + HCFG);
2138 }
2139
2140 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2141 {
2142 if (emu->card_capabilities->ca_cardbus_chip)
2143 snd_emu10k1_cardbus_init(emu);
2144 if (emu->card_capabilities->ecard)
2145 snd_emu10k1_ecard_init(emu);
2146 else if (emu->card_capabilities->emu_model)
2147 snd_emu10k1_emu1010_init(emu);
2148 else
2149 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2150 snd_emu10k1_init(emu, emu->enable_ir, 1);
2151 }
2152
2153 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2154 {
2155 int i;
2156 unsigned char *reg;
2157 unsigned int *val;
2158
2159 snd_emu10k1_audio_enable(emu);
2160
2161 /* resore for spdif */
2162 if (emu->audigy)
2163 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2164 outl(emu->saved_hcfg, emu->port + HCFG);
2165
2166 val = emu->saved_ptr;
2167 for (reg = saved_regs; *reg != 0xff; reg++)
2168 for (i = 0; i < NUM_G; i++, val++)
2169 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2170 if (emu->audigy) {
2171 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2172 for (i = 0; i < NUM_G; i++, val++)
2173 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2174 }
2175 }
2176 #endif
Linux with added FPC-III support