drivers/block/skd_s1120.h

   1 /* Copyright 2012 STEC, Inc.
   2  *
   3  * This file is licensed under the terms of the 3-clause
   4  * BSD License (http://opensource.org/licenses/BSD-3-Clause)
   5  * or the GNU GPL-2.0 (http://www.gnu.org/licenses/gpl-2.0.html),
   6  * at your option. Both licenses are also available in the LICENSE file
   7  * distributed with this project. This file may not be copied, modified,
   8  * or distributed except in accordance with those terms.
   9  */
  10
  11
  12 #ifndef SKD_S1120_H
  13 #define SKD_S1120_H
  14
  15 #pragma pack(push, s1120_h, 1)
  16
  17 /*
  18  * Q-channel, 64-bit r/w
  19  */
  20 #define FIT_Q_COMMAND                   0x400u
  21 #define FIT_QCMD_QID_MASK               (0x3 << 1)
  22 #define  FIT_QCMD_QID0                  (0x0 << 1)
  23 #define  FIT_QCMD_QID_NORMAL            FIT_QCMD_QID0
  24 #define  FIT_QCMD_QID1                  (0x1 << 1)
  25 #define  FIT_QCMD_QID2                  (0x2 << 1)
  26 #define  FIT_QCMD_QID3                  (0x3 << 1)
  27 #define  FIT_QCMD_FLUSH_QUEUE           (0ull)  /* add QID */
  28 #define  FIT_QCMD_MSGSIZE_MASK          (0x3 << 4)
  29 #define  FIT_QCMD_MSGSIZE_64            (0x0 << 4)
  30 #define  FIT_QCMD_MSGSIZE_128           (0x1 << 4)
  31 #define  FIT_QCMD_MSGSIZE_256           (0x2 << 4)
  32 #define  FIT_QCMD_MSGSIZE_512           (0x3 << 4)
  33 #define  FIT_QCMD_BASE_ADDRESS_MASK     (0xFFFFFFFFFFFFFFC0ull)
  34
  35 /*
  36  * Control, 32-bit r/w
  37  */
  38 #define FIT_CONTROL                     0x500u
  39 #define  FIT_CR_HARD_RESET              (1u << 0u)
  40 #define  FIT_CR_SOFT_RESET              (1u << 1u)
  41 #define  FIT_CR_DIS_TIMESTAMPS          (1u << 6u)
  42 #define  FIT_CR_ENABLE_INTERRUPTS       (1u << 7u)
  43
  44 /*
  45  * Status, 32-bit, r/o
  46  */
  47 #define FIT_STATUS                      0x510u
  48 #define FIT_SR_DRIVE_STATE_MASK         0x000000FFu
  49 #define FIT_SR_SIGNATURE                (0xFF << 8)
  50 #define FIT_SR_PIO_DMA                  (1 << 16)
  51 #define FIT_SR_DRIVE_OFFLINE            0x00
  52 #define FIT_SR_DRIVE_INIT               0x01
  53 /* #define FIT_SR_DRIVE_READY           0x02 */
  54 #define FIT_SR_DRIVE_ONLINE             0x03
  55 #define FIT_SR_DRIVE_BUSY               0x04
  56 #define FIT_SR_DRIVE_FAULT              0x05
  57 #define FIT_SR_DRIVE_DEGRADED           0x06
  58 #define FIT_SR_PCIE_LINK_DOWN           0x07
  59 #define FIT_SR_DRIVE_SOFT_RESET         0x08
  60 #define FIT_SR_DRIVE_INIT_FAULT         0x09
  61 #define FIT_SR_DRIVE_BUSY_SANITIZE      0x0A
  62 #define FIT_SR_DRIVE_BUSY_ERASE         0x0B
  63 #define FIT_SR_DRIVE_FW_BOOTING         0x0C
  64 #define FIT_SR_DRIVE_NEED_FW_DOWNLOAD   0xFE
  65 #define FIT_SR_DEVICE_MISSING           0xFF
  66 #define FIT_SR__RESERVED                0xFFFFFF00u
  67
  68 /*
  69  * FIT_STATUS - Status register data definition
  70  */
  71 #define FIT_SR_STATE_MASK               (0xFF << 0)
  72 #define FIT_SR_SIGNATURE                (0xFF << 8)
  73 #define FIT_SR_PIO_DMA                  (1 << 16)
  74
  75 /*
  76  * Interrupt status, 32-bit r/w1c (w1c ==> write 1 to clear)
  77  */
  78 #define FIT_INT_STATUS_HOST             0x520u
  79 #define  FIT_ISH_FW_STATE_CHANGE        (1u << 0u)
  80 #define  FIT_ISH_COMPLETION_POSTED      (1u << 1u)
  81 #define  FIT_ISH_MSG_FROM_DEV           (1u << 2u)
  82 #define  FIT_ISH_UNDEFINED_3            (1u << 3u)
  83 #define  FIT_ISH_UNDEFINED_4            (1u << 4u)
  84 #define  FIT_ISH_Q0_FULL                (1u << 5u)
  85 #define  FIT_ISH_Q1_FULL                (1u << 6u)
  86 #define  FIT_ISH_Q2_FULL                (1u << 7u)
  87 #define  FIT_ISH_Q3_FULL                (1u << 8u)
  88 #define  FIT_ISH_QCMD_FIFO_OVERRUN      (1u << 9u)
  89 #define  FIT_ISH_BAD_EXP_ROM_READ       (1u << 10u)
  90
  91 #define FIT_INT_DEF_MASK \
  92         (FIT_ISH_FW_STATE_CHANGE | \
  93          FIT_ISH_COMPLETION_POSTED | \
  94          FIT_ISH_MSG_FROM_DEV | \
  95          FIT_ISH_Q0_FULL | \
  96          FIT_ISH_Q1_FULL | \
  97          FIT_ISH_Q2_FULL | \
  98          FIT_ISH_Q3_FULL | \
  99          FIT_ISH_QCMD_FIFO_OVERRUN | \
 100          FIT_ISH_BAD_EXP_ROM_READ)
 101
 102 #define FIT_INT_QUEUE_FULL \
 103         (FIT_ISH_Q0_FULL | \
 104          FIT_ISH_Q1_FULL | \
 105          FIT_ISH_Q2_FULL | \
 106          FIT_ISH_Q3_FULL)
 107
 108 #define MSI_MSG_NWL_ERROR_0             0x00000000
 109 #define MSI_MSG_NWL_ERROR_1             0x00000001
 110 #define MSI_MSG_NWL_ERROR_2             0x00000002
 111 #define MSI_MSG_NWL_ERROR_3             0x00000003
 112 #define MSI_MSG_STATE_CHANGE            0x00000004
 113 #define MSI_MSG_COMPLETION_POSTED       0x00000005
 114 #define MSI_MSG_MSG_FROM_DEV            0x00000006
 115 #define MSI_MSG_RESERVED_0              0x00000007
 116 #define MSI_MSG_RESERVED_1              0x00000008
 117 #define MSI_MSG_QUEUE_0_FULL            0x00000009
 118 #define MSI_MSG_QUEUE_1_FULL            0x0000000A
 119 #define MSI_MSG_QUEUE_2_FULL            0x0000000B
 120 #define MSI_MSG_QUEUE_3_FULL            0x0000000C
 121
 122 #define FIT_INT_RESERVED_MASK \
 123         (FIT_ISH_UNDEFINED_3 | \
 124          FIT_ISH_UNDEFINED_4)
 125
 126 /*
 127  * Interrupt mask, 32-bit r/w
 128  * Bit definitions are the same as FIT_INT_STATUS_HOST
 129  */
 130 #define FIT_INT_MASK_HOST               0x528u
 131
 132 /*
 133  * Message to device, 32-bit r/w
 134  */
 135 #define FIT_MSG_TO_DEVICE               0x540u
 136
 137 /*
 138  * Message from device, 32-bit, r/o
 139  */
 140 #define FIT_MSG_FROM_DEVICE             0x548u
 141
 142 /*
 143  * 32-bit messages to/from device, composition/extraction macros
 144  */
 145 #define FIT_MXD_CONS(TYPE, PARAM, DATA) \
 146         ((((TYPE)  & 0xFFu) << 24u) | \
 147         (((PARAM) & 0xFFu) << 16u) | \
 148         (((DATA)  & 0xFFFFu) << 0u))
 149 #define FIT_MXD_TYPE(MXD)               (((MXD) >> 24u) & 0xFFu)
 150 #define FIT_MXD_PARAM(MXD)              (((MXD) >> 16u) & 0xFFu)
 151 #define FIT_MXD_DATA(MXD)               (((MXD) >> 0u) & 0xFFFFu)
 152
 153 /*
 154  * Types of messages to/from device
 155  */
 156 #define FIT_MTD_FITFW_INIT              0x01u
 157 #define FIT_MTD_GET_CMDQ_DEPTH          0x02u
 158 #define FIT_MTD_SET_COMPQ_DEPTH         0x03u
 159 #define FIT_MTD_SET_COMPQ_ADDR          0x04u
 160 #define FIT_MTD_ARM_QUEUE               0x05u
 161 #define FIT_MTD_CMD_LOG_HOST_ID         0x07u
 162 #define FIT_MTD_CMD_LOG_TIME_STAMP_LO   0x08u
 163 #define FIT_MTD_CMD_LOG_TIME_STAMP_HI   0x09u
 164 #define FIT_MFD_SMART_EXCEEDED          0x10u
 165 #define FIT_MFD_POWER_DOWN              0x11u
 166 #define FIT_MFD_OFFLINE                 0x12u
 167 #define FIT_MFD_ONLINE                  0x13u
 168 #define FIT_MFD_FW_RESTARTING           0x14u
 169 #define FIT_MFD_PM_ACTIVE               0x15u
 170 #define FIT_MFD_PM_STANDBY              0x16u
 171 #define FIT_MFD_PM_SLEEP                0x17u
 172 #define FIT_MFD_CMD_PROGRESS            0x18u
 173
 174 #define FIT_MTD_DEBUG                   0xFEu
 175 #define FIT_MFD_DEBUG                   0xFFu
 176
 177 #define FIT_MFD_MASK                    (0xFFu)
 178 #define FIT_MFD_DATA_MASK               (0xFFu)
 179 #define FIT_MFD_MSG(x)                  (((x) >> 24) & FIT_MFD_MASK)
 180 #define FIT_MFD_DATA(x)                 ((x) & FIT_MFD_MASK)
 181
 182 /*
 183  * Extra arg to FIT_MSG_TO_DEVICE, 64-bit r/w
 184  * Used to set completion queue address (FIT_MTD_SET_COMPQ_ADDR)
 185  * (was Response buffer in docs)
 186  */
 187 #define FIT_MSG_TO_DEVICE_ARG           0x580u
 188
 189 /*
 190  * Hardware (ASIC) version, 32-bit r/o
 191  */
 192 #define FIT_HW_VERSION                  0x588u
 193
 194 /*
 195  * Scatter/gather list descriptor.
 196  * 32-bytes and must be aligned on a 32-byte boundary.
 197  * All fields are in little endian order.
 198  */
 199 struct fit_sg_descriptor {
 200         uint32_t control;
 201         uint32_t byte_count;
 202         uint64_t host_side_addr;
 203         uint64_t dev_side_addr;
 204         uint64_t next_desc_ptr;
 205 };
 206
 207 #define FIT_SGD_CONTROL_NOT_LAST        0x000u
 208 #define FIT_SGD_CONTROL_LAST            0x40Eu
 209
 210 /*
 211  * Header at the beginning of a FIT message. The header
 212  * is followed by SSDI requests each 64 bytes.
 213  * A FIT message can be up to 512 bytes long and must start
 214  * on a 64-byte boundary.
 215  */
 216 struct fit_msg_hdr {
 217         uint8_t protocol_id;
 218         uint8_t num_protocol_cmds_coalesced;
 219         uint8_t _reserved[62];
 220 };
 221
 222 #define FIT_PROTOCOL_ID_FIT     1
 223 #define FIT_PROTOCOL_ID_SSDI    2
 224 #define FIT_PROTOCOL_ID_SOFIT   3
 225
 226
 227 #define FIT_PROTOCOL_MINOR_VER(mtd_val) ((mtd_val >> 16) & 0xF)
 228 #define FIT_PROTOCOL_MAJOR_VER(mtd_val) ((mtd_val >> 20) & 0xF)
 229
 230 /*
 231  * Format of a completion entry. The completion queue is circular
 232  * and must have at least as many entries as the maximum number
 233  * of commands that may be issued to the device.
 234  *
 235  * There are no head/tail pointers. The cycle value is used to
 236  * infer the presence of new completion records.
 237  * Initially the cycle in all entries is 0, the index is 0, and
 238  * the cycle value to expect is 1. When completions are added
 239  * their cycle values are set to 1. When the index wraps the
 240  * cycle value to expect is incremented.
 241  *
 242  * Command_context is opaque and taken verbatim from the SSDI command.
 243  * All other fields are big endian.
 244  */
 245 #define FIT_PROTOCOL_VERSION_0          0
 246
 247 /*
 248  *  Protocol major version 1 completion entry.
 249  *  The major protocol version is found in bits
 250  *  20-23 of the FIT_MTD_FITFW_INIT response.
 251  */
 252 struct fit_completion_entry_v1 {
 253         uint32_t        num_returned_bytes;
 254         uint16_t        tag;
 255         uint8_t         status;  /* SCSI status */
 256         uint8_t         cycle;
 257 };
 258 #define FIT_PROTOCOL_VERSION_1          1
 259 #define FIT_PROTOCOL_VERSION_CURRENT    FIT_PROTOCOL_VERSION_1
 260
 261 struct fit_comp_error_info {
 262         uint8_t         type:7; /* 00: Bits0-6 indicates the type of sense data. */
 263         uint8_t         valid:1; /* 00: Bit 7 := 1 ==> info field is valid. */
 264         uint8_t         reserved0; /* 01: Obsolete field */
 265         uint8_t         key:4; /* 02: Bits0-3 indicate the sense key. */
 266         uint8_t         reserved2:1; /* 02: Reserved bit. */
 267         uint8_t         bad_length:1; /* 02: Incorrect Length Indicator */
 268         uint8_t         end_medium:1; /* 02: End of Medium */
 269         uint8_t         file_mark:1; /* 02: Filemark */
 270         uint8_t         info[4]; /* 03: */
 271         uint8_t         reserved1; /* 07: Additional Sense Length */
 272         uint8_t         cmd_spec[4]; /* 08: Command Specific Information */
 273         uint8_t         code; /* 0C: Additional Sense Code */
 274         uint8_t         qual; /* 0D: Additional Sense Code Qualifier */
 275         uint8_t         fruc; /* 0E: Field Replaceable Unit Code */
 276         uint8_t         sks_high:7; /* 0F: Sense Key Specific (MSB) */
 277         uint8_t         sks_valid:1; /* 0F: Sense Key Specific Valid */
 278         uint16_t        sks_low; /* 10: Sense Key Specific (LSW) */
 279         uint16_t        reserved3; /* 12: Part of additional sense bytes (unused) */
 280         uint16_t        uec; /* 14: Additional Sense Bytes */
 281         uint64_t        per; /* 16: Additional Sense Bytes */
 282         uint8_t         reserved4[2]; /* 1E: Additional Sense Bytes (unused) */
 283 };
 284
 285
 286 /* Task management constants */
 287 #define SOFT_TASK_SIMPLE                0x00
 288 #define SOFT_TASK_HEAD_OF_QUEUE         0x01
 289 #define SOFT_TASK_ORDERED               0x02
 290
 291 /* Version zero has the last 32 bits reserved,
 292  * Version one has the last 32 bits sg_list_len_bytes;
 293  */
 294 struct skd_command_header {
 295         uint64_t        sg_list_dma_address;
 296         uint16_t        tag;
 297         uint8_t         attribute;
 298         uint8_t         add_cdb_len;     /* In 32 bit words */
 299         uint32_t        sg_list_len_bytes;
 300 };
 301
 302 struct skd_scsi_request {
 303         struct          skd_command_header hdr;
 304         unsigned char   cdb[16];
 305 /*      unsigned char _reserved[16]; */
 306 };
 307
 308 struct driver_inquiry_data {
 309         uint8_t         peripheral_device_type:5;
 310         uint8_t         qualifier:3;
 311         uint8_t         page_code;
 312         uint16_t        page_length;
 313         uint16_t        pcie_bus_number;
 314         uint8_t         pcie_device_number;
 315         uint8_t         pcie_function_number;
 316         uint8_t         pcie_link_speed;
 317         uint8_t         pcie_link_lanes;
 318         uint16_t        pcie_vendor_id;
 319         uint16_t        pcie_device_id;
 320         uint16_t        pcie_subsystem_vendor_id;
 321         uint16_t        pcie_subsystem_device_id;
 322         uint8_t         reserved1[2];
 323         uint8_t         reserved2[3];
 324         uint8_t         driver_version_length;
 325         uint8_t         driver_version[0x14];
 326 };
 327
 328 #pragma pack(pop, s1120_h)
 329
 330 #endif /* SKD_S1120_H */