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pvrusb2: reduce stack usage pvr2_eeprom_analyze()
[linux/fpc-iii.git] / drivers / net / ethernet / broadcom / bcmsysport.c
blobbe7ec5a76a54102eecabe99c45ffcf00a49a7713
1 /*
2 * Broadcom BCM7xxx System Port Ethernet MAC driver
3 *
4 * Copyright (C) 2014 Broadcom Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/netdevice.h>
18 #include <linux/etherdevice.h>
19 #include <linux/platform_device.h>
20 #include <linux/of.h>
21 #include <linux/of_net.h>
22 #include <linux/of_mdio.h>
23 #include <linux/phy.h>
24 #include <linux/phy_fixed.h>
25 #include <net/ip.h>
26 #include <net/ipv6.h>
27
28 #include "bcmsysport.h"
29
30 /* I/O accessors register helpers */
31 #define BCM_SYSPORT_IO_MACRO(name, offset) \
32 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off) \
33 { \
34 u32 reg = __raw_readl(priv->base + offset + off); \
35 return reg; \
36 } \
37 static inline void name##_writel(struct bcm_sysport_priv *priv, \
38 u32 val, u32 off) \
39 { \
40 __raw_writel(val, priv->base + offset + off); \
41 } \
42
43 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
44 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
45 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
46 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
47 BCM_SYSPORT_IO_MACRO(rdma, SYS_PORT_RDMA_OFFSET);
48 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
49 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
50 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
51 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
52 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
53
54 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
55 * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
56 */
57 #define BCM_SYSPORT_INTR_L2(which) \
58 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
59 u32 mask) \
60 { \
61 priv->irq##which##_mask &= ~(mask); \
62 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \
63 } \
64 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
65 u32 mask) \
66 { \
67 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \
68 priv->irq##which##_mask |= (mask); \
69 } \
70
71 BCM_SYSPORT_INTR_L2(0)
72 BCM_SYSPORT_INTR_L2(1)
73
74 /* Register accesses to GISB/RBUS registers are expensive (few hundred
75 * nanoseconds), so keep the check for 64-bits explicit here to save
76 * one register write per-packet on 32-bits platforms.
77 */
78 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
79 void __iomem *d,
80 dma_addr_t addr)
81 {
82 #ifdef CONFIG_PHYS_ADDR_T_64BIT
83 __raw_writel(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
84 d + DESC_ADDR_HI_STATUS_LEN);
85 #endif
86 __raw_writel(lower_32_bits(addr), d + DESC_ADDR_LO);
87 }
88
89 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
90 struct dma_desc *desc,
91 unsigned int port)
92 {
93 /* Ports are latched, so write upper address first */
94 tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
95 tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
96 }
97
98 /* Ethtool operations */
99 static int bcm_sysport_set_rx_csum(struct net_device *dev,
100 netdev_features_t wanted)
101 {
102 struct bcm_sysport_priv *priv = netdev_priv(dev);
103 u32 reg;
104
105 priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
106 reg = rxchk_readl(priv, RXCHK_CONTROL);
107 if (priv->rx_chk_en)
108 reg |= RXCHK_EN;
109 else
110 reg &= ~RXCHK_EN;
111
112 /* If UniMAC forwards CRC, we need to skip over it to get
113 * a valid CHK bit to be set in the per-packet status word
114 */
115 if (priv->rx_chk_en && priv->crc_fwd)
116 reg |= RXCHK_SKIP_FCS;
117 else
118 reg &= ~RXCHK_SKIP_FCS;
119
120 /* If Broadcom tags are enabled (e.g: using a switch), make
121 * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
122 * tag after the Ethernet MAC Source Address.
123 */
124 if (netdev_uses_dsa(dev))
125 reg |= RXCHK_BRCM_TAG_EN;
126 else
127 reg &= ~RXCHK_BRCM_TAG_EN;
128
129 rxchk_writel(priv, reg, RXCHK_CONTROL);
130
131 return 0;
132 }
133
134 static int bcm_sysport_set_tx_csum(struct net_device *dev,
135 netdev_features_t wanted)
136 {
137 struct bcm_sysport_priv *priv = netdev_priv(dev);
138 u32 reg;
139
140 /* Hardware transmit checksum requires us to enable the Transmit status
141 * block prepended to the packet contents
142 */
143 priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
144 reg = tdma_readl(priv, TDMA_CONTROL);
145 if (priv->tsb_en)
146 reg |= TSB_EN;
147 else
148 reg &= ~TSB_EN;
149 tdma_writel(priv, reg, TDMA_CONTROL);
150
151 return 0;
152 }
153
154 static int bcm_sysport_set_features(struct net_device *dev,
155 netdev_features_t features)
156 {
157 netdev_features_t changed = features ^ dev->features;
158 netdev_features_t wanted = dev->wanted_features;
159 int ret = 0;
160
161 if (changed & NETIF_F_RXCSUM)
162 ret = bcm_sysport_set_rx_csum(dev, wanted);
163 if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
164 ret = bcm_sysport_set_tx_csum(dev, wanted);
165
166 return ret;
167 }
168
169 /* Hardware counters must be kept in sync because the order/offset
170 * is important here (order in structure declaration = order in hardware)
171 */
172 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
173 /* general stats */
174 STAT_NETDEV(rx_packets),
175 STAT_NETDEV(tx_packets),
176 STAT_NETDEV(rx_bytes),
177 STAT_NETDEV(tx_bytes),
178 STAT_NETDEV(rx_errors),
179 STAT_NETDEV(tx_errors),
180 STAT_NETDEV(rx_dropped),
181 STAT_NETDEV(tx_dropped),
182 STAT_NETDEV(multicast),
183 /* UniMAC RSV counters */
184 STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
185 STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
186 STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
187 STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
188 STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
189 STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
190 STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
191 STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
192 STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
193 STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
194 STAT_MIB_RX("rx_pkts", mib.rx.pkt),
195 STAT_MIB_RX("rx_bytes", mib.rx.bytes),
196 STAT_MIB_RX("rx_multicast", mib.rx.mca),
197 STAT_MIB_RX("rx_broadcast", mib.rx.bca),
198 STAT_MIB_RX("rx_fcs", mib.rx.fcs),
199 STAT_MIB_RX("rx_control", mib.rx.cf),
200 STAT_MIB_RX("rx_pause", mib.rx.pf),
201 STAT_MIB_RX("rx_unknown", mib.rx.uo),
202 STAT_MIB_RX("rx_align", mib.rx.aln),
203 STAT_MIB_RX("rx_outrange", mib.rx.flr),
204 STAT_MIB_RX("rx_code", mib.rx.cde),
205 STAT_MIB_RX("rx_carrier", mib.rx.fcr),
206 STAT_MIB_RX("rx_oversize", mib.rx.ovr),
207 STAT_MIB_RX("rx_jabber", mib.rx.jbr),
208 STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
209 STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
210 STAT_MIB_RX("rx_unicast", mib.rx.uc),
211 STAT_MIB_RX("rx_ppp", mib.rx.ppp),
212 STAT_MIB_RX("rx_crc", mib.rx.rcrc),
213 /* UniMAC TSV counters */
214 STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
215 STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
216 STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
217 STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
218 STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
219 STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
220 STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
221 STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
222 STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
223 STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
224 STAT_MIB_TX("tx_pkts", mib.tx.pkts),
225 STAT_MIB_TX("tx_multicast", mib.tx.mca),
226 STAT_MIB_TX("tx_broadcast", mib.tx.bca),
227 STAT_MIB_TX("tx_pause", mib.tx.pf),
228 STAT_MIB_TX("tx_control", mib.tx.cf),
229 STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
230 STAT_MIB_TX("tx_oversize", mib.tx.ovr),
231 STAT_MIB_TX("tx_defer", mib.tx.drf),
232 STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
233 STAT_MIB_TX("tx_single_col", mib.tx.scl),
234 STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
235 STAT_MIB_TX("tx_late_col", mib.tx.lcl),
236 STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
237 STAT_MIB_TX("tx_frags", mib.tx.frg),
238 STAT_MIB_TX("tx_total_col", mib.tx.ncl),
239 STAT_MIB_TX("tx_jabber", mib.tx.jbr),
240 STAT_MIB_TX("tx_bytes", mib.tx.bytes),
241 STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
242 STAT_MIB_TX("tx_unicast", mib.tx.uc),
243 /* UniMAC RUNT counters */
244 STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
245 STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
246 STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
247 STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
248 /* RXCHK misc statistics */
249 STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
250 STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
251 RXCHK_OTHER_DISC_CNTR),
252 /* RBUF misc statistics */
253 STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
254 STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
255 STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed),
256 STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed),
257 STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed),
258 };
259
260 #define BCM_SYSPORT_STATS_LEN ARRAY_SIZE(bcm_sysport_gstrings_stats)
261
262 static void bcm_sysport_get_drvinfo(struct net_device *dev,
263 struct ethtool_drvinfo *info)
264 {
265 strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
266 strlcpy(info->version, "0.1", sizeof(info->version));
267 strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
268 }
269
270 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
271 {
272 struct bcm_sysport_priv *priv = netdev_priv(dev);
273
274 return priv->msg_enable;
275 }
276
277 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
278 {
279 struct bcm_sysport_priv *priv = netdev_priv(dev);
280
281 priv->msg_enable = enable;
282 }
283
284 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
285 {
286 switch (string_set) {
287 case ETH_SS_STATS:
288 return BCM_SYSPORT_STATS_LEN;
289 default:
290 return -EOPNOTSUPP;
291 }
292 }
293
294 static void bcm_sysport_get_strings(struct net_device *dev,
295 u32 stringset, u8 *data)
296 {
297 int i;
298
299 switch (stringset) {
300 case ETH_SS_STATS:
301 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
302 memcpy(data + i * ETH_GSTRING_LEN,
303 bcm_sysport_gstrings_stats[i].stat_string,
304 ETH_GSTRING_LEN);
305 }
306 break;
307 default:
308 break;
309 }
310 }
311
312 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
313 {
314 int i, j = 0;
315
316 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
317 const struct bcm_sysport_stats *s;
318 u8 offset = 0;
319 u32 val = 0;
320 char *p;
321
322 s = &bcm_sysport_gstrings_stats[i];
323 switch (s->type) {
324 case BCM_SYSPORT_STAT_NETDEV:
325 case BCM_SYSPORT_STAT_SOFT:
326 continue;
327 case BCM_SYSPORT_STAT_MIB_RX:
328 case BCM_SYSPORT_STAT_MIB_TX:
329 case BCM_SYSPORT_STAT_RUNT:
330 if (s->type != BCM_SYSPORT_STAT_MIB_RX)
331 offset = UMAC_MIB_STAT_OFFSET;
332 val = umac_readl(priv, UMAC_MIB_START + j + offset);
333 break;
334 case BCM_SYSPORT_STAT_RXCHK:
335 val = rxchk_readl(priv, s->reg_offset);
336 if (val == ~0)
337 rxchk_writel(priv, 0, s->reg_offset);
338 break;
339 case BCM_SYSPORT_STAT_RBUF:
340 val = rbuf_readl(priv, s->reg_offset);
341 if (val == ~0)
342 rbuf_writel(priv, 0, s->reg_offset);
343 break;
344 }
345
346 j += s->stat_sizeof;
347 p = (char *)priv + s->stat_offset;
348 *(u32 *)p = val;
349 }
350
351 netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
352 }
353
354 static void bcm_sysport_get_stats(struct net_device *dev,
355 struct ethtool_stats *stats, u64 *data)
356 {
357 struct bcm_sysport_priv *priv = netdev_priv(dev);
358 int i;
359
360 if (netif_running(dev))
361 bcm_sysport_update_mib_counters(priv);
362
363 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
364 const struct bcm_sysport_stats *s;
365 char *p;
366
367 s = &bcm_sysport_gstrings_stats[i];
368 if (s->type == BCM_SYSPORT_STAT_NETDEV)
369 p = (char *)&dev->stats;
370 else
371 p = (char *)priv;
372 p += s->stat_offset;
373 data[i] = *(unsigned long *)p;
374 }
375 }
376
377 static void bcm_sysport_get_wol(struct net_device *dev,
378 struct ethtool_wolinfo *wol)
379 {
380 struct bcm_sysport_priv *priv = netdev_priv(dev);
381 u32 reg;
382
383 wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
384 wol->wolopts = priv->wolopts;
385
386 if (!(priv->wolopts & WAKE_MAGICSECURE))
387 return;
388
389 /* Return the programmed SecureOn password */
390 reg = umac_readl(priv, UMAC_PSW_MS);
391 put_unaligned_be16(reg, &wol->sopass[0]);
392 reg = umac_readl(priv, UMAC_PSW_LS);
393 put_unaligned_be32(reg, &wol->sopass[2]);
394 }
395
396 static int bcm_sysport_set_wol(struct net_device *dev,
397 struct ethtool_wolinfo *wol)
398 {
399 struct bcm_sysport_priv *priv = netdev_priv(dev);
400 struct device *kdev = &priv->pdev->dev;
401 u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE;
402
403 if (!device_can_wakeup(kdev))
404 return -ENOTSUPP;
405
406 if (wol->wolopts & ~supported)
407 return -EINVAL;
408
409 /* Program the SecureOn password */
410 if (wol->wolopts & WAKE_MAGICSECURE) {
411 umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
412 UMAC_PSW_MS);
413 umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
414 UMAC_PSW_LS);
415 }
416
417 /* Flag the device and relevant IRQ as wakeup capable */
418 if (wol->wolopts) {
419 device_set_wakeup_enable(kdev, 1);
420 if (priv->wol_irq_disabled)
421 enable_irq_wake(priv->wol_irq);
422 priv->wol_irq_disabled = 0;
423 } else {
424 device_set_wakeup_enable(kdev, 0);
425 /* Avoid unbalanced disable_irq_wake calls */
426 if (!priv->wol_irq_disabled)
427 disable_irq_wake(priv->wol_irq);
428 priv->wol_irq_disabled = 1;
429 }
430
431 priv->wolopts = wol->wolopts;
432
433 return 0;
434 }
435
436 static int bcm_sysport_get_coalesce(struct net_device *dev,
437 struct ethtool_coalesce *ec)
438 {
439 struct bcm_sysport_priv *priv = netdev_priv(dev);
440 u32 reg;
441
442 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0));
443
444 ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000;
445 ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK;
446
447 reg = rdma_readl(priv, RDMA_MBDONE_INTR);
448
449 ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000;
450 ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK;
451
452 return 0;
453 }
454
455 static int bcm_sysport_set_coalesce(struct net_device *dev,
456 struct ethtool_coalesce *ec)
457 {
458 struct bcm_sysport_priv *priv = netdev_priv(dev);
459 unsigned int i;
460 u32 reg;
461
462 /* Base system clock is 125Mhz, DMA timeout is this reference clock
463 * divided by 1024, which yield roughly 8.192 us, our maximum value has
464 * to fit in the RING_TIMEOUT_MASK (16 bits).
465 */
466 if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK ||
467 ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 ||
468 ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK ||
469 ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1)
470 return -EINVAL;
471
472 if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) ||
473 (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0))
474 return -EINVAL;
475
476 for (i = 0; i < dev->num_tx_queues; i++) {
477 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(i));
478 reg &= ~(RING_INTR_THRESH_MASK |
479 RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT);
480 reg |= ec->tx_max_coalesced_frames;
481 reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) <<
482 RING_TIMEOUT_SHIFT;
483 tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(i));
484 }
485
486 reg = rdma_readl(priv, RDMA_MBDONE_INTR);
487 reg &= ~(RDMA_INTR_THRESH_MASK |
488 RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT);
489 reg |= ec->rx_max_coalesced_frames;
490 reg |= DIV_ROUND_UP(ec->rx_coalesce_usecs * 1000, 8192) <<
491 RDMA_TIMEOUT_SHIFT;
492 rdma_writel(priv, reg, RDMA_MBDONE_INTR);
493
494 return 0;
495 }
496
497 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
498 {
499 dev_kfree_skb_any(cb->skb);
500 cb->skb = NULL;
501 dma_unmap_addr_set(cb, dma_addr, 0);
502 }
503
504 static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
505 struct bcm_sysport_cb *cb)
506 {
507 struct device *kdev = &priv->pdev->dev;
508 struct net_device *ndev = priv->netdev;
509 struct sk_buff *skb, *rx_skb;
510 dma_addr_t mapping;
511
512 /* Allocate a new SKB for a new packet */
513 skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
514 if (!skb) {
515 priv->mib.alloc_rx_buff_failed++;
516 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
517 return NULL;
518 }
519
520 mapping = dma_map_single(kdev, skb->data,
521 RX_BUF_LENGTH, DMA_FROM_DEVICE);
522 if (dma_mapping_error(kdev, mapping)) {
523 priv->mib.rx_dma_failed++;
524 dev_kfree_skb_any(skb);
525 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
526 return NULL;
527 }
528
529 /* Grab the current SKB on the ring */
530 rx_skb = cb->skb;
531 if (likely(rx_skb))
532 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
533 RX_BUF_LENGTH, DMA_FROM_DEVICE);
534
535 /* Put the new SKB on the ring */
536 cb->skb = skb;
537 dma_unmap_addr_set(cb, dma_addr, mapping);
538 dma_desc_set_addr(priv, cb->bd_addr, mapping);
539
540 netif_dbg(priv, rx_status, ndev, "RX refill\n");
541
542 /* Return the current SKB to the caller */
543 return rx_skb;
544 }
545
546 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
547 {
548 struct bcm_sysport_cb *cb;
549 struct sk_buff *skb;
550 unsigned int i;
551
552 for (i = 0; i < priv->num_rx_bds; i++) {
553 cb = &priv->rx_cbs[i];
554 skb = bcm_sysport_rx_refill(priv, cb);
555 if (skb)
556 dev_kfree_skb(skb);
557 if (!cb->skb)
558 return -ENOMEM;
559 }
560
561 return 0;
562 }
563
564 /* Poll the hardware for up to budget packets to process */
565 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
566 unsigned int budget)
567 {
568 struct net_device *ndev = priv->netdev;
569 unsigned int processed = 0, to_process;
570 struct bcm_sysport_cb *cb;
571 struct sk_buff *skb;
572 unsigned int p_index;
573 u16 len, status;
574 struct bcm_rsb *rsb;
575
576 /* Determine how much we should process since last call */
577 p_index = rdma_readl(priv, RDMA_PROD_INDEX);
578 p_index &= RDMA_PROD_INDEX_MASK;
579
580 if (p_index < priv->rx_c_index)
581 to_process = (RDMA_CONS_INDEX_MASK + 1) -
582 priv->rx_c_index + p_index;
583 else
584 to_process = p_index - priv->rx_c_index;
585
586 netif_dbg(priv, rx_status, ndev,
587 "p_index=%d rx_c_index=%d to_process=%d\n",
588 p_index, priv->rx_c_index, to_process);
589
590 while ((processed < to_process) && (processed < budget)) {
591 cb = &priv->rx_cbs[priv->rx_read_ptr];
592 skb = bcm_sysport_rx_refill(priv, cb);
593
594
595 /* We do not have a backing SKB, so we do not a corresponding
596 * DMA mapping for this incoming packet since
597 * bcm_sysport_rx_refill always either has both skb and mapping
598 * or none.
599 */
600 if (unlikely(!skb)) {
601 netif_err(priv, rx_err, ndev, "out of memory!\n");
602 ndev->stats.rx_dropped++;
603 ndev->stats.rx_errors++;
604 goto next;
605 }
606
607 /* Extract the Receive Status Block prepended */
608 rsb = (struct bcm_rsb *)skb->data;
609 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
610 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
611 DESC_STATUS_MASK;
612
613 netif_dbg(priv, rx_status, ndev,
614 "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
615 p_index, priv->rx_c_index, priv->rx_read_ptr,
616 len, status);
617
618 if (unlikely(len > RX_BUF_LENGTH)) {
619 netif_err(priv, rx_status, ndev, "oversized packet\n");
620 ndev->stats.rx_length_errors++;
621 ndev->stats.rx_errors++;
622 dev_kfree_skb_any(skb);
623 goto next;
624 }
625
626 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
627 netif_err(priv, rx_status, ndev, "fragmented packet!\n");
628 ndev->stats.rx_dropped++;
629 ndev->stats.rx_errors++;
630 dev_kfree_skb_any(skb);
631 goto next;
632 }
633
634 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
635 netif_err(priv, rx_err, ndev, "error packet\n");
636 if (status & RX_STATUS_OVFLOW)
637 ndev->stats.rx_over_errors++;
638 ndev->stats.rx_dropped++;
639 ndev->stats.rx_errors++;
640 dev_kfree_skb_any(skb);
641 goto next;
642 }
643
644 skb_put(skb, len);
645
646 /* Hardware validated our checksum */
647 if (likely(status & DESC_L4_CSUM))
648 skb->ip_summed = CHECKSUM_UNNECESSARY;
649
650 /* Hardware pre-pends packets with 2bytes before Ethernet
651 * header plus we have the Receive Status Block, strip off all
652 * of this from the SKB.
653 */
654 skb_pull(skb, sizeof(*rsb) + 2);
655 len -= (sizeof(*rsb) + 2);
656
657 /* UniMAC may forward CRC */
658 if (priv->crc_fwd) {
659 skb_trim(skb, len - ETH_FCS_LEN);
660 len -= ETH_FCS_LEN;
661 }
662
663 skb->protocol = eth_type_trans(skb, ndev);
664 ndev->stats.rx_packets++;
665 ndev->stats.rx_bytes += len;
666
667 napi_gro_receive(&priv->napi, skb);
668 next:
669 processed++;
670 priv->rx_read_ptr++;
671
672 if (priv->rx_read_ptr == priv->num_rx_bds)
673 priv->rx_read_ptr = 0;
674 }
675
676 return processed;
677 }
678
679 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_priv *priv,
680 struct bcm_sysport_cb *cb,
681 unsigned int *bytes_compl,
682 unsigned int *pkts_compl)
683 {
684 struct device *kdev = &priv->pdev->dev;
685 struct net_device *ndev = priv->netdev;
686
687 if (cb->skb) {
688 ndev->stats.tx_bytes += cb->skb->len;
689 *bytes_compl += cb->skb->len;
690 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
691 dma_unmap_len(cb, dma_len),
692 DMA_TO_DEVICE);
693 ndev->stats.tx_packets++;
694 (*pkts_compl)++;
695 bcm_sysport_free_cb(cb);
696 /* SKB fragment */
697 } else if (dma_unmap_addr(cb, dma_addr)) {
698 ndev->stats.tx_bytes += dma_unmap_len(cb, dma_len);
699 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
700 dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
701 dma_unmap_addr_set(cb, dma_addr, 0);
702 }
703 }
704
705 /* Reclaim queued SKBs for transmission completion, lockless version */
706 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
707 struct bcm_sysport_tx_ring *ring)
708 {
709 struct net_device *ndev = priv->netdev;
710 unsigned int c_index, last_c_index, last_tx_cn, num_tx_cbs;
711 unsigned int pkts_compl = 0, bytes_compl = 0;
712 struct bcm_sysport_cb *cb;
713 u32 hw_ind;
714
715 /* Compute how many descriptors have been processed since last call */
716 hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
717 c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
718 ring->p_index = (hw_ind & RING_PROD_INDEX_MASK);
719
720 last_c_index = ring->c_index;
721 num_tx_cbs = ring->size;
722
723 c_index &= (num_tx_cbs - 1);
724
725 if (c_index >= last_c_index)
726 last_tx_cn = c_index - last_c_index;
727 else
728 last_tx_cn = num_tx_cbs - last_c_index + c_index;
729
730 netif_dbg(priv, tx_done, ndev,
731 "ring=%d c_index=%d last_tx_cn=%d last_c_index=%d\n",
732 ring->index, c_index, last_tx_cn, last_c_index);
733
734 while (last_tx_cn-- > 0) {
735 cb = ring->cbs + last_c_index;
736 bcm_sysport_tx_reclaim_one(priv, cb, &bytes_compl, &pkts_compl);
737
738 ring->desc_count++;
739 last_c_index++;
740 last_c_index &= (num_tx_cbs - 1);
741 }
742
743 ring->c_index = c_index;
744
745 netif_dbg(priv, tx_done, ndev,
746 "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
747 ring->index, ring->c_index, pkts_compl, bytes_compl);
748
749 return pkts_compl;
750 }
751
752 /* Locked version of the per-ring TX reclaim routine */
753 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
754 struct bcm_sysport_tx_ring *ring)
755 {
756 struct netdev_queue *txq;
757 unsigned int released;
758 unsigned long flags;
759
760 txq = netdev_get_tx_queue(priv->netdev, ring->index);
761
762 spin_lock_irqsave(&ring->lock, flags);
763 released = __bcm_sysport_tx_reclaim(priv, ring);
764 if (released)
765 netif_tx_wake_queue(txq);
766
767 spin_unlock_irqrestore(&ring->lock, flags);
768
769 return released;
770 }
771
772 /* Locked version of the per-ring TX reclaim, but does not wake the queue */
773 static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv,
774 struct bcm_sysport_tx_ring *ring)
775 {
776 unsigned long flags;
777
778 spin_lock_irqsave(&ring->lock, flags);
779 __bcm_sysport_tx_reclaim(priv, ring);
780 spin_unlock_irqrestore(&ring->lock, flags);
781 }
782
783 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
784 {
785 struct bcm_sysport_tx_ring *ring =
786 container_of(napi, struct bcm_sysport_tx_ring, napi);
787 unsigned int work_done = 0;
788
789 work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
790
791 if (work_done == 0) {
792 napi_complete(napi);
793 /* re-enable TX interrupt */
794 intrl2_1_mask_clear(ring->priv, BIT(ring->index));
795
796 return 0;
797 }
798
799 return budget;
800 }
801
802 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
803 {
804 unsigned int q;
805
806 for (q = 0; q < priv->netdev->num_tx_queues; q++)
807 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
808 }
809
810 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
811 {
812 struct bcm_sysport_priv *priv =
813 container_of(napi, struct bcm_sysport_priv, napi);
814 unsigned int work_done = 0;
815
816 work_done = bcm_sysport_desc_rx(priv, budget);
817
818 priv->rx_c_index += work_done;
819 priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
820 rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
821
822 if (work_done < budget) {
823 napi_complete_done(napi, work_done);
824 /* re-enable RX interrupts */
825 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
826 }
827
828 return work_done;
829 }
830
831 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
832 {
833 u32 reg;
834
835 /* Stop monitoring MPD interrupt */
836 intrl2_0_mask_set(priv, INTRL2_0_MPD);
837
838 /* Clear the MagicPacket detection logic */
839 reg = umac_readl(priv, UMAC_MPD_CTRL);
840 reg &= ~MPD_EN;
841 umac_writel(priv, reg, UMAC_MPD_CTRL);
842
843 netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
844 }
845
846 /* RX and misc interrupt routine */
847 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
848 {
849 struct net_device *dev = dev_id;
850 struct bcm_sysport_priv *priv = netdev_priv(dev);
851
852 priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
853 ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
854 intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
855
856 if (unlikely(priv->irq0_stat == 0)) {
857 netdev_warn(priv->netdev, "spurious RX interrupt\n");
858 return IRQ_NONE;
859 }
860
861 if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
862 if (likely(napi_schedule_prep(&priv->napi))) {
863 /* disable RX interrupts */
864 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
865 __napi_schedule_irqoff(&priv->napi);
866 }
867 }
868
869 /* TX ring is full, perform a full reclaim since we do not know
870 * which one would trigger this interrupt
871 */
872 if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
873 bcm_sysport_tx_reclaim_all(priv);
874
875 if (priv->irq0_stat & INTRL2_0_MPD) {
876 netdev_info(priv->netdev, "Wake-on-LAN interrupt!\n");
877 bcm_sysport_resume_from_wol(priv);
878 }
879
880 return IRQ_HANDLED;
881 }
882
883 /* TX interrupt service routine */
884 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
885 {
886 struct net_device *dev = dev_id;
887 struct bcm_sysport_priv *priv = netdev_priv(dev);
888 struct bcm_sysport_tx_ring *txr;
889 unsigned int ring;
890
891 priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
892 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
893 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
894
895 if (unlikely(priv->irq1_stat == 0)) {
896 netdev_warn(priv->netdev, "spurious TX interrupt\n");
897 return IRQ_NONE;
898 }
899
900 for (ring = 0; ring < dev->num_tx_queues; ring++) {
901 if (!(priv->irq1_stat & BIT(ring)))
902 continue;
903
904 txr = &priv->tx_rings[ring];
905
906 if (likely(napi_schedule_prep(&txr->napi))) {
907 intrl2_1_mask_set(priv, BIT(ring));
908 __napi_schedule_irqoff(&txr->napi);
909 }
910 }
911
912 return IRQ_HANDLED;
913 }
914
915 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
916 {
917 struct bcm_sysport_priv *priv = dev_id;
918
919 pm_wakeup_event(&priv->pdev->dev, 0);
920
921 return IRQ_HANDLED;
922 }
923
924 #ifdef CONFIG_NET_POLL_CONTROLLER
925 static void bcm_sysport_poll_controller(struct net_device *dev)
926 {
927 struct bcm_sysport_priv *priv = netdev_priv(dev);
928
929 disable_irq(priv->irq0);
930 bcm_sysport_rx_isr(priv->irq0, priv);
931 enable_irq(priv->irq0);
932
933 disable_irq(priv->irq1);
934 bcm_sysport_tx_isr(priv->irq1, priv);
935 enable_irq(priv->irq1);
936 }
937 #endif
938
939 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb,
940 struct net_device *dev)
941 {
942 struct sk_buff *nskb;
943 struct bcm_tsb *tsb;
944 u32 csum_info;
945 u8 ip_proto;
946 u16 csum_start;
947 u16 ip_ver;
948
949 /* Re-allocate SKB if needed */
950 if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
951 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
952 dev_kfree_skb(skb);
953 if (!nskb) {
954 dev->stats.tx_errors++;
955 dev->stats.tx_dropped++;
956 return NULL;
957 }
958 skb = nskb;
959 }
960
961 tsb = (struct bcm_tsb *)skb_push(skb, sizeof(*tsb));
962 /* Zero-out TSB by default */
963 memset(tsb, 0, sizeof(*tsb));
964
965 if (skb->ip_summed == CHECKSUM_PARTIAL) {
966 ip_ver = htons(skb->protocol);
967 switch (ip_ver) {
968 case ETH_P_IP:
969 ip_proto = ip_hdr(skb)->protocol;
970 break;
971 case ETH_P_IPV6:
972 ip_proto = ipv6_hdr(skb)->nexthdr;
973 break;
974 default:
975 return skb;
976 }
977
978 /* Get the checksum offset and the L4 (transport) offset */
979 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
980 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
981 csum_info |= (csum_start << L4_PTR_SHIFT);
982
983 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
984 csum_info |= L4_LENGTH_VALID;
985 if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP)
986 csum_info |= L4_UDP;
987 } else {
988 csum_info = 0;
989 }
990
991 tsb->l4_ptr_dest_map = csum_info;
992 }
993
994 return skb;
995 }
996
997 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
998 struct net_device *dev)
999 {
1000 struct bcm_sysport_priv *priv = netdev_priv(dev);
1001 struct device *kdev = &priv->pdev->dev;
1002 struct bcm_sysport_tx_ring *ring;
1003 struct bcm_sysport_cb *cb;
1004 struct netdev_queue *txq;
1005 struct dma_desc *desc;
1006 unsigned int skb_len;
1007 unsigned long flags;
1008 dma_addr_t mapping;
1009 u32 len_status;
1010 u16 queue;
1011 int ret;
1012
1013 queue = skb_get_queue_mapping(skb);
1014 txq = netdev_get_tx_queue(dev, queue);
1015 ring = &priv->tx_rings[queue];
1016
1017 /* lock against tx reclaim in BH context and TX ring full interrupt */
1018 spin_lock_irqsave(&ring->lock, flags);
1019 if (unlikely(ring->desc_count == 0)) {
1020 netif_tx_stop_queue(txq);
1021 netdev_err(dev, "queue %d awake and ring full!\n", queue);
1022 ret = NETDEV_TX_BUSY;
1023 goto out;
1024 }
1025
1026 /* Insert TSB and checksum infos */
1027 if (priv->tsb_en) {
1028 skb = bcm_sysport_insert_tsb(skb, dev);
1029 if (!skb) {
1030 ret = NETDEV_TX_OK;
1031 goto out;
1032 }
1033 }
1034
1035 /* The Ethernet switch we are interfaced with needs packets to be at
1036 * least 64 bytes (including FCS) otherwise they will be discarded when
1037 * they enter the switch port logic. When Broadcom tags are enabled, we
1038 * need to make sure that packets are at least 68 bytes
1039 * (including FCS and tag) because the length verification is done after
1040 * the Broadcom tag is stripped off the ingress packet.
1041 */
1042 if (skb_padto(skb, ETH_ZLEN + ENET_BRCM_TAG_LEN)) {
1043 ret = NETDEV_TX_OK;
1044 goto out;
1045 }
1046
1047 skb_len = skb->len < ETH_ZLEN + ENET_BRCM_TAG_LEN ?
1048 ETH_ZLEN + ENET_BRCM_TAG_LEN : skb->len;
1049
1050 mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
1051 if (dma_mapping_error(kdev, mapping)) {
1052 priv->mib.tx_dma_failed++;
1053 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
1054 skb->data, skb_len);
1055 ret = NETDEV_TX_OK;
1056 goto out;
1057 }
1058
1059 /* Remember the SKB for future freeing */
1060 cb = &ring->cbs[ring->curr_desc];
1061 cb->skb = skb;
1062 dma_unmap_addr_set(cb, dma_addr, mapping);
1063 dma_unmap_len_set(cb, dma_len, skb_len);
1064
1065 /* Fetch a descriptor entry from our pool */
1066 desc = ring->desc_cpu;
1067
1068 desc->addr_lo = lower_32_bits(mapping);
1069 len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
1070 len_status |= (skb_len << DESC_LEN_SHIFT);
1071 len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
1072 DESC_STATUS_SHIFT;
1073 if (skb->ip_summed == CHECKSUM_PARTIAL)
1074 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
1075
1076 ring->curr_desc++;
1077 if (ring->curr_desc == ring->size)
1078 ring->curr_desc = 0;
1079 ring->desc_count--;
1080
1081 /* Ensure write completion of the descriptor status/length
1082 * in DRAM before the System Port WRITE_PORT register latches
1083 * the value
1084 */
1085 wmb();
1086 desc->addr_status_len = len_status;
1087 wmb();
1088
1089 /* Write this descriptor address to the RING write port */
1090 tdma_port_write_desc_addr(priv, desc, ring->index);
1091
1092 /* Check ring space and update SW control flow */
1093 if (ring->desc_count == 0)
1094 netif_tx_stop_queue(txq);
1095
1096 netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1097 ring->index, ring->desc_count, ring->curr_desc);
1098
1099 ret = NETDEV_TX_OK;
1100 out:
1101 spin_unlock_irqrestore(&ring->lock, flags);
1102 return ret;
1103 }
1104
1105 static void bcm_sysport_tx_timeout(struct net_device *dev)
1106 {
1107 netdev_warn(dev, "transmit timeout!\n");
1108
1109 netif_trans_update(dev);
1110 dev->stats.tx_errors++;
1111
1112 netif_tx_wake_all_queues(dev);
1113 }
1114
1115 /* phylib adjust link callback */
1116 static void bcm_sysport_adj_link(struct net_device *dev)
1117 {
1118 struct bcm_sysport_priv *priv = netdev_priv(dev);
1119 struct phy_device *phydev = dev->phydev;
1120 unsigned int changed = 0;
1121 u32 cmd_bits = 0, reg;
1122
1123 if (priv->old_link != phydev->link) {
1124 changed = 1;
1125 priv->old_link = phydev->link;
1126 }
1127
1128 if (priv->old_duplex != phydev->duplex) {
1129 changed = 1;
1130 priv->old_duplex = phydev->duplex;
1131 }
1132
1133 switch (phydev->speed) {
1134 case SPEED_2500:
1135 cmd_bits = CMD_SPEED_2500;
1136 break;
1137 case SPEED_1000:
1138 cmd_bits = CMD_SPEED_1000;
1139 break;
1140 case SPEED_100:
1141 cmd_bits = CMD_SPEED_100;
1142 break;
1143 case SPEED_10:
1144 cmd_bits = CMD_SPEED_10;
1145 break;
1146 default:
1147 break;
1148 }
1149 cmd_bits <<= CMD_SPEED_SHIFT;
1150
1151 if (phydev->duplex == DUPLEX_HALF)
1152 cmd_bits |= CMD_HD_EN;
1153
1154 if (priv->old_pause != phydev->pause) {
1155 changed = 1;
1156 priv->old_pause = phydev->pause;
1157 }
1158
1159 if (!phydev->pause)
1160 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1161
1162 if (!changed)
1163 return;
1164
1165 if (phydev->link) {
1166 reg = umac_readl(priv, UMAC_CMD);
1167 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1168 CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1169 CMD_TX_PAUSE_IGNORE);
1170 reg |= cmd_bits;
1171 umac_writel(priv, reg, UMAC_CMD);
1172 }
1173
1174 phy_print_status(phydev);
1175 }
1176
1177 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1178 unsigned int index)
1179 {
1180 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1181 struct device *kdev = &priv->pdev->dev;
1182 size_t size;
1183 void *p;
1184 u32 reg;
1185
1186 /* Simple descriptors partitioning for now */
1187 size = 256;
1188
1189 /* We just need one DMA descriptor which is DMA-able, since writing to
1190 * the port will allocate a new descriptor in its internal linked-list
1191 */
1192 p = dma_zalloc_coherent(kdev, sizeof(struct dma_desc), &ring->desc_dma,
1193 GFP_KERNEL);
1194 if (!p) {
1195 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1196 return -ENOMEM;
1197 }
1198
1199 ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1200 if (!ring->cbs) {
1201 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1202 return -ENOMEM;
1203 }
1204
1205 /* Initialize SW view of the ring */
1206 spin_lock_init(&ring->lock);
1207 ring->priv = priv;
1208 netif_tx_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1209 ring->index = index;
1210 ring->size = size;
1211 ring->alloc_size = ring->size;
1212 ring->desc_cpu = p;
1213 ring->desc_count = ring->size;
1214 ring->curr_desc = 0;
1215
1216 /* Initialize HW ring */
1217 tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1218 tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1219 tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1220 tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1221 tdma_writel(priv, RING_IGNORE_STATUS, TDMA_DESC_RING_MAPPING(index));
1222 tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1223
1224 /* Program the number of descriptors as MAX_THRESHOLD and half of
1225 * its size for the hysteresis trigger
1226 */
1227 tdma_writel(priv, ring->size |
1228 1 << RING_HYST_THRESH_SHIFT,
1229 TDMA_DESC_RING_MAX_HYST(index));
1230
1231 /* Enable the ring queue in the arbiter */
1232 reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1233 reg |= (1 << index);
1234 tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1235
1236 napi_enable(&ring->napi);
1237
1238 netif_dbg(priv, hw, priv->netdev,
1239 "TDMA cfg, size=%d, desc_cpu=%p\n",
1240 ring->size, ring->desc_cpu);
1241
1242 return 0;
1243 }
1244
1245 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1246 unsigned int index)
1247 {
1248 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1249 struct device *kdev = &priv->pdev->dev;
1250 u32 reg;
1251
1252 /* Caller should stop the TDMA engine */
1253 reg = tdma_readl(priv, TDMA_STATUS);
1254 if (!(reg & TDMA_DISABLED))
1255 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1256
1257 /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could
1258 * fail, so by checking this pointer we know whether the TX ring was
1259 * fully initialized or not.
1260 */
1261 if (!ring->cbs)
1262 return;
1263
1264 napi_disable(&ring->napi);
1265 netif_napi_del(&ring->napi);
1266
1267 bcm_sysport_tx_clean(priv, ring);
1268
1269 kfree(ring->cbs);
1270 ring->cbs = NULL;
1271
1272 if (ring->desc_dma) {
1273 dma_free_coherent(kdev, sizeof(struct dma_desc),
1274 ring->desc_cpu, ring->desc_dma);
1275 ring->desc_dma = 0;
1276 }
1277 ring->size = 0;
1278 ring->alloc_size = 0;
1279
1280 netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1281 }
1282
1283 /* RDMA helper */
1284 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1285 unsigned int enable)
1286 {
1287 unsigned int timeout = 1000;
1288 u32 reg;
1289
1290 reg = rdma_readl(priv, RDMA_CONTROL);
1291 if (enable)
1292 reg |= RDMA_EN;
1293 else
1294 reg &= ~RDMA_EN;
1295 rdma_writel(priv, reg, RDMA_CONTROL);
1296
1297 /* Poll for RMDA disabling completion */
1298 do {
1299 reg = rdma_readl(priv, RDMA_STATUS);
1300 if (!!(reg & RDMA_DISABLED) == !enable)
1301 return 0;
1302 usleep_range(1000, 2000);
1303 } while (timeout-- > 0);
1304
1305 netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1306
1307 return -ETIMEDOUT;
1308 }
1309
1310 /* TDMA helper */
1311 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1312 unsigned int enable)
1313 {
1314 unsigned int timeout = 1000;
1315 u32 reg;
1316
1317 reg = tdma_readl(priv, TDMA_CONTROL);
1318 if (enable)
1319 reg |= TDMA_EN;
1320 else
1321 reg &= ~TDMA_EN;
1322 tdma_writel(priv, reg, TDMA_CONTROL);
1323
1324 /* Poll for TMDA disabling completion */
1325 do {
1326 reg = tdma_readl(priv, TDMA_STATUS);
1327 if (!!(reg & TDMA_DISABLED) == !enable)
1328 return 0;
1329
1330 usleep_range(1000, 2000);
1331 } while (timeout-- > 0);
1332
1333 netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1334
1335 return -ETIMEDOUT;
1336 }
1337
1338 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1339 {
1340 struct bcm_sysport_cb *cb;
1341 u32 reg;
1342 int ret;
1343 int i;
1344
1345 /* Initialize SW view of the RX ring */
1346 priv->num_rx_bds = NUM_RX_DESC;
1347 priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1348 priv->rx_c_index = 0;
1349 priv->rx_read_ptr = 0;
1350 priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1351 GFP_KERNEL);
1352 if (!priv->rx_cbs) {
1353 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1354 return -ENOMEM;
1355 }
1356
1357 for (i = 0; i < priv->num_rx_bds; i++) {
1358 cb = priv->rx_cbs + i;
1359 cb->bd_addr = priv->rx_bds + i * DESC_SIZE;
1360 }
1361
1362 ret = bcm_sysport_alloc_rx_bufs(priv);
1363 if (ret) {
1364 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1365 return ret;
1366 }
1367
1368 /* Initialize HW, ensure RDMA is disabled */
1369 reg = rdma_readl(priv, RDMA_STATUS);
1370 if (!(reg & RDMA_DISABLED))
1371 rdma_enable_set(priv, 0);
1372
1373 rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1374 rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1375 rdma_writel(priv, 0, RDMA_PROD_INDEX);
1376 rdma_writel(priv, 0, RDMA_CONS_INDEX);
1377 rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1378 RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1379 /* Operate the queue in ring mode */
1380 rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1381 rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1382 rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1383 rdma_writel(priv, NUM_HW_RX_DESC_WORDS - 1, RDMA_END_ADDR_LO);
1384
1385 rdma_writel(priv, 1, RDMA_MBDONE_INTR);
1386
1387 netif_dbg(priv, hw, priv->netdev,
1388 "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1389 priv->num_rx_bds, priv->rx_bds);
1390
1391 return 0;
1392 }
1393
1394 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1395 {
1396 struct bcm_sysport_cb *cb;
1397 unsigned int i;
1398 u32 reg;
1399
1400 /* Caller should ensure RDMA is disabled */
1401 reg = rdma_readl(priv, RDMA_STATUS);
1402 if (!(reg & RDMA_DISABLED))
1403 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1404
1405 for (i = 0; i < priv->num_rx_bds; i++) {
1406 cb = &priv->rx_cbs[i];
1407 if (dma_unmap_addr(cb, dma_addr))
1408 dma_unmap_single(&priv->pdev->dev,
1409 dma_unmap_addr(cb, dma_addr),
1410 RX_BUF_LENGTH, DMA_FROM_DEVICE);
1411 bcm_sysport_free_cb(cb);
1412 }
1413
1414 kfree(priv->rx_cbs);
1415 priv->rx_cbs = NULL;
1416
1417 netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1418 }
1419
1420 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1421 {
1422 struct bcm_sysport_priv *priv = netdev_priv(dev);
1423 u32 reg;
1424
1425 reg = umac_readl(priv, UMAC_CMD);
1426 if (dev->flags & IFF_PROMISC)
1427 reg |= CMD_PROMISC;
1428 else
1429 reg &= ~CMD_PROMISC;
1430 umac_writel(priv, reg, UMAC_CMD);
1431
1432 /* No support for ALLMULTI */
1433 if (dev->flags & IFF_ALLMULTI)
1434 return;
1435 }
1436
1437 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1438 u32 mask, unsigned int enable)
1439 {
1440 u32 reg;
1441
1442 reg = umac_readl(priv, UMAC_CMD);
1443 if (enable)
1444 reg |= mask;
1445 else
1446 reg &= ~mask;
1447 umac_writel(priv, reg, UMAC_CMD);
1448
1449 /* UniMAC stops on a packet boundary, wait for a full-sized packet
1450 * to be processed (1 msec).
1451 */
1452 if (enable == 0)
1453 usleep_range(1000, 2000);
1454 }
1455
1456 static inline void umac_reset(struct bcm_sysport_priv *priv)
1457 {
1458 u32 reg;
1459
1460 reg = umac_readl(priv, UMAC_CMD);
1461 reg |= CMD_SW_RESET;
1462 umac_writel(priv, reg, UMAC_CMD);
1463 udelay(10);
1464 reg = umac_readl(priv, UMAC_CMD);
1465 reg &= ~CMD_SW_RESET;
1466 umac_writel(priv, reg, UMAC_CMD);
1467 }
1468
1469 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1470 unsigned char *addr)
1471 {
1472 umac_writel(priv, (addr[0] << 24) | (addr[1] << 16) |
1473 (addr[2] << 8) | addr[3], UMAC_MAC0);
1474 umac_writel(priv, (addr[4] << 8) | addr[5], UMAC_MAC1);
1475 }
1476
1477 static void topctrl_flush(struct bcm_sysport_priv *priv)
1478 {
1479 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1480 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1481 mdelay(1);
1482 topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1483 topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1484 }
1485
1486 static int bcm_sysport_change_mac(struct net_device *dev, void *p)
1487 {
1488 struct bcm_sysport_priv *priv = netdev_priv(dev);
1489 struct sockaddr *addr = p;
1490
1491 if (!is_valid_ether_addr(addr->sa_data))
1492 return -EINVAL;
1493
1494 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1495
1496 /* interface is disabled, changes to MAC will be reflected on next
1497 * open call
1498 */
1499 if (!netif_running(dev))
1500 return 0;
1501
1502 umac_set_hw_addr(priv, dev->dev_addr);
1503
1504 return 0;
1505 }
1506
1507 static void bcm_sysport_netif_start(struct net_device *dev)
1508 {
1509 struct bcm_sysport_priv *priv = netdev_priv(dev);
1510
1511 /* Enable NAPI */
1512 napi_enable(&priv->napi);
1513
1514 /* Enable RX interrupt and TX ring full interrupt */
1515 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1516
1517 phy_start(dev->phydev);
1518
1519 /* Enable TX interrupts for the 32 TXQs */
1520 intrl2_1_mask_clear(priv, 0xffffffff);
1521
1522 /* Last call before we start the real business */
1523 netif_tx_start_all_queues(dev);
1524 }
1525
1526 static void rbuf_init(struct bcm_sysport_priv *priv)
1527 {
1528 u32 reg;
1529
1530 reg = rbuf_readl(priv, RBUF_CONTROL);
1531 reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1532 rbuf_writel(priv, reg, RBUF_CONTROL);
1533 }
1534
1535 static int bcm_sysport_open(struct net_device *dev)
1536 {
1537 struct bcm_sysport_priv *priv = netdev_priv(dev);
1538 struct phy_device *phydev;
1539 unsigned int i;
1540 int ret;
1541
1542 /* Reset UniMAC */
1543 umac_reset(priv);
1544
1545 /* Flush TX and RX FIFOs at TOPCTRL level */
1546 topctrl_flush(priv);
1547
1548 /* Disable the UniMAC RX/TX */
1549 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1550
1551 /* Enable RBUF 2bytes alignment and Receive Status Block */
1552 rbuf_init(priv);
1553
1554 /* Set maximum frame length */
1555 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1556
1557 /* Set MAC address */
1558 umac_set_hw_addr(priv, dev->dev_addr);
1559
1560 /* Read CRC forward */
1561 priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1562
1563 phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1564 0, priv->phy_interface);
1565 if (!phydev) {
1566 netdev_err(dev, "could not attach to PHY\n");
1567 return -ENODEV;
1568 }
1569
1570 /* Reset house keeping link status */
1571 priv->old_duplex = -1;
1572 priv->old_link = -1;
1573 priv->old_pause = -1;
1574
1575 /* mask all interrupts and request them */
1576 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1577 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1578 intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1579 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1580 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1581 intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1582
1583 ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1584 if (ret) {
1585 netdev_err(dev, "failed to request RX interrupt\n");
1586 goto out_phy_disconnect;
1587 }
1588
1589 ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0, dev->name, dev);
1590 if (ret) {
1591 netdev_err(dev, "failed to request TX interrupt\n");
1592 goto out_free_irq0;
1593 }
1594
1595 /* Initialize both hardware and software ring */
1596 for (i = 0; i < dev->num_tx_queues; i++) {
1597 ret = bcm_sysport_init_tx_ring(priv, i);
1598 if (ret) {
1599 netdev_err(dev, "failed to initialize TX ring %d\n",
1600 i);
1601 goto out_free_tx_ring;
1602 }
1603 }
1604
1605 /* Initialize linked-list */
1606 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1607
1608 /* Initialize RX ring */
1609 ret = bcm_sysport_init_rx_ring(priv);
1610 if (ret) {
1611 netdev_err(dev, "failed to initialize RX ring\n");
1612 goto out_free_rx_ring;
1613 }
1614
1615 /* Turn on RDMA */
1616 ret = rdma_enable_set(priv, 1);
1617 if (ret)
1618 goto out_free_rx_ring;
1619
1620 /* Turn on TDMA */
1621 ret = tdma_enable_set(priv, 1);
1622 if (ret)
1623 goto out_clear_rx_int;
1624
1625 /* Turn on UniMAC TX/RX */
1626 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
1627
1628 bcm_sysport_netif_start(dev);
1629
1630 return 0;
1631
1632 out_clear_rx_int:
1633 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1634 out_free_rx_ring:
1635 bcm_sysport_fini_rx_ring(priv);
1636 out_free_tx_ring:
1637 for (i = 0; i < dev->num_tx_queues; i++)
1638 bcm_sysport_fini_tx_ring(priv, i);
1639 free_irq(priv->irq1, dev);
1640 out_free_irq0:
1641 free_irq(priv->irq0, dev);
1642 out_phy_disconnect:
1643 phy_disconnect(phydev);
1644 return ret;
1645 }
1646
1647 static void bcm_sysport_netif_stop(struct net_device *dev)
1648 {
1649 struct bcm_sysport_priv *priv = netdev_priv(dev);
1650
1651 /* stop all software from updating hardware */
1652 netif_tx_stop_all_queues(dev);
1653 napi_disable(&priv->napi);
1654 phy_stop(dev->phydev);
1655
1656 /* mask all interrupts */
1657 intrl2_0_mask_set(priv, 0xffffffff);
1658 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1659 intrl2_1_mask_set(priv, 0xffffffff);
1660 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1661 }
1662
1663 static int bcm_sysport_stop(struct net_device *dev)
1664 {
1665 struct bcm_sysport_priv *priv = netdev_priv(dev);
1666 unsigned int i;
1667 int ret;
1668
1669 bcm_sysport_netif_stop(dev);
1670
1671 /* Disable UniMAC RX */
1672 umac_enable_set(priv, CMD_RX_EN, 0);
1673
1674 ret = tdma_enable_set(priv, 0);
1675 if (ret) {
1676 netdev_err(dev, "timeout disabling RDMA\n");
1677 return ret;
1678 }
1679
1680 /* Wait for a maximum packet size to be drained */
1681 usleep_range(2000, 3000);
1682
1683 ret = rdma_enable_set(priv, 0);
1684 if (ret) {
1685 netdev_err(dev, "timeout disabling TDMA\n");
1686 return ret;
1687 }
1688
1689 /* Disable UniMAC TX */
1690 umac_enable_set(priv, CMD_TX_EN, 0);
1691
1692 /* Free RX/TX rings SW structures */
1693 for (i = 0; i < dev->num_tx_queues; i++)
1694 bcm_sysport_fini_tx_ring(priv, i);
1695 bcm_sysport_fini_rx_ring(priv);
1696
1697 free_irq(priv->irq0, dev);
1698 free_irq(priv->irq1, dev);
1699
1700 /* Disconnect from PHY */
1701 phy_disconnect(dev->phydev);
1702
1703 return 0;
1704 }
1705
1706 static const struct ethtool_ops bcm_sysport_ethtool_ops = {
1707 .get_drvinfo = bcm_sysport_get_drvinfo,
1708 .get_msglevel = bcm_sysport_get_msglvl,
1709 .set_msglevel = bcm_sysport_set_msglvl,
1710 .get_link = ethtool_op_get_link,
1711 .get_strings = bcm_sysport_get_strings,
1712 .get_ethtool_stats = bcm_sysport_get_stats,
1713 .get_sset_count = bcm_sysport_get_sset_count,
1714 .get_wol = bcm_sysport_get_wol,
1715 .set_wol = bcm_sysport_set_wol,
1716 .get_coalesce = bcm_sysport_get_coalesce,
1717 .set_coalesce = bcm_sysport_set_coalesce,
1718 .get_link_ksettings = phy_ethtool_get_link_ksettings,
1719 .set_link_ksettings = phy_ethtool_set_link_ksettings,
1720 };
1721
1722 static const struct net_device_ops bcm_sysport_netdev_ops = {
1723 .ndo_start_xmit = bcm_sysport_xmit,
1724 .ndo_tx_timeout = bcm_sysport_tx_timeout,
1725 .ndo_open = bcm_sysport_open,
1726 .ndo_stop = bcm_sysport_stop,
1727 .ndo_set_features = bcm_sysport_set_features,
1728 .ndo_set_rx_mode = bcm_sysport_set_rx_mode,
1729 .ndo_set_mac_address = bcm_sysport_change_mac,
1730 #ifdef CONFIG_NET_POLL_CONTROLLER
1731 .ndo_poll_controller = bcm_sysport_poll_controller,
1732 #endif
1733 };
1734
1735 #define REV_FMT "v%2x.%02x"
1736
1737 static int bcm_sysport_probe(struct platform_device *pdev)
1738 {
1739 struct bcm_sysport_priv *priv;
1740 struct device_node *dn;
1741 struct net_device *dev;
1742 const void *macaddr;
1743 struct resource *r;
1744 u32 txq, rxq;
1745 int ret;
1746
1747 dn = pdev->dev.of_node;
1748 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1749
1750 /* Read the Transmit/Receive Queue properties */
1751 if (of_property_read_u32(dn, "systemport,num-txq", &txq))
1752 txq = TDMA_NUM_RINGS;
1753 if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
1754 rxq = 1;
1755
1756 dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
1757 if (!dev)
1758 return -ENOMEM;
1759
1760 /* Initialize private members */
1761 priv = netdev_priv(dev);
1762
1763 priv->irq0 = platform_get_irq(pdev, 0);
1764 priv->irq1 = platform_get_irq(pdev, 1);
1765 priv->wol_irq = platform_get_irq(pdev, 2);
1766 if (priv->irq0 <= 0 || priv->irq1 <= 0) {
1767 dev_err(&pdev->dev, "invalid interrupts\n");
1768 ret = -EINVAL;
1769 goto err_free_netdev;
1770 }
1771
1772 priv->base = devm_ioremap_resource(&pdev->dev, r);
1773 if (IS_ERR(priv->base)) {
1774 ret = PTR_ERR(priv->base);
1775 goto err_free_netdev;
1776 }
1777
1778 priv->netdev = dev;
1779 priv->pdev = pdev;
1780
1781 priv->phy_interface = of_get_phy_mode(dn);
1782 /* Default to GMII interface mode */
1783 if (priv->phy_interface < 0)
1784 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
1785
1786 /* In the case of a fixed PHY, the DT node associated
1787 * to the PHY is the Ethernet MAC DT node.
1788 */
1789 if (of_phy_is_fixed_link(dn)) {
1790 ret = of_phy_register_fixed_link(dn);
1791 if (ret) {
1792 dev_err(&pdev->dev, "failed to register fixed PHY\n");
1793 goto err_free_netdev;
1794 }
1795
1796 priv->phy_dn = dn;
1797 }
1798
1799 /* Initialize netdevice members */
1800 macaddr = of_get_mac_address(dn);
1801 if (!macaddr || !is_valid_ether_addr(macaddr)) {
1802 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
1803 eth_hw_addr_random(dev);
1804 } else {
1805 ether_addr_copy(dev->dev_addr, macaddr);
1806 }
1807
1808 SET_NETDEV_DEV(dev, &pdev->dev);
1809 dev_set_drvdata(&pdev->dev, dev);
1810 dev->ethtool_ops = &bcm_sysport_ethtool_ops;
1811 dev->netdev_ops = &bcm_sysport_netdev_ops;
1812 netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
1813
1814 /* HW supported features, none enabled by default */
1815 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
1816 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1817
1818 /* Request the WOL interrupt and advertise suspend if available */
1819 priv->wol_irq_disabled = 1;
1820 ret = devm_request_irq(&pdev->dev, priv->wol_irq,
1821 bcm_sysport_wol_isr, 0, dev->name, priv);
1822 if (!ret)
1823 device_set_wakeup_capable(&pdev->dev, 1);
1824
1825 /* Set the needed headroom once and for all */
1826 BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
1827 dev->needed_headroom += sizeof(struct bcm_tsb);
1828
1829 /* libphy will adjust the link state accordingly */
1830 netif_carrier_off(dev);
1831
1832 ret = register_netdev(dev);
1833 if (ret) {
1834 dev_err(&pdev->dev, "failed to register net_device\n");
1835 goto err_deregister_fixed_link;
1836 }
1837
1838 priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
1839 dev_info(&pdev->dev,
1840 "Broadcom SYSTEMPORT" REV_FMT
1841 " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
1842 (priv->rev >> 8) & 0xff, priv->rev & 0xff,
1843 priv->base, priv->irq0, priv->irq1, txq, rxq);
1844
1845 return 0;
1846
1847 err_deregister_fixed_link:
1848 if (of_phy_is_fixed_link(dn))
1849 of_phy_deregister_fixed_link(dn);
1850 err_free_netdev:
1851 free_netdev(dev);
1852 return ret;
1853 }
1854
1855 static int bcm_sysport_remove(struct platform_device *pdev)
1856 {
1857 struct net_device *dev = dev_get_drvdata(&pdev->dev);
1858 struct device_node *dn = pdev->dev.of_node;
1859
1860 /* Not much to do, ndo_close has been called
1861 * and we use managed allocations
1862 */
1863 unregister_netdev(dev);
1864 if (of_phy_is_fixed_link(dn))
1865 of_phy_deregister_fixed_link(dn);
1866 free_netdev(dev);
1867 dev_set_drvdata(&pdev->dev, NULL);
1868
1869 return 0;
1870 }
1871
1872 #ifdef CONFIG_PM_SLEEP
1873 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
1874 {
1875 struct net_device *ndev = priv->netdev;
1876 unsigned int timeout = 1000;
1877 u32 reg;
1878
1879 /* Password has already been programmed */
1880 reg = umac_readl(priv, UMAC_MPD_CTRL);
1881 reg |= MPD_EN;
1882 reg &= ~PSW_EN;
1883 if (priv->wolopts & WAKE_MAGICSECURE)
1884 reg |= PSW_EN;
1885 umac_writel(priv, reg, UMAC_MPD_CTRL);
1886
1887 /* Make sure RBUF entered WoL mode as result */
1888 do {
1889 reg = rbuf_readl(priv, RBUF_STATUS);
1890 if (reg & RBUF_WOL_MODE)
1891 break;
1892
1893 udelay(10);
1894 } while (timeout-- > 0);
1895
1896 /* Do not leave the UniMAC RBUF matching only MPD packets */
1897 if (!timeout) {
1898 reg = umac_readl(priv, UMAC_MPD_CTRL);
1899 reg &= ~MPD_EN;
1900 umac_writel(priv, reg, UMAC_MPD_CTRL);
1901 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
1902 return -ETIMEDOUT;
1903 }
1904
1905 /* UniMAC receive needs to be turned on */
1906 umac_enable_set(priv, CMD_RX_EN, 1);
1907
1908 /* Enable the interrupt wake-up source */
1909 intrl2_0_mask_clear(priv, INTRL2_0_MPD);
1910
1911 netif_dbg(priv, wol, ndev, "entered WOL mode\n");
1912
1913 return 0;
1914 }
1915
1916 static int bcm_sysport_suspend(struct device *d)
1917 {
1918 struct net_device *dev = dev_get_drvdata(d);
1919 struct bcm_sysport_priv *priv = netdev_priv(dev);
1920 unsigned int i;
1921 int ret = 0;
1922 u32 reg;
1923
1924 if (!netif_running(dev))
1925 return 0;
1926
1927 bcm_sysport_netif_stop(dev);
1928
1929 phy_suspend(dev->phydev);
1930
1931 netif_device_detach(dev);
1932
1933 /* Disable UniMAC RX */
1934 umac_enable_set(priv, CMD_RX_EN, 0);
1935
1936 ret = rdma_enable_set(priv, 0);
1937 if (ret) {
1938 netdev_err(dev, "RDMA timeout!\n");
1939 return ret;
1940 }
1941
1942 /* Disable RXCHK if enabled */
1943 if (priv->rx_chk_en) {
1944 reg = rxchk_readl(priv, RXCHK_CONTROL);
1945 reg &= ~RXCHK_EN;
1946 rxchk_writel(priv, reg, RXCHK_CONTROL);
1947 }
1948
1949 /* Flush RX pipe */
1950 if (!priv->wolopts)
1951 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1952
1953 ret = tdma_enable_set(priv, 0);
1954 if (ret) {
1955 netdev_err(dev, "TDMA timeout!\n");
1956 return ret;
1957 }
1958
1959 /* Wait for a packet boundary */
1960 usleep_range(2000, 3000);
1961
1962 umac_enable_set(priv, CMD_TX_EN, 0);
1963
1964 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1965
1966 /* Free RX/TX rings SW structures */
1967 for (i = 0; i < dev->num_tx_queues; i++)
1968 bcm_sysport_fini_tx_ring(priv, i);
1969 bcm_sysport_fini_rx_ring(priv);
1970
1971 /* Get prepared for Wake-on-LAN */
1972 if (device_may_wakeup(d) && priv->wolopts)
1973 ret = bcm_sysport_suspend_to_wol(priv);
1974
1975 return ret;
1976 }
1977
1978 static int bcm_sysport_resume(struct device *d)
1979 {
1980 struct net_device *dev = dev_get_drvdata(d);
1981 struct bcm_sysport_priv *priv = netdev_priv(dev);
1982 unsigned int i;
1983 u32 reg;
1984 int ret;
1985
1986 if (!netif_running(dev))
1987 return 0;
1988
1989 umac_reset(priv);
1990
1991 /* We may have been suspended and never received a WOL event that
1992 * would turn off MPD detection, take care of that now
1993 */
1994 bcm_sysport_resume_from_wol(priv);
1995
1996 /* Initialize both hardware and software ring */
1997 for (i = 0; i < dev->num_tx_queues; i++) {
1998 ret = bcm_sysport_init_tx_ring(priv, i);
1999 if (ret) {
2000 netdev_err(dev, "failed to initialize TX ring %d\n",
2001 i);
2002 goto out_free_tx_rings;
2003 }
2004 }
2005
2006 /* Initialize linked-list */
2007 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
2008
2009 /* Initialize RX ring */
2010 ret = bcm_sysport_init_rx_ring(priv);
2011 if (ret) {
2012 netdev_err(dev, "failed to initialize RX ring\n");
2013 goto out_free_rx_ring;
2014 }
2015
2016 netif_device_attach(dev);
2017
2018 /* RX pipe enable */
2019 topctrl_writel(priv, 0, RX_FLUSH_CNTL);
2020
2021 ret = rdma_enable_set(priv, 1);
2022 if (ret) {
2023 netdev_err(dev, "failed to enable RDMA\n");
2024 goto out_free_rx_ring;
2025 }
2026
2027 /* Enable rxhck */
2028 if (priv->rx_chk_en) {
2029 reg = rxchk_readl(priv, RXCHK_CONTROL);
2030 reg |= RXCHK_EN;
2031 rxchk_writel(priv, reg, RXCHK_CONTROL);
2032 }
2033
2034 rbuf_init(priv);
2035
2036 /* Set maximum frame length */
2037 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
2038
2039 /* Set MAC address */
2040 umac_set_hw_addr(priv, dev->dev_addr);
2041
2042 umac_enable_set(priv, CMD_RX_EN, 1);
2043
2044 /* TX pipe enable */
2045 topctrl_writel(priv, 0, TX_FLUSH_CNTL);
2046
2047 umac_enable_set(priv, CMD_TX_EN, 1);
2048
2049 ret = tdma_enable_set(priv, 1);
2050 if (ret) {
2051 netdev_err(dev, "TDMA timeout!\n");
2052 goto out_free_rx_ring;
2053 }
2054
2055 phy_resume(dev->phydev);
2056
2057 bcm_sysport_netif_start(dev);
2058
2059 return 0;
2060
2061 out_free_rx_ring:
2062 bcm_sysport_fini_rx_ring(priv);
2063 out_free_tx_rings:
2064 for (i = 0; i < dev->num_tx_queues; i++)
2065 bcm_sysport_fini_tx_ring(priv, i);
2066 return ret;
2067 }
2068 #endif
2069
2070 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
2071 bcm_sysport_suspend, bcm_sysport_resume);
2072
2073 static const struct of_device_id bcm_sysport_of_match[] = {
2074 { .compatible = "brcm,systemport-v1.00" },
2075 { .compatible = "brcm,systemport" },
2076 { /* sentinel */ }
2077 };
2078 MODULE_DEVICE_TABLE(of, bcm_sysport_of_match);
2079
2080 static struct platform_driver bcm_sysport_driver = {
2081 .probe = bcm_sysport_probe,
2082 .remove = bcm_sysport_remove,
2083 .driver = {
2084 .name = "brcm-systemport",
2085 .of_match_table = bcm_sysport_of_match,
2086 .pm = &bcm_sysport_pm_ops,
2087 },
2088 };
2089 module_platform_driver(bcm_sysport_driver);
2090
2091 MODULE_AUTHOR("Broadcom Corporation");
2092 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
2093 MODULE_ALIAS("platform:brcm-systemport");
2094 MODULE_LICENSE("GPL");
Linux with added FPC-III support