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pvrusb2: reduce stack usage pvr2_eeprom_analyze()
[linux/fpc-iii.git] / drivers / net / ethernet / smsc / smc911x.c
blobcb49c9654f0a7c2d8d0bb922bc4b38c7e6180419
1 /*
2 * smc911x.c
3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
4 *
5 * Copyright (C) 2005 Sensoria Corp
6 * Derived from the unified SMC91x driver by Nicolas Pitre
7 * and the smsc911x.c reference driver by SMSC
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, see <http://www.gnu.org/licenses/>.
21 *
22 * Arguments:
23 * watchdog = TX watchdog timeout
24 * tx_fifo_kb = Size of TX FIFO in KB
25 *
26 * History:
27 * 04/16/05 Dustin McIntire Initial version
28 */
29 static const char version[] =
30 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
31
32 /* Debugging options */
33 #define ENABLE_SMC_DEBUG_RX 0
34 #define ENABLE_SMC_DEBUG_TX 0
35 #define ENABLE_SMC_DEBUG_DMA 0
36 #define ENABLE_SMC_DEBUG_PKTS 0
37 #define ENABLE_SMC_DEBUG_MISC 0
38 #define ENABLE_SMC_DEBUG_FUNC 0
39
40 #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
41 #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
42 #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
43 #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
44 #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
45 #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
46
47 #ifndef SMC_DEBUG
48 #define SMC_DEBUG ( SMC_DEBUG_RX | \
49 SMC_DEBUG_TX | \
50 SMC_DEBUG_DMA | \
51 SMC_DEBUG_PKTS | \
52 SMC_DEBUG_MISC | \
53 SMC_DEBUG_FUNC \
54 )
55 #endif
56
57 #include <linux/module.h>
58 #include <linux/kernel.h>
59 #include <linux/sched.h>
60 #include <linux/delay.h>
61 #include <linux/interrupt.h>
62 #include <linux/errno.h>
63 #include <linux/ioport.h>
64 #include <linux/crc32.h>
65 #include <linux/device.h>
66 #include <linux/platform_device.h>
67 #include <linux/spinlock.h>
68 #include <linux/ethtool.h>
69 #include <linux/mii.h>
70 #include <linux/workqueue.h>
71
72 #include <linux/netdevice.h>
73 #include <linux/etherdevice.h>
74 #include <linux/skbuff.h>
75
76 #include <linux/dmaengine.h>
77 #include <linux/dma/pxa-dma.h>
78
79 #include <asm/io.h>
80
81 #include "smc911x.h"
82
83 /*
84 * Transmit timeout, default 5 seconds.
85 */
86 static int watchdog = 5000;
87 module_param(watchdog, int, 0400);
88 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
89
90 static int tx_fifo_kb=8;
91 module_param(tx_fifo_kb, int, 0400);
92 MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
93
94 MODULE_LICENSE("GPL");
95 MODULE_ALIAS("platform:smc911x");
96
97 /*
98 * The internal workings of the driver. If you are changing anything
99 * here with the SMC stuff, you should have the datasheet and know
100 * what you are doing.
101 */
102 #define CARDNAME "smc911x"
103
104 /*
105 * Use power-down feature of the chip
106 */
107 #define POWER_DOWN 1
108
109 #if SMC_DEBUG > 0
110 #define DBG(n, dev, args...) \
111 do { \
112 if (SMC_DEBUG & (n)) \
113 netdev_dbg(dev, args); \
114 } while (0)
115
116 #define PRINTK(dev, args...) netdev_info(dev, args)
117 #else
118 #define DBG(n, dev, args...) do { } while (0)
119 #define PRINTK(dev, args...) netdev_dbg(dev, args)
120 #endif
121
122 #if SMC_DEBUG_PKTS > 0
123 static void PRINT_PKT(u_char *buf, int length)
124 {
125 int i;
126 int remainder;
127 int lines;
128
129 lines = length / 16;
130 remainder = length % 16;
131
132 for (i = 0; i < lines ; i ++) {
133 int cur;
134 printk(KERN_DEBUG);
135 for (cur = 0; cur < 8; cur++) {
136 u_char a, b;
137 a = *buf++;
138 b = *buf++;
139 pr_cont("%02x%02x ", a, b);
140 }
141 pr_cont("\n");
142 }
143 printk(KERN_DEBUG);
144 for (i = 0; i < remainder/2 ; i++) {
145 u_char a, b;
146 a = *buf++;
147 b = *buf++;
148 pr_cont("%02x%02x ", a, b);
149 }
150 pr_cont("\n");
151 }
152 #else
153 #define PRINT_PKT(x...) do { } while (0)
154 #endif
155
156
157 /* this enables an interrupt in the interrupt mask register */
158 #define SMC_ENABLE_INT(lp, x) do { \
159 unsigned int __mask; \
160 __mask = SMC_GET_INT_EN((lp)); \
161 __mask |= (x); \
162 SMC_SET_INT_EN((lp), __mask); \
163 } while (0)
164
165 /* this disables an interrupt from the interrupt mask register */
166 #define SMC_DISABLE_INT(lp, x) do { \
167 unsigned int __mask; \
168 __mask = SMC_GET_INT_EN((lp)); \
169 __mask &= ~(x); \
170 SMC_SET_INT_EN((lp), __mask); \
171 } while (0)
172
173 /*
174 * this does a soft reset on the device
175 */
176 static void smc911x_reset(struct net_device *dev)
177 {
178 struct smc911x_local *lp = netdev_priv(dev);
179 unsigned int reg, timeout=0, resets=1, irq_cfg;
180 unsigned long flags;
181
182 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
183
184 /* Take out of PM setting first */
185 if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) {
186 /* Write to the bytetest will take out of powerdown */
187 SMC_SET_BYTE_TEST(lp, 0);
188 timeout=10;
189 do {
190 udelay(10);
191 reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_;
192 } while (--timeout && !reg);
193 if (timeout == 0) {
194 PRINTK(dev, "smc911x_reset timeout waiting for PM restore\n");
195 return;
196 }
197 }
198
199 /* Disable all interrupts */
200 spin_lock_irqsave(&lp->lock, flags);
201 SMC_SET_INT_EN(lp, 0);
202 spin_unlock_irqrestore(&lp->lock, flags);
203
204 while (resets--) {
205 SMC_SET_HW_CFG(lp, HW_CFG_SRST_);
206 timeout=10;
207 do {
208 udelay(10);
209 reg = SMC_GET_HW_CFG(lp);
210 /* If chip indicates reset timeout then try again */
211 if (reg & HW_CFG_SRST_TO_) {
212 PRINTK(dev, "chip reset timeout, retrying...\n");
213 resets++;
214 break;
215 }
216 } while (--timeout && (reg & HW_CFG_SRST_));
217 }
218 if (timeout == 0) {
219 PRINTK(dev, "smc911x_reset timeout waiting for reset\n");
220 return;
221 }
222
223 /* make sure EEPROM has finished loading before setting GPIO_CFG */
224 timeout=1000;
225 while (--timeout && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_))
226 udelay(10);
227
228 if (timeout == 0){
229 PRINTK(dev, "smc911x_reset timeout waiting for EEPROM busy\n");
230 return;
231 }
232
233 /* Initialize interrupts */
234 SMC_SET_INT_EN(lp, 0);
235 SMC_ACK_INT(lp, -1);
236
237 /* Reset the FIFO level and flow control settings */
238 SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16);
239 //TODO: Figure out what appropriate pause time is
240 SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_);
241 SMC_SET_AFC_CFG(lp, lp->afc_cfg);
242
243
244 /* Set to LED outputs */
245 SMC_SET_GPIO_CFG(lp, 0x70070000);
246
247 /*
248 * Deassert IRQ for 1*10us for edge type interrupts
249 * and drive IRQ pin push-pull
250 */
251 irq_cfg = (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_;
252 #ifdef SMC_DYNAMIC_BUS_CONFIG
253 if (lp->cfg.irq_polarity)
254 irq_cfg |= INT_CFG_IRQ_POL_;
255 #endif
256 SMC_SET_IRQ_CFG(lp, irq_cfg);
257
258 /* clear anything saved */
259 if (lp->pending_tx_skb != NULL) {
260 dev_kfree_skb (lp->pending_tx_skb);
261 lp->pending_tx_skb = NULL;
262 dev->stats.tx_errors++;
263 dev->stats.tx_aborted_errors++;
264 }
265 }
266
267 /*
268 * Enable Interrupts, Receive, and Transmit
269 */
270 static void smc911x_enable(struct net_device *dev)
271 {
272 struct smc911x_local *lp = netdev_priv(dev);
273 unsigned mask, cfg, cr;
274 unsigned long flags;
275
276 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
277
278 spin_lock_irqsave(&lp->lock, flags);
279
280 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
281
282 /* Enable TX */
283 cfg = SMC_GET_HW_CFG(lp);
284 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
285 cfg |= HW_CFG_SF_;
286 SMC_SET_HW_CFG(lp, cfg);
287 SMC_SET_FIFO_TDA(lp, 0xFF);
288 /* Update TX stats on every 64 packets received or every 1 sec */
289 SMC_SET_FIFO_TSL(lp, 64);
290 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
291
292 SMC_GET_MAC_CR(lp, cr);
293 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
294 SMC_SET_MAC_CR(lp, cr);
295 SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_);
296
297 /* Add 2 byte padding to start of packets */
298 SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_);
299
300 /* Turn on receiver and enable RX */
301 if (cr & MAC_CR_RXEN_)
302 DBG(SMC_DEBUG_RX, dev, "Receiver already enabled\n");
303
304 SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_);
305
306 /* Interrupt on every received packet */
307 SMC_SET_FIFO_RSA(lp, 0x01);
308 SMC_SET_FIFO_RSL(lp, 0x00);
309
310 /* now, enable interrupts */
311 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
312 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
313 INT_EN_PHY_INT_EN_;
314 if (IS_REV_A(lp->revision))
315 mask|=INT_EN_RDFL_EN_;
316 else {
317 mask|=INT_EN_RDFO_EN_;
318 }
319 SMC_ENABLE_INT(lp, mask);
320
321 spin_unlock_irqrestore(&lp->lock, flags);
322 }
323
324 /*
325 * this puts the device in an inactive state
326 */
327 static void smc911x_shutdown(struct net_device *dev)
328 {
329 struct smc911x_local *lp = netdev_priv(dev);
330 unsigned cr;
331 unsigned long flags;
332
333 DBG(SMC_DEBUG_FUNC, dev, "%s: --> %s\n", CARDNAME, __func__);
334
335 /* Disable IRQ's */
336 SMC_SET_INT_EN(lp, 0);
337
338 /* Turn of Rx and TX */
339 spin_lock_irqsave(&lp->lock, flags);
340 SMC_GET_MAC_CR(lp, cr);
341 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
342 SMC_SET_MAC_CR(lp, cr);
343 SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_);
344 spin_unlock_irqrestore(&lp->lock, flags);
345 }
346
347 static inline void smc911x_drop_pkt(struct net_device *dev)
348 {
349 struct smc911x_local *lp = netdev_priv(dev);
350 unsigned int fifo_count, timeout, reg;
351
352 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, dev, "%s: --> %s\n",
353 CARDNAME, __func__);
354 fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF;
355 if (fifo_count <= 4) {
356 /* Manually dump the packet data */
357 while (fifo_count--)
358 SMC_GET_RX_FIFO(lp);
359 } else {
360 /* Fast forward through the bad packet */
361 SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_);
362 timeout=50;
363 do {
364 udelay(10);
365 reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_;
366 } while (--timeout && reg);
367 if (timeout == 0) {
368 PRINTK(dev, "timeout waiting for RX fast forward\n");
369 }
370 }
371 }
372
373 /*
374 * This is the procedure to handle the receipt of a packet.
375 * It should be called after checking for packet presence in
376 * the RX status FIFO. It must be called with the spin lock
377 * already held.
378 */
379 static inline void smc911x_rcv(struct net_device *dev)
380 {
381 struct smc911x_local *lp = netdev_priv(dev);
382 unsigned int pkt_len, status;
383 struct sk_buff *skb;
384 unsigned char *data;
385
386 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, dev, "--> %s\n",
387 __func__);
388 status = SMC_GET_RX_STS_FIFO(lp);
389 DBG(SMC_DEBUG_RX, dev, "Rx pkt len %d status 0x%08x\n",
390 (status & 0x3fff0000) >> 16, status & 0xc000ffff);
391 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
392 if (status & RX_STS_ES_) {
393 /* Deal with a bad packet */
394 dev->stats.rx_errors++;
395 if (status & RX_STS_CRC_ERR_)
396 dev->stats.rx_crc_errors++;
397 else {
398 if (status & RX_STS_LEN_ERR_)
399 dev->stats.rx_length_errors++;
400 if (status & RX_STS_MCAST_)
401 dev->stats.multicast++;
402 }
403 /* Remove the bad packet data from the RX FIFO */
404 smc911x_drop_pkt(dev);
405 } else {
406 /* Receive a valid packet */
407 /* Alloc a buffer with extra room for DMA alignment */
408 skb = netdev_alloc_skb(dev, pkt_len+32);
409 if (unlikely(skb == NULL)) {
410 PRINTK(dev, "Low memory, rcvd packet dropped.\n");
411 dev->stats.rx_dropped++;
412 smc911x_drop_pkt(dev);
413 return;
414 }
415 /* Align IP header to 32 bits
416 * Note that the device is configured to add a 2
417 * byte padding to the packet start, so we really
418 * want to write to the orignal data pointer */
419 data = skb->data;
420 skb_reserve(skb, 2);
421 skb_put(skb,pkt_len-4);
422 #ifdef SMC_USE_DMA
423 {
424 unsigned int fifo;
425 /* Lower the FIFO threshold if possible */
426 fifo = SMC_GET_FIFO_INT(lp);
427 if (fifo & 0xFF) fifo--;
428 DBG(SMC_DEBUG_RX, dev, "Setting RX stat FIFO threshold to %d\n",
429 fifo & 0xff);
430 SMC_SET_FIFO_INT(lp, fifo);
431 /* Setup RX DMA */
432 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
433 lp->rxdma_active = 1;
434 lp->current_rx_skb = skb;
435 SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15);
436 /* Packet processing deferred to DMA RX interrupt */
437 }
438 #else
439 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
440 SMC_PULL_DATA(lp, data, pkt_len+2+3);
441
442 DBG(SMC_DEBUG_PKTS, dev, "Received packet\n");
443 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
444 skb->protocol = eth_type_trans(skb, dev);
445 netif_rx(skb);
446 dev->stats.rx_packets++;
447 dev->stats.rx_bytes += pkt_len-4;
448 #endif
449 }
450 }
451
452 /*
453 * This is called to actually send a packet to the chip.
454 */
455 static void smc911x_hardware_send_pkt(struct net_device *dev)
456 {
457 struct smc911x_local *lp = netdev_priv(dev);
458 struct sk_buff *skb;
459 unsigned int cmdA, cmdB, len;
460 unsigned char *buf;
461
462 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n", __func__);
463 BUG_ON(lp->pending_tx_skb == NULL);
464
465 skb = lp->pending_tx_skb;
466 lp->pending_tx_skb = NULL;
467
468 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
469 /* cmdB {31:16] pkt tag [10:0] length */
470 #ifdef SMC_USE_DMA
471 /* 16 byte buffer alignment mode */
472 buf = (char*)((u32)(skb->data) & ~0xF);
473 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
474 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
475 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
476 skb->len;
477 #else
478 buf = (char*)((u32)skb->data & ~0x3);
479 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
480 cmdA = (((u32)skb->data & 0x3) << 16) |
481 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
482 skb->len;
483 #endif
484 /* tag is packet length so we can use this in stats update later */
485 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
486
487 DBG(SMC_DEBUG_TX, dev, "TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
488 len, len, buf, cmdA, cmdB);
489 SMC_SET_TX_FIFO(lp, cmdA);
490 SMC_SET_TX_FIFO(lp, cmdB);
491
492 DBG(SMC_DEBUG_PKTS, dev, "Transmitted packet\n");
493 PRINT_PKT(buf, len <= 64 ? len : 64);
494
495 /* Send pkt via PIO or DMA */
496 #ifdef SMC_USE_DMA
497 lp->current_tx_skb = skb;
498 SMC_PUSH_DATA(lp, buf, len);
499 /* DMA complete IRQ will free buffer and set jiffies */
500 #else
501 SMC_PUSH_DATA(lp, buf, len);
502 netif_trans_update(dev);
503 dev_kfree_skb_irq(skb);
504 #endif
505 if (!lp->tx_throttle) {
506 netif_wake_queue(dev);
507 }
508 SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
509 }
510
511 /*
512 * Since I am not sure if I will have enough room in the chip's ram
513 * to store the packet, I call this routine which either sends it
514 * now, or set the card to generates an interrupt when ready
515 * for the packet.
516 */
517 static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
518 {
519 struct smc911x_local *lp = netdev_priv(dev);
520 unsigned int free;
521 unsigned long flags;
522
523 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n",
524 __func__);
525
526 spin_lock_irqsave(&lp->lock, flags);
527
528 BUG_ON(lp->pending_tx_skb != NULL);
529
530 free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_;
531 DBG(SMC_DEBUG_TX, dev, "TX free space %d\n", free);
532
533 /* Turn off the flow when running out of space in FIFO */
534 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
535 DBG(SMC_DEBUG_TX, dev, "Disabling data flow due to low FIFO space (%d)\n",
536 free);
537 /* Reenable when at least 1 packet of size MTU present */
538 SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
539 lp->tx_throttle = 1;
540 netif_stop_queue(dev);
541 }
542
543 /* Drop packets when we run out of space in TX FIFO
544 * Account for overhead required for:
545 *
546 * Tx command words 8 bytes
547 * Start offset 15 bytes
548 * End padding 15 bytes
549 */
550 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
551 netdev_warn(dev, "No Tx free space %d < %d\n",
552 free, skb->len);
553 lp->pending_tx_skb = NULL;
554 dev->stats.tx_errors++;
555 dev->stats.tx_dropped++;
556 spin_unlock_irqrestore(&lp->lock, flags);
557 dev_kfree_skb_any(skb);
558 return NETDEV_TX_OK;
559 }
560
561 #ifdef SMC_USE_DMA
562 {
563 /* If the DMA is already running then defer this packet Tx until
564 * the DMA IRQ starts it
565 */
566 if (lp->txdma_active) {
567 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "Tx DMA running, deferring packet\n");
568 lp->pending_tx_skb = skb;
569 netif_stop_queue(dev);
570 spin_unlock_irqrestore(&lp->lock, flags);
571 return NETDEV_TX_OK;
572 } else {
573 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "Activating Tx DMA\n");
574 lp->txdma_active = 1;
575 }
576 }
577 #endif
578 lp->pending_tx_skb = skb;
579 smc911x_hardware_send_pkt(dev);
580 spin_unlock_irqrestore(&lp->lock, flags);
581
582 return NETDEV_TX_OK;
583 }
584
585 /*
586 * This handles a TX status interrupt, which is only called when:
587 * - a TX error occurred, or
588 * - TX of a packet completed.
589 */
590 static void smc911x_tx(struct net_device *dev)
591 {
592 struct smc911x_local *lp = netdev_priv(dev);
593 unsigned int tx_status;
594
595 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n",
596 __func__);
597
598 /* Collect the TX status */
599 while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
600 DBG(SMC_DEBUG_TX, dev, "Tx stat FIFO used 0x%04x\n",
601 (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16);
602 tx_status = SMC_GET_TX_STS_FIFO(lp);
603 dev->stats.tx_packets++;
604 dev->stats.tx_bytes+=tx_status>>16;
605 DBG(SMC_DEBUG_TX, dev, "Tx FIFO tag 0x%04x status 0x%04x\n",
606 (tx_status & 0xffff0000) >> 16,
607 tx_status & 0x0000ffff);
608 /* count Tx errors, but ignore lost carrier errors when in
609 * full-duplex mode */
610 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
611 !(tx_status & 0x00000306))) {
612 dev->stats.tx_errors++;
613 }
614 if (tx_status & TX_STS_MANY_COLL_) {
615 dev->stats.collisions+=16;
616 dev->stats.tx_aborted_errors++;
617 } else {
618 dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
619 }
620 /* carrier error only has meaning for half-duplex communication */
621 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
622 !lp->ctl_rfduplx) {
623 dev->stats.tx_carrier_errors++;
624 }
625 if (tx_status & TX_STS_LATE_COLL_) {
626 dev->stats.collisions++;
627 dev->stats.tx_aborted_errors++;
628 }
629 }
630 }
631
632
633 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
634 /*
635 * Reads a register from the MII Management serial interface
636 */
637
638 static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
639 {
640 struct smc911x_local *lp = netdev_priv(dev);
641 unsigned int phydata;
642
643 SMC_GET_MII(lp, phyreg, phyaddr, phydata);
644
645 DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
646 __func__, phyaddr, phyreg, phydata);
647 return phydata;
648 }
649
650
651 /*
652 * Writes a register to the MII Management serial interface
653 */
654 static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
655 int phydata)
656 {
657 struct smc911x_local *lp = netdev_priv(dev);
658
659 DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
660 __func__, phyaddr, phyreg, phydata);
661
662 SMC_SET_MII(lp, phyreg, phyaddr, phydata);
663 }
664
665 /*
666 * Finds and reports the PHY address (115 and 117 have external
667 * PHY interface 118 has internal only
668 */
669 static void smc911x_phy_detect(struct net_device *dev)
670 {
671 struct smc911x_local *lp = netdev_priv(dev);
672 int phyaddr;
673 unsigned int cfg, id1, id2;
674
675 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
676
677 lp->phy_type = 0;
678
679 /*
680 * Scan all 32 PHY addresses if necessary, starting at
681 * PHY#1 to PHY#31, and then PHY#0 last.
682 */
683 switch(lp->version) {
684 case CHIP_9115:
685 case CHIP_9117:
686 case CHIP_9215:
687 case CHIP_9217:
688 cfg = SMC_GET_HW_CFG(lp);
689 if (cfg & HW_CFG_EXT_PHY_DET_) {
690 cfg &= ~HW_CFG_PHY_CLK_SEL_;
691 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
692 SMC_SET_HW_CFG(lp, cfg);
693 udelay(10); /* Wait for clocks to stop */
694
695 cfg |= HW_CFG_EXT_PHY_EN_;
696 SMC_SET_HW_CFG(lp, cfg);
697 udelay(10); /* Wait for clocks to stop */
698
699 cfg &= ~HW_CFG_PHY_CLK_SEL_;
700 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
701 SMC_SET_HW_CFG(lp, cfg);
702 udelay(10); /* Wait for clocks to stop */
703
704 cfg |= HW_CFG_SMI_SEL_;
705 SMC_SET_HW_CFG(lp, cfg);
706
707 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
708
709 /* Read the PHY identifiers */
710 SMC_GET_PHY_ID1(lp, phyaddr & 31, id1);
711 SMC_GET_PHY_ID2(lp, phyaddr & 31, id2);
712
713 /* Make sure it is a valid identifier */
714 if (id1 != 0x0000 && id1 != 0xffff &&
715 id1 != 0x8000 && id2 != 0x0000 &&
716 id2 != 0xffff && id2 != 0x8000) {
717 /* Save the PHY's address */
718 lp->mii.phy_id = phyaddr & 31;
719 lp->phy_type = id1 << 16 | id2;
720 break;
721 }
722 }
723 if (phyaddr < 32)
724 /* Found an external PHY */
725 break;
726 }
727 default:
728 /* Internal media only */
729 SMC_GET_PHY_ID1(lp, 1, id1);
730 SMC_GET_PHY_ID2(lp, 1, id2);
731 /* Save the PHY's address */
732 lp->mii.phy_id = 1;
733 lp->phy_type = id1 << 16 | id2;
734 }
735
736 DBG(SMC_DEBUG_MISC, dev, "phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%x\n",
737 id1, id2, lp->mii.phy_id);
738 }
739
740 /*
741 * Sets the PHY to a configuration as determined by the user.
742 * Called with spin_lock held.
743 */
744 static int smc911x_phy_fixed(struct net_device *dev)
745 {
746 struct smc911x_local *lp = netdev_priv(dev);
747 int phyaddr = lp->mii.phy_id;
748 int bmcr;
749
750 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
751
752 /* Enter Link Disable state */
753 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
754 bmcr |= BMCR_PDOWN;
755 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
756
757 /*
758 * Set our fixed capabilities
759 * Disable auto-negotiation
760 */
761 bmcr &= ~BMCR_ANENABLE;
762 if (lp->ctl_rfduplx)
763 bmcr |= BMCR_FULLDPLX;
764
765 if (lp->ctl_rspeed == 100)
766 bmcr |= BMCR_SPEED100;
767
768 /* Write our capabilities to the phy control register */
769 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
770
771 /* Re-Configure the Receive/Phy Control register */
772 bmcr &= ~BMCR_PDOWN;
773 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
774
775 return 1;
776 }
777
778 /**
779 * smc911x_phy_reset - reset the phy
780 * @dev: net device
781 * @phy: phy address
782 *
783 * Issue a software reset for the specified PHY and
784 * wait up to 100ms for the reset to complete. We should
785 * not access the PHY for 50ms after issuing the reset.
786 *
787 * The time to wait appears to be dependent on the PHY.
788 *
789 */
790 static int smc911x_phy_reset(struct net_device *dev, int phy)
791 {
792 struct smc911x_local *lp = netdev_priv(dev);
793 int timeout;
794 unsigned long flags;
795 unsigned int reg;
796
797 DBG(SMC_DEBUG_FUNC, dev, "--> %s()\n", __func__);
798
799 spin_lock_irqsave(&lp->lock, flags);
800 reg = SMC_GET_PMT_CTRL(lp);
801 reg &= ~0xfffff030;
802 reg |= PMT_CTRL_PHY_RST_;
803 SMC_SET_PMT_CTRL(lp, reg);
804 spin_unlock_irqrestore(&lp->lock, flags);
805 for (timeout = 2; timeout; timeout--) {
806 msleep(50);
807 spin_lock_irqsave(&lp->lock, flags);
808 reg = SMC_GET_PMT_CTRL(lp);
809 spin_unlock_irqrestore(&lp->lock, flags);
810 if (!(reg & PMT_CTRL_PHY_RST_)) {
811 /* extra delay required because the phy may
812 * not be completed with its reset
813 * when PHY_BCR_RESET_ is cleared. 256us
814 * should suffice, but use 500us to be safe
815 */
816 udelay(500);
817 break;
818 }
819 }
820
821 return reg & PMT_CTRL_PHY_RST_;
822 }
823
824 /**
825 * smc911x_phy_powerdown - powerdown phy
826 * @dev: net device
827 * @phy: phy address
828 *
829 * Power down the specified PHY
830 */
831 static void smc911x_phy_powerdown(struct net_device *dev, int phy)
832 {
833 struct smc911x_local *lp = netdev_priv(dev);
834 unsigned int bmcr;
835
836 /* Enter Link Disable state */
837 SMC_GET_PHY_BMCR(lp, phy, bmcr);
838 bmcr |= BMCR_PDOWN;
839 SMC_SET_PHY_BMCR(lp, phy, bmcr);
840 }
841
842 /**
843 * smc911x_phy_check_media - check the media status and adjust BMCR
844 * @dev: net device
845 * @init: set true for initialisation
846 *
847 * Select duplex mode depending on negotiation state. This
848 * also updates our carrier state.
849 */
850 static void smc911x_phy_check_media(struct net_device *dev, int init)
851 {
852 struct smc911x_local *lp = netdev_priv(dev);
853 int phyaddr = lp->mii.phy_id;
854 unsigned int bmcr, cr;
855
856 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
857
858 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
859 /* duplex state has changed */
860 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
861 SMC_GET_MAC_CR(lp, cr);
862 if (lp->mii.full_duplex) {
863 DBG(SMC_DEBUG_MISC, dev, "Configuring for full-duplex mode\n");
864 bmcr |= BMCR_FULLDPLX;
865 cr |= MAC_CR_RCVOWN_;
866 } else {
867 DBG(SMC_DEBUG_MISC, dev, "Configuring for half-duplex mode\n");
868 bmcr &= ~BMCR_FULLDPLX;
869 cr &= ~MAC_CR_RCVOWN_;
870 }
871 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
872 SMC_SET_MAC_CR(lp, cr);
873 }
874 }
875
876 /*
877 * Configures the specified PHY through the MII management interface
878 * using Autonegotiation.
879 * Calls smc911x_phy_fixed() if the user has requested a certain config.
880 * If RPC ANEG bit is set, the media selection is dependent purely on
881 * the selection by the MII (either in the MII BMCR reg or the result
882 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
883 * is controlled by the RPC SPEED and RPC DPLX bits.
884 */
885 static void smc911x_phy_configure(struct work_struct *work)
886 {
887 struct smc911x_local *lp = container_of(work, struct smc911x_local,
888 phy_configure);
889 struct net_device *dev = lp->netdev;
890 int phyaddr = lp->mii.phy_id;
891 int my_phy_caps; /* My PHY capabilities */
892 int my_ad_caps; /* My Advertised capabilities */
893 int status;
894 unsigned long flags;
895
896 DBG(SMC_DEBUG_FUNC, dev, "--> %s()\n", __func__);
897
898 /*
899 * We should not be called if phy_type is zero.
900 */
901 if (lp->phy_type == 0)
902 return;
903
904 if (smc911x_phy_reset(dev, phyaddr)) {
905 netdev_info(dev, "PHY reset timed out\n");
906 return;
907 }
908 spin_lock_irqsave(&lp->lock, flags);
909
910 /*
911 * Enable PHY Interrupts (for register 18)
912 * Interrupts listed here are enabled
913 */
914 SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ |
915 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
916 PHY_INT_MASK_LINK_DOWN_);
917
918 /* If the user requested no auto neg, then go set his request */
919 if (lp->mii.force_media) {
920 smc911x_phy_fixed(dev);
921 goto smc911x_phy_configure_exit;
922 }
923
924 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
925 SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps);
926 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
927 netdev_info(dev, "Auto negotiation NOT supported\n");
928 smc911x_phy_fixed(dev);
929 goto smc911x_phy_configure_exit;
930 }
931
932 /* CSMA capable w/ both pauses */
933 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
934
935 if (my_phy_caps & BMSR_100BASE4)
936 my_ad_caps |= ADVERTISE_100BASE4;
937 if (my_phy_caps & BMSR_100FULL)
938 my_ad_caps |= ADVERTISE_100FULL;
939 if (my_phy_caps & BMSR_100HALF)
940 my_ad_caps |= ADVERTISE_100HALF;
941 if (my_phy_caps & BMSR_10FULL)
942 my_ad_caps |= ADVERTISE_10FULL;
943 if (my_phy_caps & BMSR_10HALF)
944 my_ad_caps |= ADVERTISE_10HALF;
945
946 /* Disable capabilities not selected by our user */
947 if (lp->ctl_rspeed != 100)
948 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
949
950 if (!lp->ctl_rfduplx)
951 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
952
953 /* Update our Auto-Neg Advertisement Register */
954 SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps);
955 lp->mii.advertising = my_ad_caps;
956
957 /*
958 * Read the register back. Without this, it appears that when
959 * auto-negotiation is restarted, sometimes it isn't ready and
960 * the link does not come up.
961 */
962 udelay(10);
963 SMC_GET_PHY_MII_ADV(lp, phyaddr, status);
964
965 DBG(SMC_DEBUG_MISC, dev, "phy caps=0x%04x\n", my_phy_caps);
966 DBG(SMC_DEBUG_MISC, dev, "phy advertised caps=0x%04x\n", my_ad_caps);
967
968 /* Restart auto-negotiation process in order to advertise my caps */
969 SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
970
971 smc911x_phy_check_media(dev, 1);
972
973 smc911x_phy_configure_exit:
974 spin_unlock_irqrestore(&lp->lock, flags);
975 }
976
977 /*
978 * smc911x_phy_interrupt
979 *
980 * Purpose: Handle interrupts relating to PHY register 18. This is
981 * called from the "hard" interrupt handler under our private spinlock.
982 */
983 static void smc911x_phy_interrupt(struct net_device *dev)
984 {
985 struct smc911x_local *lp = netdev_priv(dev);
986 int phyaddr = lp->mii.phy_id;
987 int status;
988
989 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
990
991 if (lp->phy_type == 0)
992 return;
993
994 smc911x_phy_check_media(dev, 0);
995 /* read to clear status bits */
996 SMC_GET_PHY_INT_SRC(lp, phyaddr,status);
997 DBG(SMC_DEBUG_MISC, dev, "PHY interrupt status 0x%04x\n",
998 status & 0xffff);
999 DBG(SMC_DEBUG_MISC, dev, "AFC_CFG 0x%08x\n",
1000 SMC_GET_AFC_CFG(lp));
1001 }
1002
1003 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1004
1005 /*
1006 * This is the main routine of the driver, to handle the device when
1007 * it needs some attention.
1008 */
1009 static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
1010 {
1011 struct net_device *dev = dev_id;
1012 struct smc911x_local *lp = netdev_priv(dev);
1013 unsigned int status, mask, timeout;
1014 unsigned int rx_overrun=0, cr, pkts;
1015 unsigned long flags;
1016
1017 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1018
1019 spin_lock_irqsave(&lp->lock, flags);
1020
1021 /* Spurious interrupt check */
1022 if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
1023 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
1024 spin_unlock_irqrestore(&lp->lock, flags);
1025 return IRQ_NONE;
1026 }
1027
1028 mask = SMC_GET_INT_EN(lp);
1029 SMC_SET_INT_EN(lp, 0);
1030
1031 /* set a timeout value, so I don't stay here forever */
1032 timeout = 8;
1033
1034
1035 do {
1036 status = SMC_GET_INT(lp);
1037
1038 DBG(SMC_DEBUG_MISC, dev, "INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1039 status, mask, status & ~mask);
1040
1041 status &= mask;
1042 if (!status)
1043 break;
1044
1045 /* Handle SW interrupt condition */
1046 if (status & INT_STS_SW_INT_) {
1047 SMC_ACK_INT(lp, INT_STS_SW_INT_);
1048 mask &= ~INT_EN_SW_INT_EN_;
1049 }
1050 /* Handle various error conditions */
1051 if (status & INT_STS_RXE_) {
1052 SMC_ACK_INT(lp, INT_STS_RXE_);
1053 dev->stats.rx_errors++;
1054 }
1055 if (status & INT_STS_RXDFH_INT_) {
1056 SMC_ACK_INT(lp, INT_STS_RXDFH_INT_);
1057 dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp);
1058 }
1059 /* Undocumented interrupt-what is the right thing to do here? */
1060 if (status & INT_STS_RXDF_INT_) {
1061 SMC_ACK_INT(lp, INT_STS_RXDF_INT_);
1062 }
1063
1064 /* Rx Data FIFO exceeds set level */
1065 if (status & INT_STS_RDFL_) {
1066 if (IS_REV_A(lp->revision)) {
1067 rx_overrun=1;
1068 SMC_GET_MAC_CR(lp, cr);
1069 cr &= ~MAC_CR_RXEN_;
1070 SMC_SET_MAC_CR(lp, cr);
1071 DBG(SMC_DEBUG_RX, dev, "RX overrun\n");
1072 dev->stats.rx_errors++;
1073 dev->stats.rx_fifo_errors++;
1074 }
1075 SMC_ACK_INT(lp, INT_STS_RDFL_);
1076 }
1077 if (status & INT_STS_RDFO_) {
1078 if (!IS_REV_A(lp->revision)) {
1079 SMC_GET_MAC_CR(lp, cr);
1080 cr &= ~MAC_CR_RXEN_;
1081 SMC_SET_MAC_CR(lp, cr);
1082 rx_overrun=1;
1083 DBG(SMC_DEBUG_RX, dev, "RX overrun\n");
1084 dev->stats.rx_errors++;
1085 dev->stats.rx_fifo_errors++;
1086 }
1087 SMC_ACK_INT(lp, INT_STS_RDFO_);
1088 }
1089 /* Handle receive condition */
1090 if ((status & INT_STS_RSFL_) || rx_overrun) {
1091 unsigned int fifo;
1092 DBG(SMC_DEBUG_RX, dev, "RX irq\n");
1093 fifo = SMC_GET_RX_FIFO_INF(lp);
1094 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1095 DBG(SMC_DEBUG_RX, dev, "Rx FIFO pkts %d, bytes %d\n",
1096 pkts, fifo & 0xFFFF);
1097 if (pkts != 0) {
1098 #ifdef SMC_USE_DMA
1099 unsigned int fifo;
1100 if (lp->rxdma_active){
1101 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev,
1102 "RX DMA active\n");
1103 /* The DMA is already running so up the IRQ threshold */
1104 fifo = SMC_GET_FIFO_INT(lp) & ~0xFF;
1105 fifo |= pkts & 0xFF;
1106 DBG(SMC_DEBUG_RX, dev,
1107 "Setting RX stat FIFO threshold to %d\n",
1108 fifo & 0xff);
1109 SMC_SET_FIFO_INT(lp, fifo);
1110 } else
1111 #endif
1112 smc911x_rcv(dev);
1113 }
1114 SMC_ACK_INT(lp, INT_STS_RSFL_);
1115 }
1116 /* Handle transmit FIFO available */
1117 if (status & INT_STS_TDFA_) {
1118 DBG(SMC_DEBUG_TX, dev, "TX data FIFO space available irq\n");
1119 SMC_SET_FIFO_TDA(lp, 0xFF);
1120 lp->tx_throttle = 0;
1121 #ifdef SMC_USE_DMA
1122 if (!lp->txdma_active)
1123 #endif
1124 netif_wake_queue(dev);
1125 SMC_ACK_INT(lp, INT_STS_TDFA_);
1126 }
1127 /* Handle transmit done condition */
1128 #if 1
1129 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
1130 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC, dev,
1131 "Tx stat FIFO limit (%d) /GPT irq\n",
1132 (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16);
1133 smc911x_tx(dev);
1134 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1135 SMC_ACK_INT(lp, INT_STS_TSFL_);
1136 SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_);
1137 }
1138 #else
1139 if (status & INT_STS_TSFL_) {
1140 DBG(SMC_DEBUG_TX, dev, "TX status FIFO limit (%d) irq\n", ?);
1141 smc911x_tx(dev);
1142 SMC_ACK_INT(lp, INT_STS_TSFL_);
1143 }
1144
1145 if (status & INT_STS_GPT_INT_) {
1146 DBG(SMC_DEBUG_RX, dev, "IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1147 SMC_GET_IRQ_CFG(lp),
1148 SMC_GET_FIFO_INT(lp),
1149 SMC_GET_RX_CFG(lp));
1150 DBG(SMC_DEBUG_RX, dev, "Rx Stat FIFO Used 0x%02x Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
1151 (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16,
1152 SMC_GET_RX_FIFO_INF(lp) & 0xffff,
1153 SMC_GET_RX_STS_FIFO_PEEK(lp));
1154 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1155 SMC_ACK_INT(lp, INT_STS_GPT_INT_);
1156 }
1157 #endif
1158
1159 /* Handle PHY interrupt condition */
1160 if (status & INT_STS_PHY_INT_) {
1161 DBG(SMC_DEBUG_MISC, dev, "PHY irq\n");
1162 smc911x_phy_interrupt(dev);
1163 SMC_ACK_INT(lp, INT_STS_PHY_INT_);
1164 }
1165 } while (--timeout);
1166
1167 /* restore mask state */
1168 SMC_SET_INT_EN(lp, mask);
1169
1170 DBG(SMC_DEBUG_MISC, dev, "Interrupt done (%d loops)\n",
1171 8-timeout);
1172
1173 spin_unlock_irqrestore(&lp->lock, flags);
1174
1175 return IRQ_HANDLED;
1176 }
1177
1178 #ifdef SMC_USE_DMA
1179 static void
1180 smc911x_tx_dma_irq(void *data)
1181 {
1182 struct smc911x_local *lp = data;
1183 struct net_device *dev = lp->netdev;
1184 struct sk_buff *skb = lp->current_tx_skb;
1185 unsigned long flags;
1186
1187 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1188
1189 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "TX DMA irq handler\n");
1190 BUG_ON(skb == NULL);
1191 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1192 netif_trans_update(dev);
1193 dev_kfree_skb_irq(skb);
1194 lp->current_tx_skb = NULL;
1195 if (lp->pending_tx_skb != NULL)
1196 smc911x_hardware_send_pkt(dev);
1197 else {
1198 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev,
1199 "No pending Tx packets. DMA disabled\n");
1200 spin_lock_irqsave(&lp->lock, flags);
1201 lp->txdma_active = 0;
1202 if (!lp->tx_throttle) {
1203 netif_wake_queue(dev);
1204 }
1205 spin_unlock_irqrestore(&lp->lock, flags);
1206 }
1207
1208 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev,
1209 "TX DMA irq completed\n");
1210 }
1211 static void
1212 smc911x_rx_dma_irq(void *data)
1213 {
1214 struct smc911x_local *lp = data;
1215 struct net_device *dev = lp->netdev;
1216 struct sk_buff *skb = lp->current_rx_skb;
1217 unsigned long flags;
1218 unsigned int pkts;
1219
1220 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1221 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev, "RX DMA irq handler\n");
1222 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1223 BUG_ON(skb == NULL);
1224 lp->current_rx_skb = NULL;
1225 PRINT_PKT(skb->data, skb->len);
1226 skb->protocol = eth_type_trans(skb, dev);
1227 dev->stats.rx_packets++;
1228 dev->stats.rx_bytes += skb->len;
1229 netif_rx(skb);
1230
1231 spin_lock_irqsave(&lp->lock, flags);
1232 pkts = (SMC_GET_RX_FIFO_INF(lp) & RX_FIFO_INF_RXSUSED_) >> 16;
1233 if (pkts != 0) {
1234 smc911x_rcv(dev);
1235 }else {
1236 lp->rxdma_active = 0;
1237 }
1238 spin_unlock_irqrestore(&lp->lock, flags);
1239 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev,
1240 "RX DMA irq completed. DMA RX FIFO PKTS %d\n",
1241 pkts);
1242 }
1243 #endif /* SMC_USE_DMA */
1244
1245 #ifdef CONFIG_NET_POLL_CONTROLLER
1246 /*
1247 * Polling receive - used by netconsole and other diagnostic tools
1248 * to allow network i/o with interrupts disabled.
1249 */
1250 static void smc911x_poll_controller(struct net_device *dev)
1251 {
1252 disable_irq(dev->irq);
1253 smc911x_interrupt(dev->irq, dev);
1254 enable_irq(dev->irq);
1255 }
1256 #endif
1257
1258 /* Our watchdog timed out. Called by the networking layer */
1259 static void smc911x_timeout(struct net_device *dev)
1260 {
1261 struct smc911x_local *lp = netdev_priv(dev);
1262 int status, mask;
1263 unsigned long flags;
1264
1265 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1266
1267 spin_lock_irqsave(&lp->lock, flags);
1268 status = SMC_GET_INT(lp);
1269 mask = SMC_GET_INT_EN(lp);
1270 spin_unlock_irqrestore(&lp->lock, flags);
1271 DBG(SMC_DEBUG_MISC, dev, "INT 0x%02x MASK 0x%02x\n",
1272 status, mask);
1273
1274 /* Dump the current TX FIFO contents and restart */
1275 mask = SMC_GET_TX_CFG(lp);
1276 SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
1277 /*
1278 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1279 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1280 * which calls schedule(). Hence we use a work queue.
1281 */
1282 if (lp->phy_type != 0)
1283 schedule_work(&lp->phy_configure);
1284
1285 /* We can accept TX packets again */
1286 netif_trans_update(dev); /* prevent tx timeout */
1287 netif_wake_queue(dev);
1288 }
1289
1290 /*
1291 * This routine will, depending on the values passed to it,
1292 * either make it accept multicast packets, go into
1293 * promiscuous mode (for TCPDUMP and cousins) or accept
1294 * a select set of multicast packets
1295 */
1296 static void smc911x_set_multicast_list(struct net_device *dev)
1297 {
1298 struct smc911x_local *lp = netdev_priv(dev);
1299 unsigned int multicast_table[2];
1300 unsigned int mcr, update_multicast = 0;
1301 unsigned long flags;
1302
1303 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1304
1305 spin_lock_irqsave(&lp->lock, flags);
1306 SMC_GET_MAC_CR(lp, mcr);
1307 spin_unlock_irqrestore(&lp->lock, flags);
1308
1309 if (dev->flags & IFF_PROMISC) {
1310
1311 DBG(SMC_DEBUG_MISC, dev, "RCR_PRMS\n");
1312 mcr |= MAC_CR_PRMS_;
1313 }
1314 /*
1315 * Here, I am setting this to accept all multicast packets.
1316 * I don't need to zero the multicast table, because the flag is
1317 * checked before the table is
1318 */
1319 else if (dev->flags & IFF_ALLMULTI || netdev_mc_count(dev) > 16) {
1320 DBG(SMC_DEBUG_MISC, dev, "RCR_ALMUL\n");
1321 mcr |= MAC_CR_MCPAS_;
1322 }
1323
1324 /*
1325 * This sets the internal hardware table to filter out unwanted
1326 * multicast packets before they take up memory.
1327 *
1328 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1329 * address are the offset into the table. If that bit is 1, then the
1330 * multicast packet is accepted. Otherwise, it's dropped silently.
1331 *
1332 * To use the 6 bits as an offset into the table, the high 1 bit is
1333 * the number of the 32 bit register, while the low 5 bits are the bit
1334 * within that register.
1335 */
1336 else if (!netdev_mc_empty(dev)) {
1337 struct netdev_hw_addr *ha;
1338
1339 /* Set the Hash perfec mode */
1340 mcr |= MAC_CR_HPFILT_;
1341
1342 /* start with a table of all zeros: reject all */
1343 memset(multicast_table, 0, sizeof(multicast_table));
1344
1345 netdev_for_each_mc_addr(ha, dev) {
1346 u32 position;
1347
1348 /* upper 6 bits are used as hash index */
1349 position = ether_crc(ETH_ALEN, ha->addr)>>26;
1350
1351 multicast_table[position>>5] |= 1 << (position&0x1f);
1352 }
1353
1354 /* be sure I get rid of flags I might have set */
1355 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1356
1357 /* now, the table can be loaded into the chipset */
1358 update_multicast = 1;
1359 } else {
1360 DBG(SMC_DEBUG_MISC, dev, "~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n");
1361 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1362
1363 /*
1364 * since I'm disabling all multicast entirely, I need to
1365 * clear the multicast list
1366 */
1367 memset(multicast_table, 0, sizeof(multicast_table));
1368 update_multicast = 1;
1369 }
1370
1371 spin_lock_irqsave(&lp->lock, flags);
1372 SMC_SET_MAC_CR(lp, mcr);
1373 if (update_multicast) {
1374 DBG(SMC_DEBUG_MISC, dev,
1375 "update mcast hash table 0x%08x 0x%08x\n",
1376 multicast_table[0], multicast_table[1]);
1377 SMC_SET_HASHL(lp, multicast_table[0]);
1378 SMC_SET_HASHH(lp, multicast_table[1]);
1379 }
1380 spin_unlock_irqrestore(&lp->lock, flags);
1381 }
1382
1383
1384 /*
1385 * Open and Initialize the board
1386 *
1387 * Set up everything, reset the card, etc..
1388 */
1389 static int
1390 smc911x_open(struct net_device *dev)
1391 {
1392 struct smc911x_local *lp = netdev_priv(dev);
1393
1394 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1395
1396 /* reset the hardware */
1397 smc911x_reset(dev);
1398
1399 /* Configure the PHY, initialize the link state */
1400 smc911x_phy_configure(&lp->phy_configure);
1401
1402 /* Turn on Tx + Rx */
1403 smc911x_enable(dev);
1404
1405 netif_start_queue(dev);
1406
1407 return 0;
1408 }
1409
1410 /*
1411 * smc911x_close
1412 *
1413 * this makes the board clean up everything that it can
1414 * and not talk to the outside world. Caused by
1415 * an 'ifconfig ethX down'
1416 */
1417 static int smc911x_close(struct net_device *dev)
1418 {
1419 struct smc911x_local *lp = netdev_priv(dev);
1420
1421 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1422
1423 netif_stop_queue(dev);
1424 netif_carrier_off(dev);
1425
1426 /* clear everything */
1427 smc911x_shutdown(dev);
1428
1429 if (lp->phy_type != 0) {
1430 /* We need to ensure that no calls to
1431 * smc911x_phy_configure are pending.
1432 */
1433 cancel_work_sync(&lp->phy_configure);
1434 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1435 }
1436
1437 if (lp->pending_tx_skb) {
1438 dev_kfree_skb(lp->pending_tx_skb);
1439 lp->pending_tx_skb = NULL;
1440 }
1441
1442 return 0;
1443 }
1444
1445 /*
1446 * Ethtool support
1447 */
1448 static int
1449 smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1450 {
1451 struct smc911x_local *lp = netdev_priv(dev);
1452 int ret, status;
1453 unsigned long flags;
1454
1455 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1456 cmd->maxtxpkt = 1;
1457 cmd->maxrxpkt = 1;
1458
1459 if (lp->phy_type != 0) {
1460 spin_lock_irqsave(&lp->lock, flags);
1461 ret = mii_ethtool_gset(&lp->mii, cmd);
1462 spin_unlock_irqrestore(&lp->lock, flags);
1463 } else {
1464 cmd->supported = SUPPORTED_10baseT_Half |
1465 SUPPORTED_10baseT_Full |
1466 SUPPORTED_TP | SUPPORTED_AUI;
1467
1468 if (lp->ctl_rspeed == 10)
1469 ethtool_cmd_speed_set(cmd, SPEED_10);
1470 else if (lp->ctl_rspeed == 100)
1471 ethtool_cmd_speed_set(cmd, SPEED_100);
1472
1473 cmd->autoneg = AUTONEG_DISABLE;
1474 if (lp->mii.phy_id==1)
1475 cmd->transceiver = XCVR_INTERNAL;
1476 else
1477 cmd->transceiver = XCVR_EXTERNAL;
1478 cmd->port = 0;
1479 SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status);
1480 cmd->duplex =
1481 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
1482 DUPLEX_FULL : DUPLEX_HALF;
1483 ret = 0;
1484 }
1485
1486 return ret;
1487 }
1488
1489 static int
1490 smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1491 {
1492 struct smc911x_local *lp = netdev_priv(dev);
1493 int ret;
1494 unsigned long flags;
1495
1496 if (lp->phy_type != 0) {
1497 spin_lock_irqsave(&lp->lock, flags);
1498 ret = mii_ethtool_sset(&lp->mii, cmd);
1499 spin_unlock_irqrestore(&lp->lock, flags);
1500 } else {
1501 if (cmd->autoneg != AUTONEG_DISABLE ||
1502 cmd->speed != SPEED_10 ||
1503 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1504 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1505 return -EINVAL;
1506
1507 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1508
1509 ret = 0;
1510 }
1511
1512 return ret;
1513 }
1514
1515 static void
1516 smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1517 {
1518 strlcpy(info->driver, CARDNAME, sizeof(info->driver));
1519 strlcpy(info->version, version, sizeof(info->version));
1520 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1521 sizeof(info->bus_info));
1522 }
1523
1524 static int smc911x_ethtool_nwayreset(struct net_device *dev)
1525 {
1526 struct smc911x_local *lp = netdev_priv(dev);
1527 int ret = -EINVAL;
1528 unsigned long flags;
1529
1530 if (lp->phy_type != 0) {
1531 spin_lock_irqsave(&lp->lock, flags);
1532 ret = mii_nway_restart(&lp->mii);
1533 spin_unlock_irqrestore(&lp->lock, flags);
1534 }
1535
1536 return ret;
1537 }
1538
1539 static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1540 {
1541 struct smc911x_local *lp = netdev_priv(dev);
1542 return lp->msg_enable;
1543 }
1544
1545 static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1546 {
1547 struct smc911x_local *lp = netdev_priv(dev);
1548 lp->msg_enable = level;
1549 }
1550
1551 static int smc911x_ethtool_getregslen(struct net_device *dev)
1552 {
1553 /* System regs + MAC regs + PHY regs */
1554 return (((E2P_CMD - ID_REV)/4 + 1) +
1555 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
1556 }
1557
1558 static void smc911x_ethtool_getregs(struct net_device *dev,
1559 struct ethtool_regs* regs, void *buf)
1560 {
1561 struct smc911x_local *lp = netdev_priv(dev);
1562 unsigned long flags;
1563 u32 reg,i,j=0;
1564 u32 *data = (u32*)buf;
1565
1566 regs->version = lp->version;
1567 for(i=ID_REV;i<=E2P_CMD;i+=4) {
1568 data[j++] = SMC_inl(lp, i);
1569 }
1570 for(i=MAC_CR;i<=WUCSR;i++) {
1571 spin_lock_irqsave(&lp->lock, flags);
1572 SMC_GET_MAC_CSR(lp, i, reg);
1573 spin_unlock_irqrestore(&lp->lock, flags);
1574 data[j++] = reg;
1575 }
1576 for(i=0;i<=31;i++) {
1577 spin_lock_irqsave(&lp->lock, flags);
1578 SMC_GET_MII(lp, i, lp->mii.phy_id, reg);
1579 spin_unlock_irqrestore(&lp->lock, flags);
1580 data[j++] = reg & 0xFFFF;
1581 }
1582 }
1583
1584 static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1585 {
1586 struct smc911x_local *lp = netdev_priv(dev);
1587 unsigned int timeout;
1588 int e2p_cmd;
1589
1590 e2p_cmd = SMC_GET_E2P_CMD(lp);
1591 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1592 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
1593 PRINTK(dev, "%s timeout waiting for EEPROM to respond\n",
1594 __func__);
1595 return -EFAULT;
1596 }
1597 mdelay(1);
1598 e2p_cmd = SMC_GET_E2P_CMD(lp);
1599 }
1600 if (timeout == 0) {
1601 PRINTK(dev, "%s timeout waiting for EEPROM CMD not busy\n",
1602 __func__);
1603 return -ETIMEDOUT;
1604 }
1605 return 0;
1606 }
1607
1608 static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
1609 int cmd, int addr)
1610 {
1611 struct smc911x_local *lp = netdev_priv(dev);
1612 int ret;
1613
1614 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1615 return ret;
1616 SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ |
1617 ((cmd) & (0x7<<28)) |
1618 ((addr) & 0xFF));
1619 return 0;
1620 }
1621
1622 static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
1623 u8 *data)
1624 {
1625 struct smc911x_local *lp = netdev_priv(dev);
1626 int ret;
1627
1628 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1629 return ret;
1630 *data = SMC_GET_E2P_DATA(lp);
1631 return 0;
1632 }
1633
1634 static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
1635 u8 data)
1636 {
1637 struct smc911x_local *lp = netdev_priv(dev);
1638 int ret;
1639
1640 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1641 return ret;
1642 SMC_SET_E2P_DATA(lp, data);
1643 return 0;
1644 }
1645
1646 static int smc911x_ethtool_geteeprom(struct net_device *dev,
1647 struct ethtool_eeprom *eeprom, u8 *data)
1648 {
1649 u8 eebuf[SMC911X_EEPROM_LEN];
1650 int i, ret;
1651
1652 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1653 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1654 return ret;
1655 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1656 return ret;
1657 }
1658 memcpy(data, eebuf+eeprom->offset, eeprom->len);
1659 return 0;
1660 }
1661
1662 static int smc911x_ethtool_seteeprom(struct net_device *dev,
1663 struct ethtool_eeprom *eeprom, u8 *data)
1664 {
1665 int i, ret;
1666
1667 /* Enable erase */
1668 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1669 return ret;
1670 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1671 /* erase byte */
1672 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1673 return ret;
1674 /* write byte */
1675 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1676 return ret;
1677 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1678 return ret;
1679 }
1680 return 0;
1681 }
1682
1683 static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1684 {
1685 return SMC911X_EEPROM_LEN;
1686 }
1687
1688 static const struct ethtool_ops smc911x_ethtool_ops = {
1689 .get_settings = smc911x_ethtool_getsettings,
1690 .set_settings = smc911x_ethtool_setsettings,
1691 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1692 .get_msglevel = smc911x_ethtool_getmsglevel,
1693 .set_msglevel = smc911x_ethtool_setmsglevel,
1694 .nway_reset = smc911x_ethtool_nwayreset,
1695 .get_link = ethtool_op_get_link,
1696 .get_regs_len = smc911x_ethtool_getregslen,
1697 .get_regs = smc911x_ethtool_getregs,
1698 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1699 .get_eeprom = smc911x_ethtool_geteeprom,
1700 .set_eeprom = smc911x_ethtool_seteeprom,
1701 };
1702
1703 /*
1704 * smc911x_findirq
1705 *
1706 * This routine has a simple purpose -- make the SMC chip generate an
1707 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1708 */
1709 static int smc911x_findirq(struct net_device *dev)
1710 {
1711 struct smc911x_local *lp = netdev_priv(dev);
1712 int timeout = 20;
1713 unsigned long cookie;
1714
1715 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1716
1717 cookie = probe_irq_on();
1718
1719 /*
1720 * Force a SW interrupt
1721 */
1722
1723 SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_);
1724
1725 /*
1726 * Wait until positive that the interrupt has been generated
1727 */
1728 do {
1729 int int_status;
1730 udelay(10);
1731 int_status = SMC_GET_INT_EN(lp);
1732 if (int_status & INT_EN_SW_INT_EN_)
1733 break; /* got the interrupt */
1734 } while (--timeout);
1735
1736 /*
1737 * there is really nothing that I can do here if timeout fails,
1738 * as autoirq_report will return a 0 anyway, which is what I
1739 * want in this case. Plus, the clean up is needed in both
1740 * cases.
1741 */
1742
1743 /* and disable all interrupts again */
1744 SMC_SET_INT_EN(lp, 0);
1745
1746 /* and return what I found */
1747 return probe_irq_off(cookie);
1748 }
1749
1750 static const struct net_device_ops smc911x_netdev_ops = {
1751 .ndo_open = smc911x_open,
1752 .ndo_stop = smc911x_close,
1753 .ndo_start_xmit = smc911x_hard_start_xmit,
1754 .ndo_tx_timeout = smc911x_timeout,
1755 .ndo_set_rx_mode = smc911x_set_multicast_list,
1756 .ndo_change_mtu = eth_change_mtu,
1757 .ndo_validate_addr = eth_validate_addr,
1758 .ndo_set_mac_address = eth_mac_addr,
1759 #ifdef CONFIG_NET_POLL_CONTROLLER
1760 .ndo_poll_controller = smc911x_poll_controller,
1761 #endif
1762 };
1763
1764 /*
1765 * Function: smc911x_probe(unsigned long ioaddr)
1766 *
1767 * Purpose:
1768 * Tests to see if a given ioaddr points to an SMC911x chip.
1769 * Returns a 0 on success
1770 *
1771 * Algorithm:
1772 * (1) see if the endian word is OK
1773 * (1) see if I recognize the chip ID in the appropriate register
1774 *
1775 * Here I do typical initialization tasks.
1776 *
1777 * o Initialize the structure if needed
1778 * o print out my vanity message if not done so already
1779 * o print out what type of hardware is detected
1780 * o print out the ethernet address
1781 * o find the IRQ
1782 * o set up my private data
1783 * o configure the dev structure with my subroutines
1784 * o actually GRAB the irq.
1785 * o GRAB the region
1786 */
1787 static int smc911x_probe(struct net_device *dev)
1788 {
1789 struct smc911x_local *lp = netdev_priv(dev);
1790 int i, retval;
1791 unsigned int val, chip_id, revision;
1792 const char *version_string;
1793 unsigned long irq_flags;
1794 #ifdef SMC_USE_DMA
1795 struct dma_slave_config config;
1796 dma_cap_mask_t mask;
1797 struct pxad_param param;
1798 #endif
1799
1800 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1801
1802 /* First, see if the endian word is recognized */
1803 val = SMC_GET_BYTE_TEST(lp);
1804 DBG(SMC_DEBUG_MISC, dev, "%s: endian probe returned 0x%04x\n",
1805 CARDNAME, val);
1806 if (val != 0x87654321) {
1807 netdev_err(dev, "Invalid chip endian 0x%08x\n", val);
1808 retval = -ENODEV;
1809 goto err_out;
1810 }
1811
1812 /*
1813 * check if the revision register is something that I
1814 * recognize. These might need to be added to later,
1815 * as future revisions could be added.
1816 */
1817 chip_id = SMC_GET_PN(lp);
1818 DBG(SMC_DEBUG_MISC, dev, "%s: id probe returned 0x%04x\n",
1819 CARDNAME, chip_id);
1820 for(i=0;chip_ids[i].id != 0; i++) {
1821 if (chip_ids[i].id == chip_id) break;
1822 }
1823 if (!chip_ids[i].id) {
1824 netdev_err(dev, "Unknown chip ID %04x\n", chip_id);
1825 retval = -ENODEV;
1826 goto err_out;
1827 }
1828 version_string = chip_ids[i].name;
1829
1830 revision = SMC_GET_REV(lp);
1831 DBG(SMC_DEBUG_MISC, dev, "%s: revision = 0x%04x\n", CARDNAME, revision);
1832
1833 /* At this point I'll assume that the chip is an SMC911x. */
1834 DBG(SMC_DEBUG_MISC, dev, "%s: Found a %s\n",
1835 CARDNAME, chip_ids[i].name);
1836
1837 /* Validate the TX FIFO size requested */
1838 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1839 netdev_err(dev, "Invalid TX FIFO size requested %d\n",
1840 tx_fifo_kb);
1841 retval = -EINVAL;
1842 goto err_out;
1843 }
1844
1845 /* fill in some of the fields */
1846 lp->version = chip_ids[i].id;
1847 lp->revision = revision;
1848 lp->tx_fifo_kb = tx_fifo_kb;
1849 /* Reverse calculate the RX FIFO size from the TX */
1850 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1851 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1852
1853 /* Set the automatic flow control values */
1854 switch(lp->tx_fifo_kb) {
1855 /*
1856 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1857 * AFC_LO is AFC_HI/2
1858 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1859 */
1860 case 2:/* 13440 Rx Data Fifo Size */
1861 lp->afc_cfg=0x008C46AF;break;
1862 case 3:/* 12480 Rx Data Fifo Size */
1863 lp->afc_cfg=0x0082419F;break;
1864 case 4:/* 11520 Rx Data Fifo Size */
1865 lp->afc_cfg=0x00783C9F;break;
1866 case 5:/* 10560 Rx Data Fifo Size */
1867 lp->afc_cfg=0x006E374F;break;
1868 case 6:/* 9600 Rx Data Fifo Size */
1869 lp->afc_cfg=0x0064328F;break;
1870 case 7:/* 8640 Rx Data Fifo Size */
1871 lp->afc_cfg=0x005A2D7F;break;
1872 case 8:/* 7680 Rx Data Fifo Size */
1873 lp->afc_cfg=0x0050287F;break;
1874 case 9:/* 6720 Rx Data Fifo Size */
1875 lp->afc_cfg=0x0046236F;break;
1876 case 10:/* 5760 Rx Data Fifo Size */
1877 lp->afc_cfg=0x003C1E6F;break;
1878 case 11:/* 4800 Rx Data Fifo Size */
1879 lp->afc_cfg=0x0032195F;break;
1880 /*
1881 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
1882 * AFC_LO is AFC_HI/2
1883 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1884 */
1885 case 12:/* 3840 Rx Data Fifo Size */
1886 lp->afc_cfg=0x0024124F;break;
1887 case 13:/* 2880 Rx Data Fifo Size */
1888 lp->afc_cfg=0x0015073F;break;
1889 case 14:/* 1920 Rx Data Fifo Size */
1890 lp->afc_cfg=0x0006032F;break;
1891 default:
1892 PRINTK(dev, "ERROR -- no AFC_CFG setting found");
1893 break;
1894 }
1895
1896 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX, dev,
1897 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
1898 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
1899
1900 spin_lock_init(&lp->lock);
1901
1902 /* Get the MAC address */
1903 SMC_GET_MAC_ADDR(lp, dev->dev_addr);
1904
1905 /* now, reset the chip, and put it into a known state */
1906 smc911x_reset(dev);
1907
1908 /*
1909 * If dev->irq is 0, then the device has to be banged on to see
1910 * what the IRQ is.
1911 *
1912 * Specifying an IRQ is done with the assumption that the user knows
1913 * what (s)he is doing. No checking is done!!!!
1914 */
1915 if (dev->irq < 1) {
1916 int trials;
1917
1918 trials = 3;
1919 while (trials--) {
1920 dev->irq = smc911x_findirq(dev);
1921 if (dev->irq)
1922 break;
1923 /* kick the card and try again */
1924 smc911x_reset(dev);
1925 }
1926 }
1927 if (dev->irq == 0) {
1928 netdev_warn(dev, "Couldn't autodetect your IRQ. Use irq=xx.\n");
1929 retval = -ENODEV;
1930 goto err_out;
1931 }
1932 dev->irq = irq_canonicalize(dev->irq);
1933
1934 dev->netdev_ops = &smc911x_netdev_ops;
1935 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1936 dev->ethtool_ops = &smc911x_ethtool_ops;
1937
1938 INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
1939 lp->mii.phy_id_mask = 0x1f;
1940 lp->mii.reg_num_mask = 0x1f;
1941 lp->mii.force_media = 0;
1942 lp->mii.full_duplex = 0;
1943 lp->mii.dev = dev;
1944 lp->mii.mdio_read = smc911x_phy_read;
1945 lp->mii.mdio_write = smc911x_phy_write;
1946
1947 /*
1948 * Locate the phy, if any.
1949 */
1950 smc911x_phy_detect(dev);
1951
1952 /* Set default parameters */
1953 lp->msg_enable = NETIF_MSG_LINK;
1954 lp->ctl_rfduplx = 1;
1955 lp->ctl_rspeed = 100;
1956
1957 #ifdef SMC_DYNAMIC_BUS_CONFIG
1958 irq_flags = lp->cfg.irq_flags;
1959 #else
1960 irq_flags = IRQF_SHARED | SMC_IRQ_SENSE;
1961 #endif
1962
1963 /* Grab the IRQ */
1964 retval = request_irq(dev->irq, smc911x_interrupt,
1965 irq_flags, dev->name, dev);
1966 if (retval)
1967 goto err_out;
1968
1969 #ifdef SMC_USE_DMA
1970
1971 dma_cap_zero(mask);
1972 dma_cap_set(DMA_SLAVE, mask);
1973 param.prio = PXAD_PRIO_LOWEST;
1974 param.drcmr = -1UL;
1975
1976 lp->rxdma =
1977 dma_request_slave_channel_compat(mask, pxad_filter_fn,
1978 &param, &dev->dev, "rx");
1979 lp->txdma =
1980 dma_request_slave_channel_compat(mask, pxad_filter_fn,
1981 &param, &dev->dev, "tx");
1982 lp->rxdma_active = 0;
1983 lp->txdma_active = 0;
1984
1985 memset(&config, 0, sizeof(config));
1986 config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1987 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1988 config.src_addr = lp->physaddr + RX_DATA_FIFO;
1989 config.dst_addr = lp->physaddr + TX_DATA_FIFO;
1990 config.src_maxburst = 32;
1991 config.dst_maxburst = 32;
1992 retval = dmaengine_slave_config(lp->rxdma, &config);
1993 if (retval) {
1994 dev_err(lp->dev, "dma rx channel configuration failed: %d\n",
1995 retval);
1996 goto err_out;
1997 }
1998 retval = dmaengine_slave_config(lp->txdma, &config);
1999 if (retval) {
2000 dev_err(lp->dev, "dma tx channel configuration failed: %d\n",
2001 retval);
2002 goto err_out;
2003 }
2004 #endif
2005
2006 retval = register_netdev(dev);
2007 if (retval == 0) {
2008 /* now, print out the card info, in a short format.. */
2009 netdev_info(dev, "%s (rev %d) at %#lx IRQ %d",
2010 version_string, lp->revision,
2011 dev->base_addr, dev->irq);
2012
2013 #ifdef SMC_USE_DMA
2014 if (lp->rxdma)
2015 pr_cont(" RXDMA %p", lp->rxdma);
2016
2017 if (lp->txdma)
2018 pr_cont(" TXDMA %p", lp->txdma);
2019 #endif
2020 pr_cont("\n");
2021 if (!is_valid_ether_addr(dev->dev_addr)) {
2022 netdev_warn(dev, "Invalid ethernet MAC address. Please set using ifconfig\n");
2023 } else {
2024 /* Print the Ethernet address */
2025 netdev_info(dev, "Ethernet addr: %pM\n",
2026 dev->dev_addr);
2027 }
2028
2029 if (lp->phy_type == 0) {
2030 PRINTK(dev, "No PHY found\n");
2031 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2032 PRINTK(dev, "LAN911x Internal PHY\n");
2033 } else {
2034 PRINTK(dev, "External PHY 0x%08x\n", lp->phy_type);
2035 }
2036 }
2037
2038 err_out:
2039 #ifdef SMC_USE_DMA
2040 if (retval) {
2041 if (lp->rxdma)
2042 dma_release_channel(lp->rxdma);
2043 if (lp->txdma)
2044 dma_release_channel(lp->txdma);
2045 }
2046 #endif
2047 return retval;
2048 }
2049
2050 /*
2051 * smc911x_drv_probe(void)
2052 *
2053 * Output:
2054 * 0 --> there is a device
2055 * anything else, error
2056 */
2057 static int smc911x_drv_probe(struct platform_device *pdev)
2058 {
2059 struct net_device *ndev;
2060 struct resource *res;
2061 struct smc911x_local *lp;
2062 void __iomem *addr;
2063 int ret;
2064
2065 /* ndev is not valid yet, so avoid passing it in. */
2066 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
2067 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2068 if (!res) {
2069 ret = -ENODEV;
2070 goto out;
2071 }
2072
2073 /*
2074 * Request the regions.
2075 */
2076 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2077 ret = -EBUSY;
2078 goto out;
2079 }
2080
2081 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2082 if (!ndev) {
2083 ret = -ENOMEM;
2084 goto release_1;
2085 }
2086 SET_NETDEV_DEV(ndev, &pdev->dev);
2087
2088 ndev->dma = (unsigned char)-1;
2089 ndev->irq = platform_get_irq(pdev, 0);
2090 lp = netdev_priv(ndev);
2091 lp->netdev = ndev;
2092 #ifdef SMC_DYNAMIC_BUS_CONFIG
2093 {
2094 struct smc911x_platdata *pd = dev_get_platdata(&pdev->dev);
2095 if (!pd) {
2096 ret = -EINVAL;
2097 goto release_both;
2098 }
2099 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2100 }
2101 #endif
2102
2103 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2104 if (!addr) {
2105 ret = -ENOMEM;
2106 goto release_both;
2107 }
2108
2109 platform_set_drvdata(pdev, ndev);
2110 lp->base = addr;
2111 ndev->base_addr = res->start;
2112 ret = smc911x_probe(ndev);
2113 if (ret != 0) {
2114 iounmap(addr);
2115 release_both:
2116 free_netdev(ndev);
2117 release_1:
2118 release_mem_region(res->start, SMC911X_IO_EXTENT);
2119 out:
2120 pr_info("%s: not found (%d).\n", CARDNAME, ret);
2121 }
2122 #ifdef SMC_USE_DMA
2123 else {
2124 lp->physaddr = res->start;
2125 lp->dev = &pdev->dev;
2126 }
2127 #endif
2128
2129 return ret;
2130 }
2131
2132 static int smc911x_drv_remove(struct platform_device *pdev)
2133 {
2134 struct net_device *ndev = platform_get_drvdata(pdev);
2135 struct smc911x_local *lp = netdev_priv(ndev);
2136 struct resource *res;
2137
2138 DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2139
2140 unregister_netdev(ndev);
2141
2142 free_irq(ndev->irq, ndev);
2143
2144 #ifdef SMC_USE_DMA
2145 {
2146 if (lp->rxdma)
2147 dma_release_channel(lp->rxdma);
2148 if (lp->txdma)
2149 dma_release_channel(lp->txdma);
2150 }
2151 #endif
2152 iounmap(lp->base);
2153 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2154 release_mem_region(res->start, SMC911X_IO_EXTENT);
2155
2156 free_netdev(ndev);
2157 return 0;
2158 }
2159
2160 static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2161 {
2162 struct net_device *ndev = platform_get_drvdata(dev);
2163 struct smc911x_local *lp = netdev_priv(ndev);
2164
2165 DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2166 if (ndev) {
2167 if (netif_running(ndev)) {
2168 netif_device_detach(ndev);
2169 smc911x_shutdown(ndev);
2170 #if POWER_DOWN
2171 /* Set D2 - Energy detect only setting */
2172 SMC_SET_PMT_CTRL(lp, 2<<12);
2173 #endif
2174 }
2175 }
2176 return 0;
2177 }
2178
2179 static int smc911x_drv_resume(struct platform_device *dev)
2180 {
2181 struct net_device *ndev = platform_get_drvdata(dev);
2182
2183 DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2184 if (ndev) {
2185 struct smc911x_local *lp = netdev_priv(ndev);
2186
2187 if (netif_running(ndev)) {
2188 smc911x_reset(ndev);
2189 if (lp->phy_type != 0)
2190 smc911x_phy_configure(&lp->phy_configure);
2191 smc911x_enable(ndev);
2192 netif_device_attach(ndev);
2193 }
2194 }
2195 return 0;
2196 }
2197
2198 static struct platform_driver smc911x_driver = {
2199 .probe = smc911x_drv_probe,
2200 .remove = smc911x_drv_remove,
2201 .suspend = smc911x_drv_suspend,
2202 .resume = smc911x_drv_resume,
2203 .driver = {
2204 .name = CARDNAME,
2205 },
2206 };
2207
2208 module_platform_driver(smc911x_driver);
Linux with added FPC-III support