rtl8187: Fix kernel oops when device is removed when LEDS enabled
[linux/fpc-iii.git] / arch / x86 / include / asm / kvm.h
blob4a5fe914dc59dceaf9f631eb24a97e978efff3d8
1 #ifndef _ASM_X86_KVM_H
2 #define _ASM_X86_KVM_H
4 /*
5 * KVM x86 specific structures and definitions
7 */
9 #include <linux/types.h>
10 #include <linux/ioctl.h>
12 /* Select x86 specific features in <linux/kvm.h> */
13 #define __KVM_HAVE_PIT
14 #define __KVM_HAVE_IOAPIC
15 #define __KVM_HAVE_DEVICE_ASSIGNMENT
16 #define __KVM_HAVE_MSI
17 #define __KVM_HAVE_USER_NMI
18 #define __KVM_HAVE_GUEST_DEBUG
19 #define __KVM_HAVE_MSIX
20 #define __KVM_HAVE_MCE
21 #define __KVM_HAVE_PIT_STATE2
23 /* Architectural interrupt line count. */
24 #define KVM_NR_INTERRUPTS 256
26 struct kvm_memory_alias {
27 __u32 slot; /* this has a different namespace than memory slots */
28 __u32 flags;
29 __u64 guest_phys_addr;
30 __u64 memory_size;
31 __u64 target_phys_addr;
34 /* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
35 struct kvm_pic_state {
36 __u8 last_irr; /* edge detection */
37 __u8 irr; /* interrupt request register */
38 __u8 imr; /* interrupt mask register */
39 __u8 isr; /* interrupt service register */
40 __u8 priority_add; /* highest irq priority */
41 __u8 irq_base;
42 __u8 read_reg_select;
43 __u8 poll;
44 __u8 special_mask;
45 __u8 init_state;
46 __u8 auto_eoi;
47 __u8 rotate_on_auto_eoi;
48 __u8 special_fully_nested_mode;
49 __u8 init4; /* true if 4 byte init */
50 __u8 elcr; /* PIIX edge/trigger selection */
51 __u8 elcr_mask;
54 #define KVM_IOAPIC_NUM_PINS 24
55 struct kvm_ioapic_state {
56 __u64 base_address;
57 __u32 ioregsel;
58 __u32 id;
59 __u32 irr;
60 __u32 pad;
61 union {
62 __u64 bits;
63 struct {
64 __u8 vector;
65 __u8 delivery_mode:3;
66 __u8 dest_mode:1;
67 __u8 delivery_status:1;
68 __u8 polarity:1;
69 __u8 remote_irr:1;
70 __u8 trig_mode:1;
71 __u8 mask:1;
72 __u8 reserve:7;
73 __u8 reserved[4];
74 __u8 dest_id;
75 } fields;
76 } redirtbl[KVM_IOAPIC_NUM_PINS];
79 #define KVM_IRQCHIP_PIC_MASTER 0
80 #define KVM_IRQCHIP_PIC_SLAVE 1
81 #define KVM_IRQCHIP_IOAPIC 2
83 /* for KVM_GET_REGS and KVM_SET_REGS */
84 struct kvm_regs {
85 /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
86 __u64 rax, rbx, rcx, rdx;
87 __u64 rsi, rdi, rsp, rbp;
88 __u64 r8, r9, r10, r11;
89 __u64 r12, r13, r14, r15;
90 __u64 rip, rflags;
93 /* for KVM_GET_LAPIC and KVM_SET_LAPIC */
94 #define KVM_APIC_REG_SIZE 0x400
95 struct kvm_lapic_state {
96 char regs[KVM_APIC_REG_SIZE];
99 struct kvm_segment {
100 __u64 base;
101 __u32 limit;
102 __u16 selector;
103 __u8 type;
104 __u8 present, dpl, db, s, l, g, avl;
105 __u8 unusable;
106 __u8 padding;
109 struct kvm_dtable {
110 __u64 base;
111 __u16 limit;
112 __u16 padding[3];
116 /* for KVM_GET_SREGS and KVM_SET_SREGS */
117 struct kvm_sregs {
118 /* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
119 struct kvm_segment cs, ds, es, fs, gs, ss;
120 struct kvm_segment tr, ldt;
121 struct kvm_dtable gdt, idt;
122 __u64 cr0, cr2, cr3, cr4, cr8;
123 __u64 efer;
124 __u64 apic_base;
125 __u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
128 /* for KVM_GET_FPU and KVM_SET_FPU */
129 struct kvm_fpu {
130 __u8 fpr[8][16];
131 __u16 fcw;
132 __u16 fsw;
133 __u8 ftwx; /* in fxsave format */
134 __u8 pad1;
135 __u16 last_opcode;
136 __u64 last_ip;
137 __u64 last_dp;
138 __u8 xmm[16][16];
139 __u32 mxcsr;
140 __u32 pad2;
143 struct kvm_msr_entry {
144 __u32 index;
145 __u32 reserved;
146 __u64 data;
149 /* for KVM_GET_MSRS and KVM_SET_MSRS */
150 struct kvm_msrs {
151 __u32 nmsrs; /* number of msrs in entries */
152 __u32 pad;
154 struct kvm_msr_entry entries[0];
157 /* for KVM_GET_MSR_INDEX_LIST */
158 struct kvm_msr_list {
159 __u32 nmsrs; /* number of msrs in entries */
160 __u32 indices[0];
164 struct kvm_cpuid_entry {
165 __u32 function;
166 __u32 eax;
167 __u32 ebx;
168 __u32 ecx;
169 __u32 edx;
170 __u32 padding;
173 /* for KVM_SET_CPUID */
174 struct kvm_cpuid {
175 __u32 nent;
176 __u32 padding;
177 struct kvm_cpuid_entry entries[0];
180 struct kvm_cpuid_entry2 {
181 __u32 function;
182 __u32 index;
183 __u32 flags;
184 __u32 eax;
185 __u32 ebx;
186 __u32 ecx;
187 __u32 edx;
188 __u32 padding[3];
191 #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX 1
192 #define KVM_CPUID_FLAG_STATEFUL_FUNC 2
193 #define KVM_CPUID_FLAG_STATE_READ_NEXT 4
195 /* for KVM_SET_CPUID2 */
196 struct kvm_cpuid2 {
197 __u32 nent;
198 __u32 padding;
199 struct kvm_cpuid_entry2 entries[0];
202 /* for KVM_GET_PIT and KVM_SET_PIT */
203 struct kvm_pit_channel_state {
204 __u32 count; /* can be 65536 */
205 __u16 latched_count;
206 __u8 count_latched;
207 __u8 status_latched;
208 __u8 status;
209 __u8 read_state;
210 __u8 write_state;
211 __u8 write_latch;
212 __u8 rw_mode;
213 __u8 mode;
214 __u8 bcd;
215 __u8 gate;
216 __s64 count_load_time;
219 struct kvm_debug_exit_arch {
220 __u32 exception;
221 __u32 pad;
222 __u64 pc;
223 __u64 dr6;
224 __u64 dr7;
227 #define KVM_GUESTDBG_USE_SW_BP 0x00010000
228 #define KVM_GUESTDBG_USE_HW_BP 0x00020000
229 #define KVM_GUESTDBG_INJECT_DB 0x00040000
230 #define KVM_GUESTDBG_INJECT_BP 0x00080000
232 /* for KVM_SET_GUEST_DEBUG */
233 struct kvm_guest_debug_arch {
234 __u64 debugreg[8];
237 struct kvm_pit_state {
238 struct kvm_pit_channel_state channels[3];
241 #define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001
243 struct kvm_pit_state2 {
244 struct kvm_pit_channel_state channels[3];
245 __u32 flags;
246 __u32 reserved[9];
249 struct kvm_reinject_control {
250 __u8 pit_reinject;
251 __u8 reserved[31];
253 #endif /* _ASM_X86_KVM_H */