drivers/spi/spi-cavium-thunderx.c

   1 /*
   2  * Cavium ThunderX SPI driver.
   3  *
   4  * Copyright (C) 2016 Cavium Inc.
   5  * Authors: Jan Glauber <jglauber@cavium.com>
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/pci.h>
  10 #include <linux/spi/spi.h>
  11
  12 #include "spi-cavium.h"
  13
  14 #define DRV_NAME "spi-thunderx"
  15
  16 #define SYS_FREQ_DEFAULT 700000000 /* 700 Mhz */
  17
  18 static int thunderx_spi_probe(struct pci_dev *pdev,
  19                               const struct pci_device_id *ent)
  20 {
  21         struct device *dev = &pdev->dev;
  22         struct spi_master *master;
  23         struct octeon_spi *p;
  24         int ret;
  25
  26         master = spi_alloc_master(dev, sizeof(struct octeon_spi));
  27         if (!master)
  28                 return -ENOMEM;
  29
  30         p = spi_master_get_devdata(master);
  31
  32         ret = pcim_enable_device(pdev);
  33         if (ret)
  34                 goto error;
  35
  36         ret = pci_request_regions(pdev, DRV_NAME);
  37         if (ret)
  38                 goto error;
  39
  40         p->register_base = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0));
  41         if (!p->register_base) {
  42                 ret = -EINVAL;
  43                 goto error;
  44         }
  45
  46         p->regs.config = 0x1000;
  47         p->regs.status = 0x1008;
  48         p->regs.tx = 0x1010;
  49         p->regs.data = 0x1080;
  50
  51         p->clk = devm_clk_get(dev, NULL);
  52         if (IS_ERR(p->clk)) {
  53                 ret = PTR_ERR(p->clk);
  54                 goto error;
  55         }
  56
  57         ret = clk_prepare_enable(p->clk);
  58         if (ret)
  59                 goto error;
  60
  61         p->sys_freq = clk_get_rate(p->clk);
  62         if (!p->sys_freq)
  63                 p->sys_freq = SYS_FREQ_DEFAULT;
  64         dev_info(dev, "Set system clock to %u\n", p->sys_freq);
  65
  66         master->num_chipselect = 4;
  67         master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_CS_HIGH |
  68                             SPI_LSB_FIRST | SPI_3WIRE;
  69         master->transfer_one_message = octeon_spi_transfer_one_message;
  70         master->bits_per_word_mask = SPI_BPW_MASK(8);
  71         master->max_speed_hz = OCTEON_SPI_MAX_CLOCK_HZ;
  72         master->dev.of_node = pdev->dev.of_node;
  73
  74         pci_set_drvdata(pdev, master);
  75
  76         ret = devm_spi_register_master(dev, master);
  77         if (ret)
  78                 goto error;
  79
  80         return 0;
  81
  82 error:
  83         clk_disable_unprepare(p->clk);
  84         pci_release_regions(pdev);
  85         spi_master_put(master);
  86         return ret;
  87 }
  88
  89 static void thunderx_spi_remove(struct pci_dev *pdev)
  90 {
  91         struct spi_master *master = pci_get_drvdata(pdev);
  92         struct octeon_spi *p;
  93
  94         p = spi_master_get_devdata(master);
  95         if (!p)
  96                 return;
  97
  98         clk_disable_unprepare(p->clk);
  99         pci_release_regions(pdev);
 100         /* Put everything in a known state. */
 101         writeq(0, p->register_base + OCTEON_SPI_CFG(p));
 102 }
 103
 104 static const struct pci_device_id thunderx_spi_pci_id_table[] = {
 105         { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, 0xa00b) },
 106         { 0, }
 107 };
 108
 109 MODULE_DEVICE_TABLE(pci, thunderx_spi_pci_id_table);
 110
 111 static struct pci_driver thunderx_spi_driver = {
 112         .name           = DRV_NAME,
 113         .id_table       = thunderx_spi_pci_id_table,
 114         .probe          = thunderx_spi_probe,
 115         .remove         = thunderx_spi_remove,
 116 };
 117
 118 module_pci_driver(thunderx_spi_driver);
 119
 120 MODULE_DESCRIPTION("Cavium, Inc. ThunderX SPI bus driver");
 121 MODULE_AUTHOR("Jan Glauber");
 122 MODULE_LICENSE("GPL");