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[S390] kernel: Add z/VM LGR detection
[linux/fpc-iii.git] / arch / mn10300 / kernel / mn10300-serial.c
blob94901c56baf189551f3719dadac80c9219070687
1 /* MN10300 On-chip serial port UART driver
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12 static const char serial_name[] = "MN10300 Serial driver";
13 static const char serial_version[] = "mn10300_serial-1.0";
14 static const char serial_revdate[] = "2007-11-06";
15
16 #if defined(CONFIG_MN10300_TTYSM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
17 #define SUPPORT_SYSRQ
18 #endif
19
20 #include <linux/module.h>
21 #include <linux/serial.h>
22 #include <linux/circ_buf.h>
23 #include <linux/errno.h>
24 #include <linux/signal.h>
25 #include <linux/sched.h>
26 #include <linux/timer.h>
27 #include <linux/interrupt.h>
28 #include <linux/tty.h>
29 #include <linux/tty_flip.h>
30 #include <linux/major.h>
31 #include <linux/string.h>
32 #include <linux/ioport.h>
33 #include <linux/mm.h>
34 #include <linux/slab.h>
35 #include <linux/init.h>
36 #include <linux/console.h>
37 #include <linux/sysrq.h>
38
39 #include <asm/system.h>
40 #include <asm/io.h>
41 #include <asm/irq.h>
42 #include <asm/bitops.h>
43 #include <asm/serial-regs.h>
44 #include <unit/timex.h>
45 #include "mn10300-serial.h"
46
47 #ifdef CONFIG_SMP
48 #undef GxICR
49 #define GxICR(X) CROSS_GxICR(X, 0)
50 #endif /* CONFIG_SMP */
51
52 #define kenter(FMT, ...) \
53 printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
54 #define _enter(FMT, ...) \
55 no_printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
56 #define kdebug(FMT, ...) \
57 printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
58 #define _debug(FMT, ...) \
59 no_printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
60 #define kproto(FMT, ...) \
61 printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
62 #define _proto(FMT, ...) \
63 no_printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
64
65 #ifndef CODMSB
66 /* c_cflag bit meaning */
67 #define CODMSB 004000000000 /* change Transfer bit-order */
68 #endif
69
70 #define NR_UARTS 3
71
72 #ifdef CONFIG_MN10300_TTYSM_CONSOLE
73 static void mn10300_serial_console_write(struct console *co,
74 const char *s, unsigned count);
75 static int __init mn10300_serial_console_setup(struct console *co,
76 char *options);
77
78 static struct uart_driver mn10300_serial_driver;
79 static struct console mn10300_serial_console = {
80 .name = "ttySM",
81 .write = mn10300_serial_console_write,
82 .device = uart_console_device,
83 .setup = mn10300_serial_console_setup,
84 .flags = CON_PRINTBUFFER,
85 .index = -1,
86 .data = &mn10300_serial_driver,
87 };
88 #endif
89
90 static struct uart_driver mn10300_serial_driver = {
91 .owner = NULL,
92 .driver_name = "mn10300-serial",
93 .dev_name = "ttySM",
94 .major = TTY_MAJOR,
95 .minor = 128,
96 .nr = NR_UARTS,
97 #ifdef CONFIG_MN10300_TTYSM_CONSOLE
98 .cons = &mn10300_serial_console,
99 #endif
100 };
101
102 static unsigned int mn10300_serial_tx_empty(struct uart_port *);
103 static void mn10300_serial_set_mctrl(struct uart_port *, unsigned int mctrl);
104 static unsigned int mn10300_serial_get_mctrl(struct uart_port *);
105 static void mn10300_serial_stop_tx(struct uart_port *);
106 static void mn10300_serial_start_tx(struct uart_port *);
107 static void mn10300_serial_send_xchar(struct uart_port *, char ch);
108 static void mn10300_serial_stop_rx(struct uart_port *);
109 static void mn10300_serial_enable_ms(struct uart_port *);
110 static void mn10300_serial_break_ctl(struct uart_port *, int ctl);
111 static int mn10300_serial_startup(struct uart_port *);
112 static void mn10300_serial_shutdown(struct uart_port *);
113 static void mn10300_serial_set_termios(struct uart_port *,
114 struct ktermios *new,
115 struct ktermios *old);
116 static const char *mn10300_serial_type(struct uart_port *);
117 static void mn10300_serial_release_port(struct uart_port *);
118 static int mn10300_serial_request_port(struct uart_port *);
119 static void mn10300_serial_config_port(struct uart_port *, int);
120 static int mn10300_serial_verify_port(struct uart_port *,
121 struct serial_struct *);
122 #ifdef CONFIG_CONSOLE_POLL
123 static void mn10300_serial_poll_put_char(struct uart_port *, unsigned char);
124 static int mn10300_serial_poll_get_char(struct uart_port *);
125 #endif
126
127 static const struct uart_ops mn10300_serial_ops = {
128 .tx_empty = mn10300_serial_tx_empty,
129 .set_mctrl = mn10300_serial_set_mctrl,
130 .get_mctrl = mn10300_serial_get_mctrl,
131 .stop_tx = mn10300_serial_stop_tx,
132 .start_tx = mn10300_serial_start_tx,
133 .send_xchar = mn10300_serial_send_xchar,
134 .stop_rx = mn10300_serial_stop_rx,
135 .enable_ms = mn10300_serial_enable_ms,
136 .break_ctl = mn10300_serial_break_ctl,
137 .startup = mn10300_serial_startup,
138 .shutdown = mn10300_serial_shutdown,
139 .set_termios = mn10300_serial_set_termios,
140 .type = mn10300_serial_type,
141 .release_port = mn10300_serial_release_port,
142 .request_port = mn10300_serial_request_port,
143 .config_port = mn10300_serial_config_port,
144 .verify_port = mn10300_serial_verify_port,
145 #ifdef CONFIG_CONSOLE_POLL
146 .poll_put_char = mn10300_serial_poll_put_char,
147 .poll_get_char = mn10300_serial_poll_get_char,
148 #endif
149 };
150
151 static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id);
152
153 /*
154 * the first on-chip serial port: ttySM0 (aka SIF0)
155 */
156 #ifdef CONFIG_MN10300_TTYSM0
157 struct mn10300_serial_port mn10300_serial_port_sif0 = {
158 .uart.ops = &mn10300_serial_ops,
159 .uart.membase = (void __iomem *) &SC0CTR,
160 .uart.mapbase = (unsigned long) &SC0CTR,
161 .uart.iotype = UPIO_MEM,
162 .uart.irq = 0,
163 .uart.uartclk = 0, /* MN10300_IOCLK, */
164 .uart.fifosize = 1,
165 .uart.flags = UPF_BOOT_AUTOCONF,
166 .uart.line = 0,
167 .uart.type = PORT_MN10300,
168 .uart.lock =
169 __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif0.uart.lock),
170 .name = "ttySM0",
171 ._iobase = &SC0CTR,
172 ._control = &SC0CTR,
173 ._status = (volatile u8 *)&SC0STR,
174 ._intr = &SC0ICR,
175 ._rxb = &SC0RXB,
176 ._txb = &SC0TXB,
177 .rx_name = "ttySM0:Rx",
178 .tx_name = "ttySM0:Tx",
179 #if defined(CONFIG_MN10300_TTYSM0_TIMER8)
180 .tm_name = "ttySM0:Timer8",
181 ._tmxmd = &TM8MD,
182 ._tmxbr = &TM8BR,
183 ._tmicr = &TM8ICR,
184 .tm_irq = TM8IRQ,
185 .div_timer = MNSCx_DIV_TIMER_16BIT,
186 #elif defined(CONFIG_MN10300_TTYSM0_TIMER0)
187 .tm_name = "ttySM0:Timer0",
188 ._tmxmd = &TM0MD,
189 ._tmxbr = (volatile u16 *)&TM0BR,
190 ._tmicr = &TM0ICR,
191 .tm_irq = TM0IRQ,
192 .div_timer = MNSCx_DIV_TIMER_8BIT,
193 #elif defined(CONFIG_MN10300_TTYSM0_TIMER2)
194 .tm_name = "ttySM0:Timer2",
195 ._tmxmd = &TM2MD,
196 ._tmxbr = (volatile u16 *)&TM2BR,
197 ._tmicr = &TM2ICR,
198 .tm_irq = TM2IRQ,
199 .div_timer = MNSCx_DIV_TIMER_8BIT,
200 #else
201 #error "Unknown config for ttySM0"
202 #endif
203 .rx_irq = SC0RXIRQ,
204 .tx_irq = SC0TXIRQ,
205 .rx_icr = &GxICR(SC0RXIRQ),
206 .tx_icr = &GxICR(SC0TXIRQ),
207 .clock_src = MNSCx_CLOCK_SRC_IOCLK,
208 .options = 0,
209 #ifdef CONFIG_GDBSTUB_ON_TTYSM0
210 .gdbstub = 1,
211 #endif
212 };
213 #endif /* CONFIG_MN10300_TTYSM0 */
214
215 /*
216 * the second on-chip serial port: ttySM1 (aka SIF1)
217 */
218 #ifdef CONFIG_MN10300_TTYSM1
219 struct mn10300_serial_port mn10300_serial_port_sif1 = {
220 .uart.ops = &mn10300_serial_ops,
221 .uart.membase = (void __iomem *) &SC1CTR,
222 .uart.mapbase = (unsigned long) &SC1CTR,
223 .uart.iotype = UPIO_MEM,
224 .uart.irq = 0,
225 .uart.uartclk = 0, /* MN10300_IOCLK, */
226 .uart.fifosize = 1,
227 .uart.flags = UPF_BOOT_AUTOCONF,
228 .uart.line = 1,
229 .uart.type = PORT_MN10300,
230 .uart.lock =
231 __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif1.uart.lock),
232 .name = "ttySM1",
233 ._iobase = &SC1CTR,
234 ._control = &SC1CTR,
235 ._status = (volatile u8 *)&SC1STR,
236 ._intr = &SC1ICR,
237 ._rxb = &SC1RXB,
238 ._txb = &SC1TXB,
239 .rx_name = "ttySM1:Rx",
240 .tx_name = "ttySM1:Tx",
241 #if defined(CONFIG_MN10300_TTYSM1_TIMER9)
242 .tm_name = "ttySM1:Timer9",
243 ._tmxmd = &TM9MD,
244 ._tmxbr = &TM9BR,
245 ._tmicr = &TM9ICR,
246 .tm_irq = TM9IRQ,
247 .div_timer = MNSCx_DIV_TIMER_16BIT,
248 #elif defined(CONFIG_MN10300_TTYSM1_TIMER3)
249 .tm_name = "ttySM1:Timer3",
250 ._tmxmd = &TM3MD,
251 ._tmxbr = (volatile u16 *)&TM3BR,
252 ._tmicr = &TM3ICR,
253 .tm_irq = TM3IRQ,
254 .div_timer = MNSCx_DIV_TIMER_8BIT,
255 #elif defined(CONFIG_MN10300_TTYSM1_TIMER12)
256 .tm_name = "ttySM1/Timer12",
257 ._tmxmd = &TM12MD,
258 ._tmxbr = &TM12BR,
259 ._tmicr = &TM12ICR,
260 .tm_irq = TM12IRQ,
261 .div_timer = MNSCx_DIV_TIMER_16BIT,
262 #else
263 #error "Unknown config for ttySM1"
264 #endif
265 .rx_irq = SC1RXIRQ,
266 .tx_irq = SC1TXIRQ,
267 .rx_icr = &GxICR(SC1RXIRQ),
268 .tx_icr = &GxICR(SC1TXIRQ),
269 .clock_src = MNSCx_CLOCK_SRC_IOCLK,
270 .options = 0,
271 #ifdef CONFIG_GDBSTUB_ON_TTYSM1
272 .gdbstub = 1,
273 #endif
274 };
275 #endif /* CONFIG_MN10300_TTYSM1 */
276
277 /*
278 * the third on-chip serial port: ttySM2 (aka SIF2)
279 */
280 #ifdef CONFIG_MN10300_TTYSM2
281 struct mn10300_serial_port mn10300_serial_port_sif2 = {
282 .uart.ops = &mn10300_serial_ops,
283 .uart.membase = (void __iomem *) &SC2CTR,
284 .uart.mapbase = (unsigned long) &SC2CTR,
285 .uart.iotype = UPIO_MEM,
286 .uart.irq = 0,
287 .uart.uartclk = 0, /* MN10300_IOCLK, */
288 .uart.fifosize = 1,
289 .uart.flags = UPF_BOOT_AUTOCONF,
290 .uart.line = 2,
291 #ifdef CONFIG_MN10300_TTYSM2_CTS
292 .uart.type = PORT_MN10300_CTS,
293 #else
294 .uart.type = PORT_MN10300,
295 #endif
296 .uart.lock =
297 __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif2.uart.lock),
298 .name = "ttySM2",
299 ._iobase = &SC2CTR,
300 ._control = &SC2CTR,
301 ._status = (volatile u8 *)&SC2STR,
302 ._intr = &SC2ICR,
303 ._rxb = &SC2RXB,
304 ._txb = &SC2TXB,
305 .rx_name = "ttySM2:Rx",
306 .tx_name = "ttySM2:Tx",
307 #if defined(CONFIG_MN10300_TTYSM2_TIMER10)
308 .tm_name = "ttySM2/Timer10",
309 ._tmxmd = &TM10MD,
310 ._tmxbr = &TM10BR,
311 ._tmicr = &TM10ICR,
312 .tm_irq = TM10IRQ,
313 .div_timer = MNSCx_DIV_TIMER_16BIT,
314 #elif defined(CONFIG_MN10300_TTYSM2_TIMER9)
315 .tm_name = "ttySM2/Timer9",
316 ._tmxmd = &TM9MD,
317 ._tmxbr = &TM9BR,
318 ._tmicr = &TM9ICR,
319 .tm_irq = TM9IRQ,
320 .div_timer = MNSCx_DIV_TIMER_16BIT,
321 #elif defined(CONFIG_MN10300_TTYSM2_TIMER1)
322 .tm_name = "ttySM2/Timer1",
323 ._tmxmd = &TM1MD,
324 ._tmxbr = (volatile u16 *)&TM1BR,
325 ._tmicr = &TM1ICR,
326 .tm_irq = TM1IRQ,
327 .div_timer = MNSCx_DIV_TIMER_8BIT,
328 #elif defined(CONFIG_MN10300_TTYSM2_TIMER3)
329 .tm_name = "ttySM2/Timer3",
330 ._tmxmd = &TM3MD,
331 ._tmxbr = (volatile u16 *)&TM3BR,
332 ._tmicr = &TM3ICR,
333 .tm_irq = TM3IRQ,
334 .div_timer = MNSCx_DIV_TIMER_8BIT,
335 #else
336 #error "Unknown config for ttySM2"
337 #endif
338 .rx_irq = SC2RXIRQ,
339 .tx_irq = SC2TXIRQ,
340 .rx_icr = &GxICR(SC2RXIRQ),
341 .tx_icr = &GxICR(SC2TXIRQ),
342 .clock_src = MNSCx_CLOCK_SRC_IOCLK,
343 #ifdef CONFIG_MN10300_TTYSM2_CTS
344 .options = MNSCx_OPT_CTS,
345 #else
346 .options = 0,
347 #endif
348 #ifdef CONFIG_GDBSTUB_ON_TTYSM2
349 .gdbstub = 1,
350 #endif
351 };
352 #endif /* CONFIG_MN10300_TTYSM2 */
353
354
355 /*
356 * list of available serial ports
357 */
358 struct mn10300_serial_port *mn10300_serial_ports[NR_UARTS + 1] = {
359 #ifdef CONFIG_MN10300_TTYSM0
360 [0] = &mn10300_serial_port_sif0,
361 #endif
362 #ifdef CONFIG_MN10300_TTYSM1
363 [1] = &mn10300_serial_port_sif1,
364 #endif
365 #ifdef CONFIG_MN10300_TTYSM2
366 [2] = &mn10300_serial_port_sif2,
367 #endif
368 [NR_UARTS] = NULL,
369 };
370
371
372 /*
373 * we abuse the serial ports' baud timers' interrupt lines to get the ability
374 * to deliver interrupts to userspace as we use the ports' interrupt lines to
375 * do virtual DMA on account of the ports having no hardware FIFOs
376 *
377 * we can generate an interrupt manually in the assembly stubs by writing to
378 * the enable and detect bits in the interrupt control register, so all we need
379 * to do here is disable the interrupt line
380 *
381 * note that we can't just leave the line enabled as the baud rate timer *also*
382 * generates interrupts
383 */
384 static void mn10300_serial_mask_ack(unsigned int irq)
385 {
386 unsigned long flags;
387 u16 tmp;
388
389 flags = arch_local_cli_save();
390 GxICR(irq) = GxICR_LEVEL_6;
391 tmp = GxICR(irq); /* flush write buffer */
392 arch_local_irq_restore(flags);
393 }
394
395 static void mn10300_serial_chip_mask_ack(struct irq_data *d)
396 {
397 mn10300_serial_mask_ack(d->irq);
398 }
399
400 static void mn10300_serial_nop(struct irq_data *d)
401 {
402 }
403
404 static struct irq_chip mn10300_serial_pic = {
405 .name = "mnserial",
406 .irq_ack = mn10300_serial_chip_mask_ack,
407 .irq_mask = mn10300_serial_chip_mask_ack,
408 .irq_mask_ack = mn10300_serial_chip_mask_ack,
409 .irq_unmask = mn10300_serial_nop,
410 };
411
412
413 /*
414 * serial virtual DMA interrupt jump table
415 */
416 struct mn10300_serial_int mn10300_serial_int_tbl[NR_IRQS];
417
418 static void mn10300_serial_dis_tx_intr(struct mn10300_serial_port *port)
419 {
420 unsigned long flags;
421 u16 x;
422
423 flags = arch_local_cli_save();
424 *port->tx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
425 x = *port->tx_icr;
426 arch_local_irq_restore(flags);
427 }
428
429 static void mn10300_serial_en_tx_intr(struct mn10300_serial_port *port)
430 {
431 unsigned long flags;
432 u16 x;
433
434 flags = arch_local_cli_save();
435 *port->tx_icr =
436 NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL) | GxICR_ENABLE;
437 x = *port->tx_icr;
438 arch_local_irq_restore(flags);
439 }
440
441 static void mn10300_serial_dis_rx_intr(struct mn10300_serial_port *port)
442 {
443 unsigned long flags;
444 u16 x;
445
446 flags = arch_local_cli_save();
447 *port->rx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
448 x = *port->rx_icr;
449 arch_local_irq_restore(flags);
450 }
451
452 /*
453 * multi-bit equivalent of test_and_clear_bit()
454 */
455 static int mask_test_and_clear(volatile u8 *ptr, u8 mask)
456 {
457 u32 epsw;
458 asm volatile(" bclr %1,(%2) \n"
459 " mov epsw,%0 \n"
460 : "=d"(epsw) : "d"(mask), "a"(ptr)
461 : "cc", "memory");
462 return !(epsw & EPSW_FLAG_Z);
463 }
464
465 /*
466 * receive chars from the ring buffer for this serial port
467 * - must do break detection here (not done in the UART)
468 */
469 static void mn10300_serial_receive_interrupt(struct mn10300_serial_port *port)
470 {
471 struct uart_icount *icount = &port->uart.icount;
472 struct tty_struct *tty = port->uart.state->port.tty;
473 unsigned ix;
474 int count;
475 u8 st, ch, push, status, overrun;
476
477 _enter("%s", port->name);
478
479 push = 0;
480
481 count = CIRC_CNT(port->rx_inp, port->rx_outp, MNSC_BUFFER_SIZE);
482 count = tty_buffer_request_room(tty, count);
483 if (count == 0) {
484 if (!tty->low_latency)
485 tty_flip_buffer_push(tty);
486 return;
487 }
488
489 try_again:
490 /* pull chars out of the hat */
491 ix = port->rx_outp;
492 if (ix == port->rx_inp) {
493 if (push && !tty->low_latency)
494 tty_flip_buffer_push(tty);
495 return;
496 }
497
498 ch = port->rx_buffer[ix++];
499 st = port->rx_buffer[ix++];
500 smp_rmb();
501 port->rx_outp = ix & (MNSC_BUFFER_SIZE - 1);
502 port->uart.icount.rx++;
503
504 st &= SC01STR_FEF | SC01STR_PEF | SC01STR_OEF;
505 status = 0;
506 overrun = 0;
507
508 /* the UART doesn't detect BREAK, so we have to do that ourselves
509 * - it starts as a framing error on a NUL character
510 * - then we count another two NUL characters before issuing TTY_BREAK
511 * - then we end on a normal char or one that has all the bottom bits
512 * zero and the top bits set
513 */
514 switch (port->rx_brk) {
515 case 0:
516 /* not breaking at the moment */
517 break;
518
519 case 1:
520 if (st & SC01STR_FEF && ch == 0) {
521 port->rx_brk = 2;
522 goto try_again;
523 }
524 goto not_break;
525
526 case 2:
527 if (st & SC01STR_FEF && ch == 0) {
528 port->rx_brk = 3;
529 _proto("Rx Break Detected");
530 icount->brk++;
531 if (uart_handle_break(&port->uart))
532 goto ignore_char;
533 status |= 1 << TTY_BREAK;
534 goto insert;
535 }
536 goto not_break;
537
538 default:
539 if (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF))
540 goto try_again; /* still breaking */
541
542 port->rx_brk = 0; /* end of the break */
543
544 switch (ch) {
545 case 0xFF:
546 case 0xFE:
547 case 0xFC:
548 case 0xF8:
549 case 0xF0:
550 case 0xE0:
551 case 0xC0:
552 case 0x80:
553 case 0x00:
554 /* discard char at probable break end */
555 goto try_again;
556 }
557 break;
558 }
559
560 process_errors:
561 /* handle framing error */
562 if (st & SC01STR_FEF) {
563 if (ch == 0) {
564 /* framing error with NUL char is probably a BREAK */
565 port->rx_brk = 1;
566 goto try_again;
567 }
568
569 _proto("Rx Framing Error");
570 icount->frame++;
571 status |= 1 << TTY_FRAME;
572 }
573
574 /* handle parity error */
575 if (st & SC01STR_PEF) {
576 _proto("Rx Parity Error");
577 icount->parity++;
578 status = TTY_PARITY;
579 }
580
581 /* handle normal char */
582 if (status == 0) {
583 if (uart_handle_sysrq_char(&port->uart, ch))
584 goto ignore_char;
585 status = (1 << TTY_NORMAL);
586 }
587
588 /* handle overrun error */
589 if (st & SC01STR_OEF) {
590 if (port->rx_brk)
591 goto try_again;
592
593 _proto("Rx Overrun Error");
594 icount->overrun++;
595 overrun = 1;
596 }
597
598 insert:
599 status &= port->uart.read_status_mask;
600
601 if (!overrun && !(status & port->uart.ignore_status_mask)) {
602 int flag;
603
604 if (status & (1 << TTY_BREAK))
605 flag = TTY_BREAK;
606 else if (status & (1 << TTY_PARITY))
607 flag = TTY_PARITY;
608 else if (status & (1 << TTY_FRAME))
609 flag = TTY_FRAME;
610 else
611 flag = TTY_NORMAL;
612
613 tty_insert_flip_char(tty, ch, flag);
614 }
615
616 /* overrun is special, since it's reported immediately, and doesn't
617 * affect the current character
618 */
619 if (overrun)
620 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
621
622 count--;
623 if (count <= 0) {
624 if (!tty->low_latency)
625 tty_flip_buffer_push(tty);
626 return;
627 }
628
629 ignore_char:
630 push = 1;
631 goto try_again;
632
633 not_break:
634 port->rx_brk = 0;
635 goto process_errors;
636 }
637
638 /*
639 * handle an interrupt from the serial transmission "virtual DMA" driver
640 * - note: the interrupt routine will disable its own interrupts when the Tx
641 * buffer is empty
642 */
643 static void mn10300_serial_transmit_interrupt(struct mn10300_serial_port *port)
644 {
645 _enter("%s", port->name);
646
647 if (!port->uart.state || !port->uart.state->port.tty) {
648 mn10300_serial_dis_tx_intr(port);
649 return;
650 }
651
652 if (uart_tx_stopped(&port->uart) ||
653 uart_circ_empty(&port->uart.state->xmit))
654 mn10300_serial_dis_tx_intr(port);
655
656 if (uart_circ_chars_pending(&port->uart.state->xmit) < WAKEUP_CHARS)
657 uart_write_wakeup(&port->uart);
658 }
659
660 /*
661 * deal with a change in the status of the CTS line
662 */
663 static void mn10300_serial_cts_changed(struct mn10300_serial_port *port, u8 st)
664 {
665 u16 ctr;
666
667 port->tx_cts = st;
668 port->uart.icount.cts++;
669
670 /* flip the CTS state selector flag to interrupt when it changes
671 * back */
672 ctr = *port->_control;
673 ctr ^= SC2CTR_TWS;
674 *port->_control = ctr;
675
676 uart_handle_cts_change(&port->uart, st & SC2STR_CTS);
677 wake_up_interruptible(&port->uart.state->port.delta_msr_wait);
678 }
679
680 /*
681 * handle a virtual interrupt generated by the lower level "virtual DMA"
682 * routines (irq is the baud timer interrupt)
683 */
684 static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id)
685 {
686 struct mn10300_serial_port *port = dev_id;
687 u8 st;
688
689 spin_lock(&port->uart.lock);
690
691 if (port->intr_flags) {
692 _debug("INT %s: %x", port->name, port->intr_flags);
693
694 if (mask_test_and_clear(&port->intr_flags, MNSCx_RX_AVAIL))
695 mn10300_serial_receive_interrupt(port);
696
697 if (mask_test_and_clear(&port->intr_flags,
698 MNSCx_TX_SPACE | MNSCx_TX_EMPTY))
699 mn10300_serial_transmit_interrupt(port);
700 }
701
702 /* the only modem control line amongst the whole lot is CTS on
703 * serial port 2 */
704 if (port->type == PORT_MN10300_CTS) {
705 st = *port->_status;
706 if ((port->tx_cts ^ st) & SC2STR_CTS)
707 mn10300_serial_cts_changed(port, st);
708 }
709
710 spin_unlock(&port->uart.lock);
711
712 return IRQ_HANDLED;
713 }
714
715 /*
716 * return indication of whether the hardware transmit buffer is empty
717 */
718 static unsigned int mn10300_serial_tx_empty(struct uart_port *_port)
719 {
720 struct mn10300_serial_port *port =
721 container_of(_port, struct mn10300_serial_port, uart);
722
723 _enter("%s", port->name);
724
725 return (*port->_status & (SC01STR_TXF | SC01STR_TBF)) ?
726 0 : TIOCSER_TEMT;
727 }
728
729 /*
730 * set the modem control lines (we don't have any)
731 */
732 static void mn10300_serial_set_mctrl(struct uart_port *_port,
733 unsigned int mctrl)
734 {
735 struct mn10300_serial_port *port __attribute__ ((unused)) =
736 container_of(_port, struct mn10300_serial_port, uart);
737
738 _enter("%s,%x", port->name, mctrl);
739 }
740
741 /*
742 * get the modem control line statuses
743 */
744 static unsigned int mn10300_serial_get_mctrl(struct uart_port *_port)
745 {
746 struct mn10300_serial_port *port =
747 container_of(_port, struct mn10300_serial_port, uart);
748
749 _enter("%s", port->name);
750
751 if (port->type == PORT_MN10300_CTS && !(*port->_status & SC2STR_CTS))
752 return TIOCM_CAR | TIOCM_DSR;
753
754 return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR;
755 }
756
757 /*
758 * stop transmitting characters
759 */
760 static void mn10300_serial_stop_tx(struct uart_port *_port)
761 {
762 struct mn10300_serial_port *port =
763 container_of(_port, struct mn10300_serial_port, uart);
764
765 _enter("%s", port->name);
766
767 /* disable the virtual DMA */
768 mn10300_serial_dis_tx_intr(port);
769 }
770
771 /*
772 * start transmitting characters
773 * - jump-start transmission if it has stalled
774 * - enable the serial Tx interrupt (used by the virtual DMA controller)
775 * - force an interrupt to happen if necessary
776 */
777 static void mn10300_serial_start_tx(struct uart_port *_port)
778 {
779 struct mn10300_serial_port *port =
780 container_of(_port, struct mn10300_serial_port, uart);
781
782 u16 x;
783
784 _enter("%s{%lu}",
785 port->name,
786 CIRC_CNT(&port->uart.state->xmit.head,
787 &port->uart.state->xmit.tail,
788 UART_XMIT_SIZE));
789
790 /* kick the virtual DMA controller */
791 arch_local_cli();
792 x = *port->tx_icr;
793 x |= GxICR_ENABLE;
794
795 if (*port->_status & SC01STR_TBF)
796 x &= ~(GxICR_REQUEST | GxICR_DETECT);
797 else
798 x |= GxICR_REQUEST | GxICR_DETECT;
799
800 _debug("CTR=%04hx ICR=%02hx STR=%04x TMD=%02hx TBR=%04hx ICR=%04hx",
801 *port->_control, *port->_intr, *port->_status,
802 *port->_tmxmd,
803 (port->div_timer == MNSCx_DIV_TIMER_8BIT) ?
804 *(volatile u8 *)port->_tmxbr : *port->_tmxbr,
805 *port->tx_icr);
806
807 *port->tx_icr = x;
808 x = *port->tx_icr;
809 arch_local_sti();
810 }
811
812 /*
813 * transmit a high-priority XON/XOFF character
814 */
815 static void mn10300_serial_send_xchar(struct uart_port *_port, char ch)
816 {
817 struct mn10300_serial_port *port =
818 container_of(_port, struct mn10300_serial_port, uart);
819
820 _enter("%s,%02x", port->name, ch);
821
822 if (likely(port->gdbstub)) {
823 port->tx_xchar = ch;
824 if (ch)
825 mn10300_serial_en_tx_intr(port);
826 }
827 }
828
829 /*
830 * stop receiving characters
831 * - called whilst the port is being closed
832 */
833 static void mn10300_serial_stop_rx(struct uart_port *_port)
834 {
835 struct mn10300_serial_port *port =
836 container_of(_port, struct mn10300_serial_port, uart);
837
838 u16 ctr;
839
840 _enter("%s", port->name);
841
842 ctr = *port->_control;
843 ctr &= ~SC01CTR_RXE;
844 *port->_control = ctr;
845
846 mn10300_serial_dis_rx_intr(port);
847 }
848
849 /*
850 * enable modem status interrupts
851 */
852 static void mn10300_serial_enable_ms(struct uart_port *_port)
853 {
854 struct mn10300_serial_port *port =
855 container_of(_port, struct mn10300_serial_port, uart);
856
857 u16 ctr, cts;
858
859 _enter("%s", port->name);
860
861 if (port->type == PORT_MN10300_CTS) {
862 /* want to interrupt when CTS goes low if CTS is now high and
863 * vice versa
864 */
865 port->tx_cts = *port->_status;
866
867 cts = (port->tx_cts & SC2STR_CTS) ?
868 SC2CTR_TWE : SC2CTR_TWE | SC2CTR_TWS;
869
870 ctr = *port->_control;
871 ctr &= ~SC2CTR_TWS;
872 ctr |= cts;
873 *port->_control = ctr;
874
875 mn10300_serial_en_tx_intr(port);
876 }
877 }
878
879 /*
880 * transmit or cease transmitting a break signal
881 */
882 static void mn10300_serial_break_ctl(struct uart_port *_port, int ctl)
883 {
884 struct mn10300_serial_port *port =
885 container_of(_port, struct mn10300_serial_port, uart);
886
887 _enter("%s,%d", port->name, ctl);
888
889 if (ctl) {
890 /* tell the virtual DMA handler to assert BREAK */
891 port->tx_break = 1;
892 mn10300_serial_en_tx_intr(port);
893 } else {
894 port->tx_break = 0;
895 *port->_control &= ~SC01CTR_BKE;
896 mn10300_serial_en_tx_intr(port);
897 }
898 }
899
900 /*
901 * grab the interrupts and enable the port for reception
902 */
903 static int mn10300_serial_startup(struct uart_port *_port)
904 {
905 struct mn10300_serial_port *port =
906 container_of(_port, struct mn10300_serial_port, uart);
907 struct mn10300_serial_int *pint;
908
909 _enter("%s{%d}", port->name, port->gdbstub);
910
911 if (unlikely(port->gdbstub))
912 return -EBUSY;
913
914 /* allocate an Rx buffer for the virtual DMA handler */
915 port->rx_buffer = kmalloc(MNSC_BUFFER_SIZE, GFP_KERNEL);
916 if (!port->rx_buffer)
917 return -ENOMEM;
918
919 port->rx_inp = port->rx_outp = 0;
920
921 /* finally, enable the device */
922 *port->_intr = SC01ICR_TI;
923 *port->_control |= SC01CTR_TXE | SC01CTR_RXE;
924
925 pint = &mn10300_serial_int_tbl[port->rx_irq];
926 pint->port = port;
927 pint->vdma = mn10300_serial_vdma_rx_handler;
928 pint = &mn10300_serial_int_tbl[port->tx_irq];
929 pint->port = port;
930 pint->vdma = mn10300_serial_vdma_tx_handler;
931
932 set_intr_level(port->rx_irq,
933 NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL));
934 set_intr_level(port->tx_irq,
935 NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL));
936 irq_set_chip(port->tm_irq, &mn10300_serial_pic);
937
938 if (request_irq(port->rx_irq, mn10300_serial_interrupt,
939 IRQF_DISABLED, port->rx_name, port) < 0)
940 goto error;
941
942 if (request_irq(port->tx_irq, mn10300_serial_interrupt,
943 IRQF_DISABLED, port->tx_name, port) < 0)
944 goto error2;
945
946 if (request_irq(port->tm_irq, mn10300_serial_interrupt,
947 IRQF_DISABLED, port->tm_name, port) < 0)
948 goto error3;
949 mn10300_serial_mask_ack(port->tm_irq);
950
951 return 0;
952
953 error3:
954 free_irq(port->tx_irq, port);
955 error2:
956 free_irq(port->rx_irq, port);
957 error:
958 kfree(port->rx_buffer);
959 port->rx_buffer = NULL;
960 return -EBUSY;
961 }
962
963 /*
964 * shutdown the port and release interrupts
965 */
966 static void mn10300_serial_shutdown(struct uart_port *_port)
967 {
968 u16 x;
969 struct mn10300_serial_port *port =
970 container_of(_port, struct mn10300_serial_port, uart);
971
972 _enter("%s", port->name);
973
974 /* disable the serial port and its baud rate timer */
975 port->tx_break = 0;
976 *port->_control &= ~(SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
977 *port->_tmxmd = 0;
978
979 if (port->rx_buffer) {
980 void *buf = port->rx_buffer;
981 port->rx_buffer = NULL;
982 kfree(buf);
983 }
984
985 /* disable all intrs */
986 free_irq(port->tm_irq, port);
987 free_irq(port->rx_irq, port);
988 free_irq(port->tx_irq, port);
989
990 arch_local_cli();
991 *port->rx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
992 x = *port->rx_icr;
993 *port->tx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
994 x = *port->tx_icr;
995 arch_local_sti();
996 }
997
998 /*
999 * this routine is called to set the UART divisor registers to match the
1000 * specified baud rate for a serial port.
1001 */
1002 static void mn10300_serial_change_speed(struct mn10300_serial_port *port,
1003 struct ktermios *new,
1004 struct ktermios *old)
1005 {
1006 unsigned long flags;
1007 unsigned long ioclk = port->ioclk;
1008 unsigned cflag;
1009 int baud, bits, xdiv, tmp;
1010 u16 tmxbr, scxctr;
1011 u8 tmxmd, battempt;
1012 u8 div_timer = port->div_timer;
1013
1014 _enter("%s{%lu}", port->name, ioclk);
1015
1016 /* byte size and parity */
1017 cflag = new->c_cflag;
1018 switch (cflag & CSIZE) {
1019 case CS7: scxctr = SC01CTR_CLN_7BIT; bits = 9; break;
1020 case CS8: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
1021 default: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
1022 }
1023
1024 if (cflag & CSTOPB) {
1025 scxctr |= SC01CTR_STB_2BIT;
1026 bits++;
1027 }
1028
1029 if (cflag & PARENB) {
1030 bits++;
1031 if (cflag & PARODD)
1032 scxctr |= SC01CTR_PB_ODD;
1033 #ifdef CMSPAR
1034 else if (cflag & CMSPAR)
1035 scxctr |= SC01CTR_PB_FIXED0;
1036 #endif
1037 else
1038 scxctr |= SC01CTR_PB_EVEN;
1039 }
1040
1041 /* Determine divisor based on baud rate */
1042 battempt = 0;
1043
1044 switch (port->uart.line) {
1045 #ifdef CONFIG_MN10300_TTYSM0
1046 case 0: /* ttySM0 */
1047 #if defined(CONFIG_MN10300_TTYSM0_TIMER8)
1048 scxctr |= SC0CTR_CK_TM8UFLOW_8;
1049 #elif defined(CONFIG_MN10300_TTYSM0_TIMER0)
1050 scxctr |= SC0CTR_CK_TM0UFLOW_8;
1051 #elif defined(CONFIG_MN10300_TTYSM0_TIMER2)
1052 scxctr |= SC0CTR_CK_TM2UFLOW_8;
1053 #else
1054 #error "Unknown config for ttySM0"
1055 #endif
1056 break;
1057 #endif /* CONFIG_MN10300_TTYSM0 */
1058
1059 #ifdef CONFIG_MN10300_TTYSM1
1060 case 1: /* ttySM1 */
1061 #if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3)
1062 #if defined(CONFIG_MN10300_TTYSM1_TIMER9)
1063 scxctr |= SC1CTR_CK_TM9UFLOW_8;
1064 #elif defined(CONFIG_MN10300_TTYSM1_TIMER3)
1065 scxctr |= SC1CTR_CK_TM3UFLOW_8;
1066 #else
1067 #error "Unknown config for ttySM1"
1068 #endif
1069 #else /* CONFIG_AM33_2 || CONFIG_AM33_3 */
1070 #if defined(CONFIG_MN10300_TTYSM1_TIMER12)
1071 scxctr |= SC1CTR_CK_TM12UFLOW_8;
1072 #else
1073 #error "Unknown config for ttySM1"
1074 #endif
1075 #endif /* CONFIG_AM33_2 || CONFIG_AM33_3 */
1076 break;
1077 #endif /* CONFIG_MN10300_TTYSM1 */
1078
1079 #ifdef CONFIG_MN10300_TTYSM2
1080 case 2: /* ttySM2 */
1081 #if defined(CONFIG_AM33_2)
1082 #if defined(CONFIG_MN10300_TTYSM2_TIMER10)
1083 scxctr |= SC2CTR_CK_TM10UFLOW;
1084 #else
1085 #error "Unknown config for ttySM2"
1086 #endif
1087 #else /* CONFIG_AM33_2 */
1088 #if defined(CONFIG_MN10300_TTYSM2_TIMER9)
1089 scxctr |= SC2CTR_CK_TM9UFLOW_8;
1090 #elif defined(CONFIG_MN10300_TTYSM2_TIMER1)
1091 scxctr |= SC2CTR_CK_TM1UFLOW_8;
1092 #elif defined(CONFIG_MN10300_TTYSM2_TIMER3)
1093 scxctr |= SC2CTR_CK_TM3UFLOW_8;
1094 #else
1095 #error "Unknown config for ttySM2"
1096 #endif
1097 #endif /* CONFIG_AM33_2 */
1098 break;
1099 #endif /* CONFIG_MN10300_TTYSM2 */
1100
1101 default:
1102 break;
1103 }
1104
1105 try_alternative:
1106 baud = uart_get_baud_rate(&port->uart, new, old, 0,
1107 port->ioclk / 8);
1108
1109 _debug("ALT %d [baud %d]", battempt, baud);
1110
1111 if (!baud)
1112 baud = 9600; /* B0 transition handled in rs_set_termios */
1113 xdiv = 1;
1114 if (baud == 134) {
1115 baud = 269; /* 134 is really 134.5 */
1116 xdiv = 2;
1117 }
1118
1119 if (baud == 38400 &&
1120 (port->uart.flags & UPF_SPD_MASK) == UPF_SPD_CUST
1121 ) {
1122 _debug("CUSTOM %u", port->uart.custom_divisor);
1123
1124 if (div_timer == MNSCx_DIV_TIMER_16BIT) {
1125 if (port->uart.custom_divisor <= 65535) {
1126 tmxmd = TM8MD_SRC_IOCLK;
1127 tmxbr = port->uart.custom_divisor;
1128 port->uart.uartclk = ioclk;
1129 goto timer_okay;
1130 }
1131 if (port->uart.custom_divisor / 8 <= 65535) {
1132 tmxmd = TM8MD_SRC_IOCLK_8;
1133 tmxbr = port->uart.custom_divisor / 8;
1134 port->uart.custom_divisor = tmxbr * 8;
1135 port->uart.uartclk = ioclk / 8;
1136 goto timer_okay;
1137 }
1138 if (port->uart.custom_divisor / 32 <= 65535) {
1139 tmxmd = TM8MD_SRC_IOCLK_32;
1140 tmxbr = port->uart.custom_divisor / 32;
1141 port->uart.custom_divisor = tmxbr * 32;
1142 port->uart.uartclk = ioclk / 32;
1143 goto timer_okay;
1144 }
1145
1146 } else if (div_timer == MNSCx_DIV_TIMER_8BIT) {
1147 if (port->uart.custom_divisor <= 255) {
1148 tmxmd = TM2MD_SRC_IOCLK;
1149 tmxbr = port->uart.custom_divisor;
1150 port->uart.uartclk = ioclk;
1151 goto timer_okay;
1152 }
1153 if (port->uart.custom_divisor / 8 <= 255) {
1154 tmxmd = TM2MD_SRC_IOCLK_8;
1155 tmxbr = port->uart.custom_divisor / 8;
1156 port->uart.custom_divisor = tmxbr * 8;
1157 port->uart.uartclk = ioclk / 8;
1158 goto timer_okay;
1159 }
1160 if (port->uart.custom_divisor / 32 <= 255) {
1161 tmxmd = TM2MD_SRC_IOCLK_32;
1162 tmxbr = port->uart.custom_divisor / 32;
1163 port->uart.custom_divisor = tmxbr * 32;
1164 port->uart.uartclk = ioclk / 32;
1165 goto timer_okay;
1166 }
1167 }
1168 }
1169
1170 switch (div_timer) {
1171 case MNSCx_DIV_TIMER_16BIT:
1172 port->uart.uartclk = ioclk;
1173 tmxmd = TM8MD_SRC_IOCLK;
1174 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
1175 if (tmp > 0 && tmp <= 65535)
1176 goto timer_okay;
1177
1178 port->uart.uartclk = ioclk / 8;
1179 tmxmd = TM8MD_SRC_IOCLK_8;
1180 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
1181 if (tmp > 0 && tmp <= 65535)
1182 goto timer_okay;
1183
1184 port->uart.uartclk = ioclk / 32;
1185 tmxmd = TM8MD_SRC_IOCLK_32;
1186 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
1187 if (tmp > 0 && tmp <= 65535)
1188 goto timer_okay;
1189 break;
1190
1191 case MNSCx_DIV_TIMER_8BIT:
1192 port->uart.uartclk = ioclk;
1193 tmxmd = TM2MD_SRC_IOCLK;
1194 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
1195 if (tmp > 0 && tmp <= 255)
1196 goto timer_okay;
1197
1198 port->uart.uartclk = ioclk / 8;
1199 tmxmd = TM2MD_SRC_IOCLK_8;
1200 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
1201 if (tmp > 0 && tmp <= 255)
1202 goto timer_okay;
1203
1204 port->uart.uartclk = ioclk / 32;
1205 tmxmd = TM2MD_SRC_IOCLK_32;
1206 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
1207 if (tmp > 0 && tmp <= 255)
1208 goto timer_okay;
1209 break;
1210
1211 default:
1212 BUG();
1213 return;
1214 }
1215
1216 /* refuse to change to a baud rate we can't support */
1217 _debug("CAN'T SUPPORT");
1218
1219 switch (battempt) {
1220 case 0:
1221 if (old) {
1222 new->c_cflag &= ~CBAUD;
1223 new->c_cflag |= (old->c_cflag & CBAUD);
1224 battempt = 1;
1225 goto try_alternative;
1226 }
1227
1228 case 1:
1229 /* as a last resort, if the quotient is zero, default to 9600
1230 * bps */
1231 new->c_cflag &= ~CBAUD;
1232 new->c_cflag |= B9600;
1233 battempt = 2;
1234 goto try_alternative;
1235
1236 default:
1237 /* hmmm... can't seem to support 9600 either
1238 * - we could try iterating through the speeds we know about to
1239 * find the lowest
1240 */
1241 new->c_cflag &= ~CBAUD;
1242 new->c_cflag |= B0;
1243
1244 if (div_timer == MNSCx_DIV_TIMER_16BIT)
1245 tmxmd = TM8MD_SRC_IOCLK_32;
1246 else if (div_timer == MNSCx_DIV_TIMER_8BIT)
1247 tmxmd = TM2MD_SRC_IOCLK_32;
1248 tmxbr = 1;
1249
1250 port->uart.uartclk = ioclk / 32;
1251 break;
1252 }
1253 timer_okay:
1254
1255 _debug("UARTCLK: %u / %hu", port->uart.uartclk, tmxbr);
1256
1257 /* make the changes */
1258 spin_lock_irqsave(&port->uart.lock, flags);
1259
1260 uart_update_timeout(&port->uart, new->c_cflag, baud);
1261
1262 /* set the timer to produce the required baud rate */
1263 switch (div_timer) {
1264 case MNSCx_DIV_TIMER_16BIT:
1265 *port->_tmxmd = 0;
1266 *port->_tmxbr = tmxbr;
1267 *port->_tmxmd = TM8MD_INIT_COUNTER;
1268 *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
1269 break;
1270
1271 case MNSCx_DIV_TIMER_8BIT:
1272 *port->_tmxmd = 0;
1273 *(volatile u8 *) port->_tmxbr = (u8) tmxbr;
1274 *port->_tmxmd = TM2MD_INIT_COUNTER;
1275 *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
1276 break;
1277 }
1278
1279 /* CTS flow control flag and modem status interrupts */
1280 scxctr &= ~(SC2CTR_TWE | SC2CTR_TWS);
1281
1282 if (port->type == PORT_MN10300_CTS && cflag & CRTSCTS) {
1283 /* want to interrupt when CTS goes low if CTS is now
1284 * high and vice versa
1285 */
1286 port->tx_cts = *port->_status;
1287
1288 if (port->tx_cts & SC2STR_CTS)
1289 scxctr |= SC2CTR_TWE;
1290 else
1291 scxctr |= SC2CTR_TWE | SC2CTR_TWS;
1292 }
1293
1294 /* set up parity check flag */
1295 port->uart.read_status_mask = (1 << TTY_NORMAL) | (1 << TTY_OVERRUN);
1296 if (new->c_iflag & INPCK)
1297 port->uart.read_status_mask |=
1298 (1 << TTY_PARITY) | (1 << TTY_FRAME);
1299 if (new->c_iflag & (BRKINT | PARMRK))
1300 port->uart.read_status_mask |= (1 << TTY_BREAK);
1301
1302 /* characters to ignore */
1303 port->uart.ignore_status_mask = 0;
1304 if (new->c_iflag & IGNPAR)
1305 port->uart.ignore_status_mask |=
1306 (1 << TTY_PARITY) | (1 << TTY_FRAME);
1307 if (new->c_iflag & IGNBRK) {
1308 port->uart.ignore_status_mask |= (1 << TTY_BREAK);
1309 /*
1310 * If we're ignoring parity and break indicators,
1311 * ignore overruns to (for real raw support).
1312 */
1313 if (new->c_iflag & IGNPAR)
1314 port->uart.ignore_status_mask |= (1 << TTY_OVERRUN);
1315 }
1316
1317 /* Ignore all characters if CREAD is not set */
1318 if ((new->c_cflag & CREAD) == 0)
1319 port->uart.ignore_status_mask |= (1 << TTY_NORMAL);
1320
1321 scxctr |= *port->_control & (SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
1322 *port->_control = scxctr;
1323
1324 spin_unlock_irqrestore(&port->uart.lock, flags);
1325 }
1326
1327 /*
1328 * set the terminal I/O parameters
1329 */
1330 static void mn10300_serial_set_termios(struct uart_port *_port,
1331 struct ktermios *new,
1332 struct ktermios *old)
1333 {
1334 struct mn10300_serial_port *port =
1335 container_of(_port, struct mn10300_serial_port, uart);
1336
1337 _enter("%s,%p,%p", port->name, new, old);
1338
1339 mn10300_serial_change_speed(port, new, old);
1340
1341 /* handle turning off CRTSCTS */
1342 if (!(new->c_cflag & CRTSCTS)) {
1343 u16 ctr = *port->_control;
1344 ctr &= ~SC2CTR_TWE;
1345 *port->_control = ctr;
1346 }
1347
1348 /* change Transfer bit-order (LSB/MSB) */
1349 if (new->c_cflag & CODMSB)
1350 *port->_control |= SC01CTR_OD_MSBFIRST; /* MSB MODE */
1351 else
1352 *port->_control &= ~SC01CTR_OD_MSBFIRST; /* LSB MODE */
1353 }
1354
1355 /*
1356 * return description of port type
1357 */
1358 static const char *mn10300_serial_type(struct uart_port *_port)
1359 {
1360 struct mn10300_serial_port *port =
1361 container_of(_port, struct mn10300_serial_port, uart);
1362
1363 if (port->uart.type == PORT_MN10300_CTS)
1364 return "MN10300 SIF_CTS";
1365
1366 return "MN10300 SIF";
1367 }
1368
1369 /*
1370 * release I/O and memory regions in use by port
1371 */
1372 static void mn10300_serial_release_port(struct uart_port *_port)
1373 {
1374 struct mn10300_serial_port *port =
1375 container_of(_port, struct mn10300_serial_port, uart);
1376
1377 _enter("%s", port->name);
1378
1379 release_mem_region((unsigned long) port->_iobase, 16);
1380 }
1381
1382 /*
1383 * request I/O and memory regions for port
1384 */
1385 static int mn10300_serial_request_port(struct uart_port *_port)
1386 {
1387 struct mn10300_serial_port *port =
1388 container_of(_port, struct mn10300_serial_port, uart);
1389
1390 _enter("%s", port->name);
1391
1392 request_mem_region((unsigned long) port->_iobase, 16, port->name);
1393 return 0;
1394 }
1395
1396 /*
1397 * configure the type and reserve the ports
1398 */
1399 static void mn10300_serial_config_port(struct uart_port *_port, int type)
1400 {
1401 struct mn10300_serial_port *port =
1402 container_of(_port, struct mn10300_serial_port, uart);
1403
1404 _enter("%s", port->name);
1405
1406 port->uart.type = PORT_MN10300;
1407
1408 if (port->options & MNSCx_OPT_CTS)
1409 port->uart.type = PORT_MN10300_CTS;
1410
1411 mn10300_serial_request_port(_port);
1412 }
1413
1414 /*
1415 * verify serial parameters are suitable for this port type
1416 */
1417 static int mn10300_serial_verify_port(struct uart_port *_port,
1418 struct serial_struct *ss)
1419 {
1420 struct mn10300_serial_port *port =
1421 container_of(_port, struct mn10300_serial_port, uart);
1422 void *mapbase = (void *) (unsigned long) port->uart.mapbase;
1423
1424 _enter("%s", port->name);
1425
1426 /* these things may not be changed */
1427 if (ss->irq != port->uart.irq ||
1428 ss->port != port->uart.iobase ||
1429 ss->io_type != port->uart.iotype ||
1430 ss->iomem_base != mapbase ||
1431 ss->iomem_reg_shift != port->uart.regshift ||
1432 ss->hub6 != port->uart.hub6 ||
1433 ss->xmit_fifo_size != port->uart.fifosize)
1434 return -EINVAL;
1435
1436 /* type may be changed on a port that supports CTS */
1437 if (ss->type != port->uart.type) {
1438 if (!(port->options & MNSCx_OPT_CTS))
1439 return -EINVAL;
1440
1441 if (ss->type != PORT_MN10300 &&
1442 ss->type != PORT_MN10300_CTS)
1443 return -EINVAL;
1444 }
1445
1446 return 0;
1447 }
1448
1449 /*
1450 * initialise the MN10300 on-chip UARTs
1451 */
1452 static int __init mn10300_serial_init(void)
1453 {
1454 struct mn10300_serial_port *port;
1455 int ret, i;
1456
1457 printk(KERN_INFO "%s version %s (%s)\n",
1458 serial_name, serial_version, serial_revdate);
1459
1460 #if defined(CONFIG_MN10300_TTYSM2) && defined(CONFIG_AM33_2)
1461 {
1462 int tmp;
1463 SC2TIM = 8; /* make the baud base of timer 2 IOCLK/8 */
1464 tmp = SC2TIM;
1465 }
1466 #endif
1467
1468 set_intr_stub(NUM2EXCEP_IRQ_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL),
1469 mn10300_serial_vdma_interrupt);
1470
1471 ret = uart_register_driver(&mn10300_serial_driver);
1472 if (!ret) {
1473 for (i = 0 ; i < NR_PORTS ; i++) {
1474 port = mn10300_serial_ports[i];
1475 if (!port || port->gdbstub)
1476 continue;
1477
1478 switch (port->clock_src) {
1479 case MNSCx_CLOCK_SRC_IOCLK:
1480 port->ioclk = MN10300_IOCLK;
1481 break;
1482
1483 #ifdef MN10300_IOBCLK
1484 case MNSCx_CLOCK_SRC_IOBCLK:
1485 port->ioclk = MN10300_IOBCLK;
1486 break;
1487 #endif
1488 default:
1489 BUG();
1490 }
1491
1492 ret = uart_add_one_port(&mn10300_serial_driver,
1493 &port->uart);
1494
1495 if (ret < 0) {
1496 _debug("ERROR %d", -ret);
1497 break;
1498 }
1499 }
1500
1501 if (ret)
1502 uart_unregister_driver(&mn10300_serial_driver);
1503 }
1504
1505 return ret;
1506 }
1507
1508 __initcall(mn10300_serial_init);
1509
1510
1511 #ifdef CONFIG_MN10300_TTYSM_CONSOLE
1512
1513 /*
1514 * print a string to the serial port without disturbing the real user of the
1515 * port too much
1516 * - the console must be locked by the caller
1517 */
1518 static void mn10300_serial_console_write(struct console *co,
1519 const char *s, unsigned count)
1520 {
1521 struct mn10300_serial_port *port;
1522 unsigned i;
1523 u16 scxctr, txicr, tmp;
1524 u8 tmxmd;
1525
1526 port = mn10300_serial_ports[co->index];
1527
1528 /* firstly hijack the serial port from the "virtual DMA" controller */
1529 arch_local_cli();
1530 txicr = *port->tx_icr;
1531 *port->tx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
1532 tmp = *port->tx_icr;
1533 arch_local_sti();
1534
1535 /* the transmitter may be disabled */
1536 scxctr = *port->_control;
1537 if (!(scxctr & SC01CTR_TXE)) {
1538 /* restart the UART clock */
1539 tmxmd = *port->_tmxmd;
1540
1541 switch (port->div_timer) {
1542 case MNSCx_DIV_TIMER_16BIT:
1543 *port->_tmxmd = 0;
1544 *port->_tmxmd = TM8MD_INIT_COUNTER;
1545 *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
1546 break;
1547
1548 case MNSCx_DIV_TIMER_8BIT:
1549 *port->_tmxmd = 0;
1550 *port->_tmxmd = TM2MD_INIT_COUNTER;
1551 *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
1552 break;
1553 }
1554
1555 /* enable the transmitter */
1556 *port->_control = (scxctr & ~SC01CTR_BKE) | SC01CTR_TXE;
1557
1558 } else if (scxctr & SC01CTR_BKE) {
1559 /* stop transmitting BREAK */
1560 *port->_control = (scxctr & ~SC01CTR_BKE);
1561 }
1562
1563 /* send the chars into the serial port (with LF -> LFCR conversion) */
1564 for (i = 0; i < count; i++) {
1565 char ch = *s++;
1566
1567 while (*port->_status & SC01STR_TBF)
1568 continue;
1569 *(u8 *) port->_txb = ch;
1570
1571 if (ch == 0x0a) {
1572 while (*port->_status & SC01STR_TBF)
1573 continue;
1574 *(u8 *) port->_txb = 0xd;
1575 }
1576 }
1577
1578 /* can't let the transmitter be turned off if it's actually
1579 * transmitting */
1580 while (*port->_status & (SC01STR_TXF | SC01STR_TBF))
1581 continue;
1582
1583 /* disable the transmitter if we re-enabled it */
1584 if (!(scxctr & SC01CTR_TXE))
1585 *port->_control = scxctr;
1586
1587 arch_local_cli();
1588 *port->tx_icr = txicr;
1589 tmp = *port->tx_icr;
1590 arch_local_sti();
1591 }
1592
1593 /*
1594 * set up a serial port as a console
1595 * - construct a cflag setting for the first rs_open()
1596 * - initialize the serial port
1597 * - return non-zero if we didn't find a serial port.
1598 */
1599 static int __init mn10300_serial_console_setup(struct console *co,
1600 char *options)
1601 {
1602 struct mn10300_serial_port *port;
1603 int i, parity = 'n', baud = 9600, bits = 8, flow = 0;
1604
1605 for (i = 0 ; i < NR_PORTS ; i++) {
1606 port = mn10300_serial_ports[i];
1607 if (port && !port->gdbstub && port->uart.line == co->index)
1608 goto found_device;
1609 }
1610
1611 return -ENODEV;
1612
1613 found_device:
1614 switch (port->clock_src) {
1615 case MNSCx_CLOCK_SRC_IOCLK:
1616 port->ioclk = MN10300_IOCLK;
1617 break;
1618
1619 #ifdef MN10300_IOBCLK
1620 case MNSCx_CLOCK_SRC_IOBCLK:
1621 port->ioclk = MN10300_IOBCLK;
1622 break;
1623 #endif
1624 default:
1625 BUG();
1626 }
1627
1628 if (options)
1629 uart_parse_options(options, &baud, &parity, &bits, &flow);
1630
1631 return uart_set_options(&port->uart, co, baud, parity, bits, flow);
1632 }
1633
1634 /*
1635 * register console
1636 */
1637 static int __init mn10300_serial_console_init(void)
1638 {
1639 register_console(&mn10300_serial_console);
1640 return 0;
1641 }
1642
1643 console_initcall(mn10300_serial_console_init);
1644 #endif
1645
1646 #ifdef CONFIG_CONSOLE_POLL
1647 /*
1648 * Polled character reception for the kernel debugger
1649 */
1650 static int mn10300_serial_poll_get_char(struct uart_port *_port)
1651 {
1652 struct mn10300_serial_port *port =
1653 container_of(_port, struct mn10300_serial_port, uart);
1654 unsigned ix;
1655 u8 st, ch;
1656
1657 _enter("%s", port->name);
1658
1659 do {
1660 /* pull chars out of the hat */
1661 ix = port->rx_outp;
1662 if (ix == port->rx_inp)
1663 return NO_POLL_CHAR;
1664
1665 ch = port->rx_buffer[ix++];
1666 st = port->rx_buffer[ix++];
1667 smp_rmb();
1668 port->rx_outp = ix & (MNSC_BUFFER_SIZE - 1);
1669
1670 } while (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF));
1671
1672 return ch;
1673 }
1674
1675
1676 /*
1677 * Polled character transmission for the kernel debugger
1678 */
1679 static void mn10300_serial_poll_put_char(struct uart_port *_port,
1680 unsigned char ch)
1681 {
1682 struct mn10300_serial_port *port =
1683 container_of(_port, struct mn10300_serial_port, uart);
1684 u8 intr, tmp;
1685
1686 /* wait for the transmitter to finish anything it might be doing (and
1687 * this includes the virtual DMA handler, so it might take a while) */
1688 while (*port->_status & (SC01STR_TBF | SC01STR_TXF))
1689 continue;
1690
1691 /* disable the Tx ready interrupt */
1692 intr = *port->_intr;
1693 *port->_intr = intr & ~SC01ICR_TI;
1694 tmp = *port->_intr;
1695
1696 if (ch == 0x0a) {
1697 *(u8 *) port->_txb = 0x0d;
1698 while (*port->_status & SC01STR_TBF)
1699 continue;
1700 }
1701
1702 *(u8 *) port->_txb = ch;
1703 while (*port->_status & SC01STR_TBF)
1704 continue;
1705
1706 /* restore the Tx interrupt flag */
1707 *port->_intr = intr;
1708 tmp = *port->_intr;
1709 }
1710
1711 #endif /* CONFIG_CONSOLE_POLL */
Linux with added FPC-III support