TCP: Fix and simplify microsecond rtt sampling
[linux/fpc-iii.git] / include / asm-powerpc / oprofile_impl.h
blob338e6a7cff4a4dbf1976d69052e7c8d8c3cc892a
1 /*
2 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
4 * Based on alpha version.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
12 #ifndef _ASM_POWERPC_OPROFILE_IMPL_H
13 #define _ASM_POWERPC_OPROFILE_IMPL_H
14 #ifdef __KERNEL__
16 #define OP_MAX_COUNTER 8
18 /* Per-counter configuration as set via oprofilefs. */
19 struct op_counter_config {
20 #ifdef __powerpc64__
21 unsigned long valid;
22 #endif
23 unsigned long enabled;
24 unsigned long event;
25 unsigned long count;
26 /* Classic doesn't support per-counter user/kernel selection */
27 unsigned long kernel;
28 unsigned long user;
29 unsigned long unit_mask;
32 /* System-wide configuration as set via oprofilefs. */
33 struct op_system_config {
34 #ifdef CONFIG_PPC64
35 unsigned long mmcr0;
36 unsigned long mmcr1;
37 unsigned long mmcra;
38 #endif
39 unsigned long enable_kernel;
40 unsigned long enable_user;
41 #ifdef CONFIG_PPC64
42 unsigned long backtrace_spinlocks;
43 #endif
46 /* Per-arch configuration */
47 struct op_powerpc_model {
48 void (*reg_setup) (struct op_counter_config *,
49 struct op_system_config *,
50 int num_counters);
51 void (*cpu_setup) (void *);
52 void (*start) (struct op_counter_config *);
53 void (*stop) (void);
54 void (*handle_interrupt) (struct pt_regs *,
55 struct op_counter_config *);
56 int num_counters;
59 #ifdef CONFIG_FSL_BOOKE
60 extern struct op_powerpc_model op_model_fsl_booke;
61 #else /* Otherwise, it's classic */
63 #ifdef CONFIG_PPC64
64 extern struct op_powerpc_model op_model_rs64;
65 extern struct op_powerpc_model op_model_power4;
67 #else /* Otherwise, CONFIG_PPC32 */
68 extern struct op_powerpc_model op_model_7450;
69 #endif
71 /* All the classic PPC parts use these */
72 static inline unsigned int ctr_read(unsigned int i)
74 switch(i) {
75 case 0:
76 return mfspr(SPRN_PMC1);
77 case 1:
78 return mfspr(SPRN_PMC2);
79 case 2:
80 return mfspr(SPRN_PMC3);
81 case 3:
82 return mfspr(SPRN_PMC4);
83 case 4:
84 return mfspr(SPRN_PMC5);
85 case 5:
86 return mfspr(SPRN_PMC6);
88 /* No PPC32 chip has more than 6 so far */
89 #ifdef CONFIG_PPC64
90 case 6:
91 return mfspr(SPRN_PMC7);
92 case 7:
93 return mfspr(SPRN_PMC8);
94 #endif
95 default:
96 return 0;
100 static inline void ctr_write(unsigned int i, unsigned int val)
102 switch(i) {
103 case 0:
104 mtspr(SPRN_PMC1, val);
105 break;
106 case 1:
107 mtspr(SPRN_PMC2, val);
108 break;
109 case 2:
110 mtspr(SPRN_PMC3, val);
111 break;
112 case 3:
113 mtspr(SPRN_PMC4, val);
114 break;
115 case 4:
116 mtspr(SPRN_PMC5, val);
117 break;
118 case 5:
119 mtspr(SPRN_PMC6, val);
120 break;
122 /* No PPC32 chip has more than 6, yet */
123 #ifdef CONFIG_PPC64
124 case 6:
125 mtspr(SPRN_PMC7, val);
126 break;
127 case 7:
128 mtspr(SPRN_PMC8, val);
129 break;
130 #endif
131 default:
132 break;
135 #endif /* !CONFIG_FSL_BOOKE */
137 #endif /* __KERNEL__ */
138 #endif /* _ASM_POWERPC_OPROFILE_IMPL_H */