ARM: imx: add platform irq type setting in gpc
[linux/fpc-iii.git] / arch / arm / mach-imx / ehci-imx31.c
blobbede21d9b98149903ecbff7fa4364b9272d43ace
1 /*
2 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
3 * Copyright (C) 2010 Freescale Semiconductor, Inc.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
16 #include <linux/platform_device.h>
17 #include <linux/io.h>
18 #include <linux/platform_data/usb-ehci-mxc.h>
20 #include "ehci.h"
21 #include "hardware.h"
23 #define USBCTRL_OTGBASE_OFFSET 0x600
25 #define MX31_OTG_SIC_SHIFT 29
26 #define MX31_OTG_SIC_MASK (0x3 << MX31_OTG_SIC_SHIFT)
27 #define MX31_OTG_PM_BIT (1 << 24)
29 #define MX31_H2_SIC_SHIFT 21
30 #define MX31_H2_SIC_MASK (0x3 << MX31_H2_SIC_SHIFT)
31 #define MX31_H2_PM_BIT (1 << 16)
32 #define MX31_H2_DT_BIT (1 << 5)
34 #define MX31_H1_SIC_SHIFT 13
35 #define MX31_H1_SIC_MASK (0x3 << MX31_H1_SIC_SHIFT)
36 #define MX31_H1_PM_BIT (1 << 8)
37 #define MX31_H1_DT_BIT (1 << 4)
39 int mx31_initialize_usb_hw(int port, unsigned int flags)
41 unsigned int v;
43 v = readl(MX31_IO_ADDRESS(MX31_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
45 switch (port) {
46 case 0: /* OTG port */
47 v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
48 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_OTG_SIC_SHIFT;
50 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
51 v |= MX31_OTG_PM_BIT;
53 break;
54 case 1: /* H1 port */
55 v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | MX31_H1_DT_BIT);
56 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H1_SIC_SHIFT;
58 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
59 v |= MX31_H1_PM_BIT;
61 if (!(flags & MXC_EHCI_TTL_ENABLED))
62 v |= MX31_H1_DT_BIT;
64 break;
65 case 2: /* H2 port */
66 v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | MX31_H2_DT_BIT);
67 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H2_SIC_SHIFT;
69 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
70 v |= MX31_H2_PM_BIT;
72 if (!(flags & MXC_EHCI_TTL_ENABLED))
73 v |= MX31_H2_DT_BIT;
75 break;
76 default:
77 return -EINVAL;
80 writel(v, MX31_IO_ADDRESS(MX31_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
82 return 0;