1 // SPDX-License-Identifier: GPL-2.0
3 * June 2006 Steve Glendinning <steve.glendinning@shawell.net>
5 * Polaris-specific resource declaration
9 #include <linux/init.h>
10 #include <linux/interrupt.h>
11 #include <linux/irq.h>
12 #include <linux/platform_device.h>
13 #include <linux/regulator/fixed.h>
14 #include <linux/regulator/machine.h>
15 #include <linux/smsc911x.h>
18 #include <asm/machvec.h>
19 #include <asm/heartbeat.h>
21 #include <mach-se/mach/se.h>
23 #define BCR2 (0xFFFFFF62)
24 #define WCR2 (0xFFFFFF66)
25 #define AREA5_WAIT_CTRL (0x1C00)
26 #define WAIT_STATES_10 (0x7)
28 /* Dummy supplies, where voltage doesn't matter */
29 static struct regulator_consumer_supply dummy_supplies
[] = {
30 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
31 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
34 static struct resource smsc911x_resources
[] = {
36 .name
= "smsc911x-memory",
38 .end
= PA_EXT5
+ 0x1fff,
39 .flags
= IORESOURCE_MEM
,
42 .name
= "smsc911x-irq",
45 .flags
= IORESOURCE_IRQ
,
49 static struct smsc911x_platform_config smsc911x_config
= {
50 .irq_polarity
= SMSC911X_IRQ_POLARITY_ACTIVE_LOW
,
51 .irq_type
= SMSC911X_IRQ_TYPE_OPEN_DRAIN
,
52 .flags
= SMSC911X_USE_32BIT
,
53 .phy_interface
= PHY_INTERFACE_MODE_MII
,
56 static struct platform_device smsc911x_device
= {
59 .num_resources
= ARRAY_SIZE(smsc911x_resources
),
60 .resource
= smsc911x_resources
,
62 .platform_data
= &smsc911x_config
,
66 static unsigned char heartbeat_bit_pos
[] = { 0, 1, 2, 3 };
68 static struct heartbeat_data heartbeat_data
= {
69 .bit_pos
= heartbeat_bit_pos
,
70 .nr_bits
= ARRAY_SIZE(heartbeat_bit_pos
),
73 static struct resource heartbeat_resource
= {
76 .flags
= IORESOURCE_MEM
| IORESOURCE_MEM_8BIT
,
79 static struct platform_device heartbeat_device
= {
83 .platform_data
= &heartbeat_data
,
86 .resource
= &heartbeat_resource
,
89 static struct platform_device
*polaris_devices
[] __initdata
= {
94 static int __init
polaris_initialise(void)
98 printk(KERN_INFO
"Configuring Polaris external bus\n");
100 regulator_register_fixed(0, dummy_supplies
, ARRAY_SIZE(dummy_supplies
));
102 /* Configure area 5 with 2 wait states */
103 wcr
= __raw_readw(WCR2
);
104 wcr
&= (~AREA5_WAIT_CTRL
);
105 wcr
|= (WAIT_STATES_10
<< 10);
106 __raw_writew(wcr
, WCR2
);
108 /* Configure area 5 for 32-bit access */
109 bcr_mask
= __raw_readw(BCR2
);
111 __raw_writew(bcr_mask
, BCR2
);
113 return platform_add_devices(polaris_devices
,
114 ARRAY_SIZE(polaris_devices
));
116 arch_initcall(polaris_initialise
);
118 static struct ipr_data ipr_irq_table
[] = {
120 { IRQ0_IRQ
, 0, 0, 1, }, /* IRQ0 */
121 { IRQ1_IRQ
, 0, 4, 1, }, /* IRQ1 */
124 static unsigned long ipr_offsets
[] = {
128 static struct ipr_desc ipr_irq_desc
= {
129 .ipr_offsets
= ipr_offsets
,
130 .nr_offsets
= ARRAY_SIZE(ipr_offsets
),
132 .ipr_data
= ipr_irq_table
,
133 .nr_irqs
= ARRAY_SIZE(ipr_irq_table
),
135 .name
= "sh7709-ext",
139 static void __init
init_polaris_irq(void)
141 /* Disable all interrupts */
142 __raw_writew(0, BCR_ILCRA
);
143 __raw_writew(0, BCR_ILCRB
);
144 __raw_writew(0, BCR_ILCRC
);
145 __raw_writew(0, BCR_ILCRD
);
146 __raw_writew(0, BCR_ILCRE
);
147 __raw_writew(0, BCR_ILCRF
);
148 __raw_writew(0, BCR_ILCRG
);
150 register_ipr_controller(&ipr_irq_desc
);
153 static struct sh_machine_vector mv_polaris __initmv
= {
154 .mv_name
= "Polaris",
155 .mv_init_irq
= init_polaris_irq
,