2 * Copyright © 2009 Nuvoton technology corporation.
4 * Wan ZongShun <mcuos.com@gmail.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation;version 2 of the License.
12 #include <linux/slab.h>
13 #include <linux/module.h>
14 #include <linux/interrupt.h>
16 #include <linux/platform_device.h>
17 #include <linux/delay.h>
18 #include <linux/clk.h>
19 #include <linux/err.h>
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/nand.h>
23 #include <linux/mtd/partitions.h>
25 #define REG_FMICSR 0x00
26 #define REG_SMCSR 0xa0
27 #define REG_SMISR 0xac
28 #define REG_SMCMD 0xb0
29 #define REG_SMADDR 0xb4
30 #define REG_SMDATA 0xb8
32 #define RESET_FMI 0x01
34 #define READYBUSY (0x01 << 18)
37 #define PSIZE (0x01 << 3)
38 #define DMARWEN (0x03 << 1)
39 #define BUSWID (0x01 << 4)
40 #define ECC4EN (0x01 << 5)
41 #define WP (0x01 << 24)
42 #define NANDCS (0x01 << 25)
43 #define ENDADDR (0x01 << 31)
45 #define read_data_reg(dev) \
46 __raw_readl((dev)->reg + REG_SMDATA)
48 #define write_data_reg(dev, val) \
49 __raw_writel((val), (dev)->reg + REG_SMDATA)
51 #define write_cmd_reg(dev, val) \
52 __raw_writel((val), (dev)->reg + REG_SMCMD)
54 #define write_addr_reg(dev, val) \
55 __raw_writel((val), (dev)->reg + REG_SMADDR)
59 struct nand_chip chip
;
65 static const struct mtd_partition partitions
[] = {
69 .size
= 8 * 1024 * 1024
73 .offset
= MTDPART_OFS_APPEND
,
74 .size
= MTDPART_SIZ_FULL
78 static unsigned char nuc900_nand_read_byte(struct mtd_info
*mtd
)
81 struct nuc900_nand
*nand
;
83 nand
= container_of(mtd
, struct nuc900_nand
, mtd
);
85 ret
= (unsigned char)read_data_reg(nand
);
90 static void nuc900_nand_read_buf(struct mtd_info
*mtd
,
91 unsigned char *buf
, int len
)
94 struct nuc900_nand
*nand
;
96 nand
= container_of(mtd
, struct nuc900_nand
, mtd
);
98 for (i
= 0; i
< len
; i
++)
99 buf
[i
] = (unsigned char)read_data_reg(nand
);
102 static void nuc900_nand_write_buf(struct mtd_info
*mtd
,
103 const unsigned char *buf
, int len
)
106 struct nuc900_nand
*nand
;
108 nand
= container_of(mtd
, struct nuc900_nand
, mtd
);
110 for (i
= 0; i
< len
; i
++)
111 write_data_reg(nand
, buf
[i
]);
114 static int nuc900_check_rb(struct nuc900_nand
*nand
)
117 spin_lock(&nand
->lock
);
118 val
= __raw_readl(REG_SMISR
);
120 spin_unlock(&nand
->lock
);
125 static int nuc900_nand_devready(struct mtd_info
*mtd
)
127 struct nuc900_nand
*nand
;
130 nand
= container_of(mtd
, struct nuc900_nand
, mtd
);
132 ready
= (nuc900_check_rb(nand
)) ? 1 : 0;
136 static void nuc900_nand_command_lp(struct mtd_info
*mtd
, unsigned int command
,
137 int column
, int page_addr
)
139 register struct nand_chip
*chip
= mtd
->priv
;
140 struct nuc900_nand
*nand
;
142 nand
= container_of(mtd
, struct nuc900_nand
, mtd
);
144 if (command
== NAND_CMD_READOOB
) {
145 column
+= mtd
->writesize
;
146 command
= NAND_CMD_READ0
;
149 write_cmd_reg(nand
, command
& 0xff);
151 if (column
!= -1 || page_addr
!= -1) {
154 if (chip
->options
& NAND_BUSWIDTH_16
&&
155 !nand_opcode_8bits(command
))
157 write_addr_reg(nand
, column
);
158 write_addr_reg(nand
, column
>> 8 | ENDADDR
);
160 if (page_addr
!= -1) {
161 write_addr_reg(nand
, page_addr
);
163 if (chip
->chipsize
> (128 << 20)) {
164 write_addr_reg(nand
, page_addr
>> 8);
165 write_addr_reg(nand
, page_addr
>> 16 | ENDADDR
);
167 write_addr_reg(nand
, page_addr
>> 8 | ENDADDR
);
173 case NAND_CMD_CACHEDPROG
:
174 case NAND_CMD_PAGEPROG
:
175 case NAND_CMD_ERASE1
:
176 case NAND_CMD_ERASE2
:
179 case NAND_CMD_STATUS
:
185 udelay(chip
->chip_delay
);
187 write_cmd_reg(nand
, NAND_CMD_STATUS
);
188 write_cmd_reg(nand
, command
);
190 while (!nuc900_check_rb(nand
))
195 case NAND_CMD_RNDOUT
:
196 write_cmd_reg(nand
, NAND_CMD_RNDOUTSTART
);
201 write_cmd_reg(nand
, NAND_CMD_READSTART
);
204 if (!chip
->dev_ready
) {
205 udelay(chip
->chip_delay
);
210 /* Apply this short delay always to ensure that we do wait tWB in
211 * any case on any machine. */
214 while (!chip
->dev_ready(mtd
))
219 static void nuc900_nand_enable(struct nuc900_nand
*nand
)
222 spin_lock(&nand
->lock
);
223 __raw_writel(RESET_FMI
, (nand
->reg
+ REG_FMICSR
));
225 val
= __raw_readl(nand
->reg
+ REG_FMICSR
);
227 if (!(val
& NAND_EN
))
228 __raw_writel(val
| NAND_EN
, nand
->reg
+ REG_FMICSR
);
230 val
= __raw_readl(nand
->reg
+ REG_SMCSR
);
232 val
&= ~(SWRST
|PSIZE
|DMARWEN
|BUSWID
|ECC4EN
|NANDCS
);
235 __raw_writel(val
, nand
->reg
+ REG_SMCSR
);
237 spin_unlock(&nand
->lock
);
240 static int nuc900_nand_probe(struct platform_device
*pdev
)
242 struct nuc900_nand
*nuc900_nand
;
243 struct nand_chip
*chip
;
244 struct resource
*res
;
246 nuc900_nand
= devm_kzalloc(&pdev
->dev
, sizeof(struct nuc900_nand
),
250 chip
= &(nuc900_nand
->chip
);
252 nuc900_nand
->mtd
.priv
= chip
;
253 nuc900_nand
->mtd
.owner
= THIS_MODULE
;
254 spin_lock_init(&nuc900_nand
->lock
);
256 nuc900_nand
->clk
= devm_clk_get(&pdev
->dev
, NULL
);
257 if (IS_ERR(nuc900_nand
->clk
))
259 clk_enable(nuc900_nand
->clk
);
261 chip
->cmdfunc
= nuc900_nand_command_lp
;
262 chip
->dev_ready
= nuc900_nand_devready
;
263 chip
->read_byte
= nuc900_nand_read_byte
;
264 chip
->write_buf
= nuc900_nand_write_buf
;
265 chip
->read_buf
= nuc900_nand_read_buf
;
266 chip
->chip_delay
= 50;
268 chip
->ecc
.mode
= NAND_ECC_SOFT
;
270 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
271 nuc900_nand
->reg
= devm_ioremap_resource(&pdev
->dev
, res
);
272 if (IS_ERR(nuc900_nand
->reg
))
273 return PTR_ERR(nuc900_nand
->reg
);
275 nuc900_nand_enable(nuc900_nand
);
277 if (nand_scan(&(nuc900_nand
->mtd
), 1))
280 mtd_device_register(&(nuc900_nand
->mtd
), partitions
,
281 ARRAY_SIZE(partitions
));
283 platform_set_drvdata(pdev
, nuc900_nand
);
288 static int nuc900_nand_remove(struct platform_device
*pdev
)
290 struct nuc900_nand
*nuc900_nand
= platform_get_drvdata(pdev
);
292 nand_release(&nuc900_nand
->mtd
);
293 clk_disable(nuc900_nand
->clk
);
298 static struct platform_driver nuc900_nand_driver
= {
299 .probe
= nuc900_nand_probe
,
300 .remove
= nuc900_nand_remove
,
302 .name
= "nuc900-fmi",
303 .owner
= THIS_MODULE
,
307 module_platform_driver(nuc900_nand_driver
);
309 MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
310 MODULE_DESCRIPTION("w90p910/NUC9xx nand driver!");
311 MODULE_LICENSE("GPL");
312 MODULE_ALIAS("platform:nuc900-fmi");