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Linux 4.9.237
[linux/fpc-iii.git] / drivers / scsi / hpsa.c
blobb82df8cdf96264392c0f693fe596f54576ed060d
1 /*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2016 Microsemi Corporation
4 * Copyright 2014-2015 PMC-Sierra, Inc.
5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14 * NON INFRINGEMENT. See the GNU General Public License for more details.
15 *
16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
17 *
18 */
19
20 #include <linux/module.h>
21 #include <linux/interrupt.h>
22 #include <linux/types.h>
23 #include <linux/pci.h>
24 #include <linux/pci-aspm.h>
25 #include <linux/kernel.h>
26 #include <linux/slab.h>
27 #include <linux/delay.h>
28 #include <linux/fs.h>
29 #include <linux/timer.h>
30 #include <linux/init.h>
31 #include <linux/spinlock.h>
32 #include <linux/compat.h>
33 #include <linux/blktrace_api.h>
34 #include <linux/uaccess.h>
35 #include <linux/io.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/completion.h>
38 #include <linux/moduleparam.h>
39 #include <scsi/scsi.h>
40 #include <scsi/scsi_cmnd.h>
41 #include <scsi/scsi_device.h>
42 #include <scsi/scsi_host.h>
43 #include <scsi/scsi_tcq.h>
44 #include <scsi/scsi_eh.h>
45 #include <scsi/scsi_transport_sas.h>
46 #include <scsi/scsi_dbg.h>
47 #include <linux/cciss_ioctl.h>
48 #include <linux/string.h>
49 #include <linux/bitmap.h>
50 #include <linux/atomic.h>
51 #include <linux/jiffies.h>
52 #include <linux/percpu-defs.h>
53 #include <linux/percpu.h>
54 #include <asm/unaligned.h>
55 #include <asm/div64.h>
56 #include "hpsa_cmd.h"
57 #include "hpsa.h"
58
59 /*
60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
61 * with an optional trailing '-' followed by a byte value (0-255).
62 */
63 #define HPSA_DRIVER_VERSION "3.4.16-0"
64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
65 #define HPSA "hpsa"
66
67 /* How long to wait for CISS doorbell communication */
68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */
69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */
70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */
71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */
72 #define MAX_IOCTL_CONFIG_WAIT 1000
73
74 /*define how many times we will try a command because of bus resets */
75 #define MAX_CMD_RETRIES 3
76
77 /* Embedded module documentation macros - see modules.h */
78 MODULE_AUTHOR("Hewlett-Packard Company");
79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
80 HPSA_DRIVER_VERSION);
81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
82 MODULE_VERSION(HPSA_DRIVER_VERSION);
83 MODULE_LICENSE("GPL");
84
85 static int hpsa_allow_any;
86 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
87 MODULE_PARM_DESC(hpsa_allow_any,
88 "Allow hpsa driver to access unknown HP Smart Array hardware");
89 static int hpsa_simple_mode;
90 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
91 MODULE_PARM_DESC(hpsa_simple_mode,
92 "Use 'simple mode' rather than 'performant mode'");
93
94 /* define the PCI info for the cards we can control */
95 static const struct pci_device_id hpsa_pci_device_id[] = {
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6},
128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA},
132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB},
133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC},
134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD},
135 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE},
136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
141 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
145 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
146 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
147 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
148 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
149 {0,}
150 };
151
152 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
153
154 /* board_id = Subsystem Device ID & Vendor ID
155 * product = Marketing Name for the board
156 * access = Address of the struct of function pointers
157 */
158 static struct board_type products[] = {
159 {0x3241103C, "Smart Array P212", &SA5_access},
160 {0x3243103C, "Smart Array P410", &SA5_access},
161 {0x3245103C, "Smart Array P410i", &SA5_access},
162 {0x3247103C, "Smart Array P411", &SA5_access},
163 {0x3249103C, "Smart Array P812", &SA5_access},
164 {0x324A103C, "Smart Array P712m", &SA5_access},
165 {0x324B103C, "Smart Array P711m", &SA5_access},
166 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
167 {0x3350103C, "Smart Array P222", &SA5_access},
168 {0x3351103C, "Smart Array P420", &SA5_access},
169 {0x3352103C, "Smart Array P421", &SA5_access},
170 {0x3353103C, "Smart Array P822", &SA5_access},
171 {0x3354103C, "Smart Array P420i", &SA5_access},
172 {0x3355103C, "Smart Array P220i", &SA5_access},
173 {0x3356103C, "Smart Array P721m", &SA5_access},
174 {0x1921103C, "Smart Array P830i", &SA5_access},
175 {0x1922103C, "Smart Array P430", &SA5_access},
176 {0x1923103C, "Smart Array P431", &SA5_access},
177 {0x1924103C, "Smart Array P830", &SA5_access},
178 {0x1926103C, "Smart Array P731m", &SA5_access},
179 {0x1928103C, "Smart Array P230i", &SA5_access},
180 {0x1929103C, "Smart Array P530", &SA5_access},
181 {0x21BD103C, "Smart Array P244br", &SA5_access},
182 {0x21BE103C, "Smart Array P741m", &SA5_access},
183 {0x21BF103C, "Smart HBA H240ar", &SA5_access},
184 {0x21C0103C, "Smart Array P440ar", &SA5_access},
185 {0x21C1103C, "Smart Array P840ar", &SA5_access},
186 {0x21C2103C, "Smart Array P440", &SA5_access},
187 {0x21C3103C, "Smart Array P441", &SA5_access},
188 {0x21C4103C, "Smart Array", &SA5_access},
189 {0x21C5103C, "Smart Array P841", &SA5_access},
190 {0x21C6103C, "Smart HBA H244br", &SA5_access},
191 {0x21C7103C, "Smart HBA H240", &SA5_access},
192 {0x21C8103C, "Smart HBA H241", &SA5_access},
193 {0x21C9103C, "Smart Array", &SA5_access},
194 {0x21CA103C, "Smart Array P246br", &SA5_access},
195 {0x21CB103C, "Smart Array P840", &SA5_access},
196 {0x21CC103C, "Smart Array", &SA5_access},
197 {0x21CD103C, "Smart Array", &SA5_access},
198 {0x21CE103C, "Smart HBA", &SA5_access},
199 {0x05809005, "SmartHBA-SA", &SA5_access},
200 {0x05819005, "SmartHBA-SA 8i", &SA5_access},
201 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
202 {0x05839005, "SmartHBA-SA 8e", &SA5_access},
203 {0x05849005, "SmartHBA-SA 16i", &SA5_access},
204 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
205 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
206 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
207 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
208 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
209 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
210 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
211 };
212
213 static struct scsi_transport_template *hpsa_sas_transport_template;
214 static int hpsa_add_sas_host(struct ctlr_info *h);
215 static void hpsa_delete_sas_host(struct ctlr_info *h);
216 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
217 struct hpsa_scsi_dev_t *device);
218 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
219 static struct hpsa_scsi_dev_t
220 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
221 struct sas_rphy *rphy);
222
223 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
224 static const struct scsi_cmnd hpsa_cmd_busy;
225 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
226 static const struct scsi_cmnd hpsa_cmd_idle;
227 static int number_of_controllers;
228
229 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
230 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
231 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
232
233 #ifdef CONFIG_COMPAT
234 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
235 void __user *arg);
236 #endif
237
238 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
239 static struct CommandList *cmd_alloc(struct ctlr_info *h);
240 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
241 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
242 struct scsi_cmnd *scmd);
243 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
244 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
245 int cmd_type);
246 static void hpsa_free_cmd_pool(struct ctlr_info *h);
247 #define VPD_PAGE (1 << 8)
248 #define HPSA_SIMPLE_ERROR_BITS 0x03
249
250 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
251 static void hpsa_scan_start(struct Scsi_Host *);
252 static int hpsa_scan_finished(struct Scsi_Host *sh,
253 unsigned long elapsed_time);
254 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
255
256 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
257 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
258 static int hpsa_slave_alloc(struct scsi_device *sdev);
259 static int hpsa_slave_configure(struct scsi_device *sdev);
260 static void hpsa_slave_destroy(struct scsi_device *sdev);
261
262 static void hpsa_update_scsi_devices(struct ctlr_info *h);
263 static int check_for_unit_attention(struct ctlr_info *h,
264 struct CommandList *c);
265 static void check_ioctl_unit_attention(struct ctlr_info *h,
266 struct CommandList *c);
267 /* performant mode helper functions */
268 static void calc_bucket_map(int *bucket, int num_buckets,
269 int nsgs, int min_blocks, u32 *bucket_map);
270 static void hpsa_free_performant_mode(struct ctlr_info *h);
271 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
272 static inline u32 next_command(struct ctlr_info *h, u8 q);
273 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
274 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
275 u64 *cfg_offset);
276 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
277 unsigned long *memory_bar);
278 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
279 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
280 int wait_for_ready);
281 static inline void finish_cmd(struct CommandList *c);
282 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
283 #define BOARD_NOT_READY 0
284 #define BOARD_READY 1
285 static void hpsa_drain_accel_commands(struct ctlr_info *h);
286 static void hpsa_flush_cache(struct ctlr_info *h);
287 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
288 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
289 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
290 static void hpsa_command_resubmit_worker(struct work_struct *work);
291 static u32 lockup_detected(struct ctlr_info *h);
292 static int detect_controller_lockup(struct ctlr_info *h);
293 static void hpsa_disable_rld_caching(struct ctlr_info *h);
294 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
295 struct ReportExtendedLUNdata *buf, int bufsize);
296 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
297 unsigned char scsi3addr[], u8 page);
298 static int hpsa_luns_changed(struct ctlr_info *h);
299 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
300 struct hpsa_scsi_dev_t *dev,
301 unsigned char *scsi3addr);
302
303 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
304 {
305 unsigned long *priv = shost_priv(sdev->host);
306 return (struct ctlr_info *) *priv;
307 }
308
309 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
310 {
311 unsigned long *priv = shost_priv(sh);
312 return (struct ctlr_info *) *priv;
313 }
314
315 static inline bool hpsa_is_cmd_idle(struct CommandList *c)
316 {
317 return c->scsi_cmd == SCSI_CMD_IDLE;
318 }
319
320 static inline bool hpsa_is_pending_event(struct CommandList *c)
321 {
322 return c->abort_pending || c->reset_pending;
323 }
324
325 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */
326 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
327 u8 *sense_key, u8 *asc, u8 *ascq)
328 {
329 struct scsi_sense_hdr sshdr;
330 bool rc;
331
332 *sense_key = -1;
333 *asc = -1;
334 *ascq = -1;
335
336 if (sense_data_len < 1)
337 return;
338
339 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
340 if (rc) {
341 *sense_key = sshdr.sense_key;
342 *asc = sshdr.asc;
343 *ascq = sshdr.ascq;
344 }
345 }
346
347 static int check_for_unit_attention(struct ctlr_info *h,
348 struct CommandList *c)
349 {
350 u8 sense_key, asc, ascq;
351 int sense_len;
352
353 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
354 sense_len = sizeof(c->err_info->SenseInfo);
355 else
356 sense_len = c->err_info->SenseLen;
357
358 decode_sense_data(c->err_info->SenseInfo, sense_len,
359 &sense_key, &asc, &ascq);
360 if (sense_key != UNIT_ATTENTION || asc == 0xff)
361 return 0;
362
363 switch (asc) {
364 case STATE_CHANGED:
365 dev_warn(&h->pdev->dev,
366 "%s: a state change detected, command retried\n",
367 h->devname);
368 break;
369 case LUN_FAILED:
370 dev_warn(&h->pdev->dev,
371 "%s: LUN failure detected\n", h->devname);
372 break;
373 case REPORT_LUNS_CHANGED:
374 dev_warn(&h->pdev->dev,
375 "%s: report LUN data changed\n", h->devname);
376 /*
377 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
378 * target (array) devices.
379 */
380 break;
381 case POWER_OR_RESET:
382 dev_warn(&h->pdev->dev,
383 "%s: a power on or device reset detected\n",
384 h->devname);
385 break;
386 case UNIT_ATTENTION_CLEARED:
387 dev_warn(&h->pdev->dev,
388 "%s: unit attention cleared by another initiator\n",
389 h->devname);
390 break;
391 default:
392 dev_warn(&h->pdev->dev,
393 "%s: unknown unit attention detected\n",
394 h->devname);
395 break;
396 }
397 return 1;
398 }
399
400 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
401 {
402 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
403 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
404 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
405 return 0;
406 dev_warn(&h->pdev->dev, HPSA "device busy");
407 return 1;
408 }
409
410 static u32 lockup_detected(struct ctlr_info *h);
411 static ssize_t host_show_lockup_detected(struct device *dev,
412 struct device_attribute *attr, char *buf)
413 {
414 int ld;
415 struct ctlr_info *h;
416 struct Scsi_Host *shost = class_to_shost(dev);
417
418 h = shost_to_hba(shost);
419 ld = lockup_detected(h);
420
421 return sprintf(buf, "ld=%d\n", ld);
422 }
423
424 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
425 struct device_attribute *attr,
426 const char *buf, size_t count)
427 {
428 int status, len;
429 struct ctlr_info *h;
430 struct Scsi_Host *shost = class_to_shost(dev);
431 char tmpbuf[10];
432
433 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
434 return -EACCES;
435 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
436 strncpy(tmpbuf, buf, len);
437 tmpbuf[len] = '\0';
438 if (sscanf(tmpbuf, "%d", &status) != 1)
439 return -EINVAL;
440 h = shost_to_hba(shost);
441 h->acciopath_status = !!status;
442 dev_warn(&h->pdev->dev,
443 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
444 h->acciopath_status ? "enabled" : "disabled");
445 return count;
446 }
447
448 static ssize_t host_store_raid_offload_debug(struct device *dev,
449 struct device_attribute *attr,
450 const char *buf, size_t count)
451 {
452 int debug_level, len;
453 struct ctlr_info *h;
454 struct Scsi_Host *shost = class_to_shost(dev);
455 char tmpbuf[10];
456
457 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
458 return -EACCES;
459 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
460 strncpy(tmpbuf, buf, len);
461 tmpbuf[len] = '\0';
462 if (sscanf(tmpbuf, "%d", &debug_level) != 1)
463 return -EINVAL;
464 if (debug_level < 0)
465 debug_level = 0;
466 h = shost_to_hba(shost);
467 h->raid_offload_debug = debug_level;
468 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
469 h->raid_offload_debug);
470 return count;
471 }
472
473 static ssize_t host_store_rescan(struct device *dev,
474 struct device_attribute *attr,
475 const char *buf, size_t count)
476 {
477 struct ctlr_info *h;
478 struct Scsi_Host *shost = class_to_shost(dev);
479 h = shost_to_hba(shost);
480 hpsa_scan_start(h->scsi_host);
481 return count;
482 }
483
484 static ssize_t host_show_firmware_revision(struct device *dev,
485 struct device_attribute *attr, char *buf)
486 {
487 struct ctlr_info *h;
488 struct Scsi_Host *shost = class_to_shost(dev);
489 unsigned char *fwrev;
490
491 h = shost_to_hba(shost);
492 if (!h->hba_inquiry_data)
493 return 0;
494 fwrev = &h->hba_inquiry_data[32];
495 return snprintf(buf, 20, "%c%c%c%c\n",
496 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
497 }
498
499 static ssize_t host_show_commands_outstanding(struct device *dev,
500 struct device_attribute *attr, char *buf)
501 {
502 struct Scsi_Host *shost = class_to_shost(dev);
503 struct ctlr_info *h = shost_to_hba(shost);
504
505 return snprintf(buf, 20, "%d\n",
506 atomic_read(&h->commands_outstanding));
507 }
508
509 static ssize_t host_show_transport_mode(struct device *dev,
510 struct device_attribute *attr, char *buf)
511 {
512 struct ctlr_info *h;
513 struct Scsi_Host *shost = class_to_shost(dev);
514
515 h = shost_to_hba(shost);
516 return snprintf(buf, 20, "%s\n",
517 h->transMethod & CFGTBL_Trans_Performant ?
518 "performant" : "simple");
519 }
520
521 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
522 struct device_attribute *attr, char *buf)
523 {
524 struct ctlr_info *h;
525 struct Scsi_Host *shost = class_to_shost(dev);
526
527 h = shost_to_hba(shost);
528 return snprintf(buf, 30, "HP SSD Smart Path %s\n",
529 (h->acciopath_status == 1) ? "enabled" : "disabled");
530 }
531
532 /* List of controllers which cannot be hard reset on kexec with reset_devices */
533 static u32 unresettable_controller[] = {
534 0x324a103C, /* Smart Array P712m */
535 0x324b103C, /* Smart Array P711m */
536 0x3223103C, /* Smart Array P800 */
537 0x3234103C, /* Smart Array P400 */
538 0x3235103C, /* Smart Array P400i */
539 0x3211103C, /* Smart Array E200i */
540 0x3212103C, /* Smart Array E200 */
541 0x3213103C, /* Smart Array E200i */
542 0x3214103C, /* Smart Array E200i */
543 0x3215103C, /* Smart Array E200i */
544 0x3237103C, /* Smart Array E500 */
545 0x323D103C, /* Smart Array P700m */
546 0x40800E11, /* Smart Array 5i */
547 0x409C0E11, /* Smart Array 6400 */
548 0x409D0E11, /* Smart Array 6400 EM */
549 0x40700E11, /* Smart Array 5300 */
550 0x40820E11, /* Smart Array 532 */
551 0x40830E11, /* Smart Array 5312 */
552 0x409A0E11, /* Smart Array 641 */
553 0x409B0E11, /* Smart Array 642 */
554 0x40910E11, /* Smart Array 6i */
555 };
556
557 /* List of controllers which cannot even be soft reset */
558 static u32 soft_unresettable_controller[] = {
559 0x40800E11, /* Smart Array 5i */
560 0x40700E11, /* Smart Array 5300 */
561 0x40820E11, /* Smart Array 532 */
562 0x40830E11, /* Smart Array 5312 */
563 0x409A0E11, /* Smart Array 641 */
564 0x409B0E11, /* Smart Array 642 */
565 0x40910E11, /* Smart Array 6i */
566 /* Exclude 640x boards. These are two pci devices in one slot
567 * which share a battery backed cache module. One controls the
568 * cache, the other accesses the cache through the one that controls
569 * it. If we reset the one controlling the cache, the other will
570 * likely not be happy. Just forbid resetting this conjoined mess.
571 * The 640x isn't really supported by hpsa anyway.
572 */
573 0x409C0E11, /* Smart Array 6400 */
574 0x409D0E11, /* Smart Array 6400 EM */
575 };
576
577 static u32 needs_abort_tags_swizzled[] = {
578 0x323D103C, /* Smart Array P700m */
579 0x324a103C, /* Smart Array P712m */
580 0x324b103C, /* SmartArray P711m */
581 };
582
583 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
584 {
585 int i;
586
587 for (i = 0; i < nelems; i++)
588 if (a[i] == board_id)
589 return 1;
590 return 0;
591 }
592
593 static int ctlr_is_hard_resettable(u32 board_id)
594 {
595 return !board_id_in_array(unresettable_controller,
596 ARRAY_SIZE(unresettable_controller), board_id);
597 }
598
599 static int ctlr_is_soft_resettable(u32 board_id)
600 {
601 return !board_id_in_array(soft_unresettable_controller,
602 ARRAY_SIZE(soft_unresettable_controller), board_id);
603 }
604
605 static int ctlr_is_resettable(u32 board_id)
606 {
607 return ctlr_is_hard_resettable(board_id) ||
608 ctlr_is_soft_resettable(board_id);
609 }
610
611 static int ctlr_needs_abort_tags_swizzled(u32 board_id)
612 {
613 return board_id_in_array(needs_abort_tags_swizzled,
614 ARRAY_SIZE(needs_abort_tags_swizzled), board_id);
615 }
616
617 static ssize_t host_show_resettable(struct device *dev,
618 struct device_attribute *attr, char *buf)
619 {
620 struct ctlr_info *h;
621 struct Scsi_Host *shost = class_to_shost(dev);
622
623 h = shost_to_hba(shost);
624 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
625 }
626
627 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
628 {
629 return (scsi3addr[3] & 0xC0) == 0x40;
630 }
631
632 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
633 "1(+0)ADM", "UNKNOWN", "PHYS DRV"
634 };
635 #define HPSA_RAID_0 0
636 #define HPSA_RAID_4 1
637 #define HPSA_RAID_1 2 /* also used for RAID 10 */
638 #define HPSA_RAID_5 3 /* also used for RAID 50 */
639 #define HPSA_RAID_51 4
640 #define HPSA_RAID_6 5 /* also used for RAID 60 */
641 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */
642 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
643 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
644
645 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
646 {
647 return !device->physical_device;
648 }
649
650 static ssize_t raid_level_show(struct device *dev,
651 struct device_attribute *attr, char *buf)
652 {
653 ssize_t l = 0;
654 unsigned char rlevel;
655 struct ctlr_info *h;
656 struct scsi_device *sdev;
657 struct hpsa_scsi_dev_t *hdev;
658 unsigned long flags;
659
660 sdev = to_scsi_device(dev);
661 h = sdev_to_hba(sdev);
662 spin_lock_irqsave(&h->lock, flags);
663 hdev = sdev->hostdata;
664 if (!hdev) {
665 spin_unlock_irqrestore(&h->lock, flags);
666 return -ENODEV;
667 }
668
669 /* Is this even a logical drive? */
670 if (!is_logical_device(hdev)) {
671 spin_unlock_irqrestore(&h->lock, flags);
672 l = snprintf(buf, PAGE_SIZE, "N/A\n");
673 return l;
674 }
675
676 rlevel = hdev->raid_level;
677 spin_unlock_irqrestore(&h->lock, flags);
678 if (rlevel > RAID_UNKNOWN)
679 rlevel = RAID_UNKNOWN;
680 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
681 return l;
682 }
683
684 static ssize_t lunid_show(struct device *dev,
685 struct device_attribute *attr, char *buf)
686 {
687 struct ctlr_info *h;
688 struct scsi_device *sdev;
689 struct hpsa_scsi_dev_t *hdev;
690 unsigned long flags;
691 unsigned char lunid[8];
692
693 sdev = to_scsi_device(dev);
694 h = sdev_to_hba(sdev);
695 spin_lock_irqsave(&h->lock, flags);
696 hdev = sdev->hostdata;
697 if (!hdev) {
698 spin_unlock_irqrestore(&h->lock, flags);
699 return -ENODEV;
700 }
701 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
702 spin_unlock_irqrestore(&h->lock, flags);
703 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
704 lunid[0], lunid[1], lunid[2], lunid[3],
705 lunid[4], lunid[5], lunid[6], lunid[7]);
706 }
707
708 static ssize_t unique_id_show(struct device *dev,
709 struct device_attribute *attr, char *buf)
710 {
711 struct ctlr_info *h;
712 struct scsi_device *sdev;
713 struct hpsa_scsi_dev_t *hdev;
714 unsigned long flags;
715 unsigned char sn[16];
716
717 sdev = to_scsi_device(dev);
718 h = sdev_to_hba(sdev);
719 spin_lock_irqsave(&h->lock, flags);
720 hdev = sdev->hostdata;
721 if (!hdev) {
722 spin_unlock_irqrestore(&h->lock, flags);
723 return -ENODEV;
724 }
725 memcpy(sn, hdev->device_id, sizeof(sn));
726 spin_unlock_irqrestore(&h->lock, flags);
727 return snprintf(buf, 16 * 2 + 2,
728 "%02X%02X%02X%02X%02X%02X%02X%02X"
729 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
730 sn[0], sn[1], sn[2], sn[3],
731 sn[4], sn[5], sn[6], sn[7],
732 sn[8], sn[9], sn[10], sn[11],
733 sn[12], sn[13], sn[14], sn[15]);
734 }
735
736 static ssize_t sas_address_show(struct device *dev,
737 struct device_attribute *attr, char *buf)
738 {
739 struct ctlr_info *h;
740 struct scsi_device *sdev;
741 struct hpsa_scsi_dev_t *hdev;
742 unsigned long flags;
743 u64 sas_address;
744
745 sdev = to_scsi_device(dev);
746 h = sdev_to_hba(sdev);
747 spin_lock_irqsave(&h->lock, flags);
748 hdev = sdev->hostdata;
749 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
750 spin_unlock_irqrestore(&h->lock, flags);
751 return -ENODEV;
752 }
753 sas_address = hdev->sas_address;
754 spin_unlock_irqrestore(&h->lock, flags);
755
756 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
757 }
758
759 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
760 struct device_attribute *attr, char *buf)
761 {
762 struct ctlr_info *h;
763 struct scsi_device *sdev;
764 struct hpsa_scsi_dev_t *hdev;
765 unsigned long flags;
766 int offload_enabled;
767
768 sdev = to_scsi_device(dev);
769 h = sdev_to_hba(sdev);
770 spin_lock_irqsave(&h->lock, flags);
771 hdev = sdev->hostdata;
772 if (!hdev) {
773 spin_unlock_irqrestore(&h->lock, flags);
774 return -ENODEV;
775 }
776 offload_enabled = hdev->offload_enabled;
777 spin_unlock_irqrestore(&h->lock, flags);
778 return snprintf(buf, 20, "%d\n", offload_enabled);
779 }
780
781 #define MAX_PATHS 8
782 static ssize_t path_info_show(struct device *dev,
783 struct device_attribute *attr, char *buf)
784 {
785 struct ctlr_info *h;
786 struct scsi_device *sdev;
787 struct hpsa_scsi_dev_t *hdev;
788 unsigned long flags;
789 int i;
790 int output_len = 0;
791 u8 box;
792 u8 bay;
793 u8 path_map_index = 0;
794 char *active;
795 unsigned char phys_connector[2];
796
797 sdev = to_scsi_device(dev);
798 h = sdev_to_hba(sdev);
799 spin_lock_irqsave(&h->devlock, flags);
800 hdev = sdev->hostdata;
801 if (!hdev) {
802 spin_unlock_irqrestore(&h->devlock, flags);
803 return -ENODEV;
804 }
805
806 bay = hdev->bay;
807 for (i = 0; i < MAX_PATHS; i++) {
808 path_map_index = 1<<i;
809 if (i == hdev->active_path_index)
810 active = "Active";
811 else if (hdev->path_map & path_map_index)
812 active = "Inactive";
813 else
814 continue;
815
816 output_len += scnprintf(buf + output_len,
817 PAGE_SIZE - output_len,
818 "[%d:%d:%d:%d] %20.20s ",
819 h->scsi_host->host_no,
820 hdev->bus, hdev->target, hdev->lun,
821 scsi_device_type(hdev->devtype));
822
823 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
824 output_len += scnprintf(buf + output_len,
825 PAGE_SIZE - output_len,
826 "%s\n", active);
827 continue;
828 }
829
830 box = hdev->box[i];
831 memcpy(&phys_connector, &hdev->phys_connector[i],
832 sizeof(phys_connector));
833 if (phys_connector[0] < '0')
834 phys_connector[0] = '0';
835 if (phys_connector[1] < '0')
836 phys_connector[1] = '0';
837 output_len += scnprintf(buf + output_len,
838 PAGE_SIZE - output_len,
839 "PORT: %.2s ",
840 phys_connector);
841 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
842 hdev->expose_device) {
843 if (box == 0 || box == 0xFF) {
844 output_len += scnprintf(buf + output_len,
845 PAGE_SIZE - output_len,
846 "BAY: %hhu %s\n",
847 bay, active);
848 } else {
849 output_len += scnprintf(buf + output_len,
850 PAGE_SIZE - output_len,
851 "BOX: %hhu BAY: %hhu %s\n",
852 box, bay, active);
853 }
854 } else if (box != 0 && box != 0xFF) {
855 output_len += scnprintf(buf + output_len,
856 PAGE_SIZE - output_len, "BOX: %hhu %s\n",
857 box, active);
858 } else
859 output_len += scnprintf(buf + output_len,
860 PAGE_SIZE - output_len, "%s\n", active);
861 }
862
863 spin_unlock_irqrestore(&h->devlock, flags);
864 return output_len;
865 }
866
867 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
868 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
869 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
870 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
871 static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL);
872 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
873 host_show_hp_ssd_smart_path_enabled, NULL);
874 static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL);
875 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
876 host_show_hp_ssd_smart_path_status,
877 host_store_hp_ssd_smart_path_status);
878 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
879 host_store_raid_offload_debug);
880 static DEVICE_ATTR(firmware_revision, S_IRUGO,
881 host_show_firmware_revision, NULL);
882 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
883 host_show_commands_outstanding, NULL);
884 static DEVICE_ATTR(transport_mode, S_IRUGO,
885 host_show_transport_mode, NULL);
886 static DEVICE_ATTR(resettable, S_IRUGO,
887 host_show_resettable, NULL);
888 static DEVICE_ATTR(lockup_detected, S_IRUGO,
889 host_show_lockup_detected, NULL);
890
891 static struct device_attribute *hpsa_sdev_attrs[] = {
892 &dev_attr_raid_level,
893 &dev_attr_lunid,
894 &dev_attr_unique_id,
895 &dev_attr_hp_ssd_smart_path_enabled,
896 &dev_attr_path_info,
897 &dev_attr_sas_address,
898 NULL,
899 };
900
901 static struct device_attribute *hpsa_shost_attrs[] = {
902 &dev_attr_rescan,
903 &dev_attr_firmware_revision,
904 &dev_attr_commands_outstanding,
905 &dev_attr_transport_mode,
906 &dev_attr_resettable,
907 &dev_attr_hp_ssd_smart_path_status,
908 &dev_attr_raid_offload_debug,
909 &dev_attr_lockup_detected,
910 NULL,
911 };
912
913 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \
914 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS)
915
916 static struct scsi_host_template hpsa_driver_template = {
917 .module = THIS_MODULE,
918 .name = HPSA,
919 .proc_name = HPSA,
920 .queuecommand = hpsa_scsi_queue_command,
921 .scan_start = hpsa_scan_start,
922 .scan_finished = hpsa_scan_finished,
923 .change_queue_depth = hpsa_change_queue_depth,
924 .this_id = -1,
925 .use_clustering = ENABLE_CLUSTERING,
926 .eh_abort_handler = hpsa_eh_abort_handler,
927 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
928 .ioctl = hpsa_ioctl,
929 .slave_alloc = hpsa_slave_alloc,
930 .slave_configure = hpsa_slave_configure,
931 .slave_destroy = hpsa_slave_destroy,
932 #ifdef CONFIG_COMPAT
933 .compat_ioctl = hpsa_compat_ioctl,
934 #endif
935 .sdev_attrs = hpsa_sdev_attrs,
936 .shost_attrs = hpsa_shost_attrs,
937 .max_sectors = 8192,
938 .no_write_same = 1,
939 };
940
941 static inline u32 next_command(struct ctlr_info *h, u8 q)
942 {
943 u32 a;
944 struct reply_queue_buffer *rq = &h->reply_queue[q];
945
946 if (h->transMethod & CFGTBL_Trans_io_accel1)
947 return h->access.command_completed(h, q);
948
949 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
950 return h->access.command_completed(h, q);
951
952 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
953 a = rq->head[rq->current_entry];
954 rq->current_entry++;
955 atomic_dec(&h->commands_outstanding);
956 } else {
957 a = FIFO_EMPTY;
958 }
959 /* Check for wraparound */
960 if (rq->current_entry == h->max_commands) {
961 rq->current_entry = 0;
962 rq->wraparound ^= 1;
963 }
964 return a;
965 }
966
967 /*
968 * There are some special bits in the bus address of the
969 * command that we have to set for the controller to know
970 * how to process the command:
971 *
972 * Normal performant mode:
973 * bit 0: 1 means performant mode, 0 means simple mode.
974 * bits 1-3 = block fetch table entry
975 * bits 4-6 = command type (== 0)
976 *
977 * ioaccel1 mode:
978 * bit 0 = "performant mode" bit.
979 * bits 1-3 = block fetch table entry
980 * bits 4-6 = command type (== 110)
981 * (command type is needed because ioaccel1 mode
982 * commands are submitted through the same register as normal
983 * mode commands, so this is how the controller knows whether
984 * the command is normal mode or ioaccel1 mode.)
985 *
986 * ioaccel2 mode:
987 * bit 0 = "performant mode" bit.
988 * bits 1-4 = block fetch table entry (note extra bit)
989 * bits 4-6 = not needed, because ioaccel2 mode has
990 * a separate special register for submitting commands.
991 */
992
993 /*
994 * set_performant_mode: Modify the tag for cciss performant
995 * set bit 0 for pull model, bits 3-1 for block fetch
996 * register number
997 */
998 #define DEFAULT_REPLY_QUEUE (-1)
999 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
1000 int reply_queue)
1001 {
1002 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
1003 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
1004 if (unlikely(!h->msix_vector))
1005 return;
1006 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1007 c->Header.ReplyQueue =
1008 raw_smp_processor_id() % h->nreply_queues;
1009 else
1010 c->Header.ReplyQueue = reply_queue % h->nreply_queues;
1011 }
1012 }
1013
1014 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
1015 struct CommandList *c,
1016 int reply_queue)
1017 {
1018 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1019
1020 /*
1021 * Tell the controller to post the reply to the queue for this
1022 * processor. This seems to give the best I/O throughput.
1023 */
1024 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1025 cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
1026 else
1027 cp->ReplyQueue = reply_queue % h->nreply_queues;
1028 /*
1029 * Set the bits in the address sent down to include:
1030 * - performant mode bit (bit 0)
1031 * - pull count (bits 1-3)
1032 * - command type (bits 4-6)
1033 */
1034 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1035 IOACCEL1_BUSADDR_CMDTYPE;
1036 }
1037
1038 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
1039 struct CommandList *c,
1040 int reply_queue)
1041 {
1042 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
1043 &h->ioaccel2_cmd_pool[c->cmdindex];
1044
1045 /* Tell the controller to post the reply to the queue for this
1046 * processor. This seems to give the best I/O throughput.
1047 */
1048 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1049 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1050 else
1051 cp->reply_queue = reply_queue % h->nreply_queues;
1052 /* Set the bits in the address sent down to include:
1053 * - performant mode bit not used in ioaccel mode 2
1054 * - pull count (bits 0-3)
1055 * - command type isn't needed for ioaccel2
1056 */
1057 c->busaddr |= h->ioaccel2_blockFetchTable[0];
1058 }
1059
1060 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1061 struct CommandList *c,
1062 int reply_queue)
1063 {
1064 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1065
1066 /*
1067 * Tell the controller to post the reply to the queue for this
1068 * processor. This seems to give the best I/O throughput.
1069 */
1070 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1071 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1072 else
1073 cp->reply_queue = reply_queue % h->nreply_queues;
1074 /*
1075 * Set the bits in the address sent down to include:
1076 * - performant mode bit not used in ioaccel mode 2
1077 * - pull count (bits 0-3)
1078 * - command type isn't needed for ioaccel2
1079 */
1080 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1081 }
1082
1083 static int is_firmware_flash_cmd(u8 *cdb)
1084 {
1085 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1086 }
1087
1088 /*
1089 * During firmware flash, the heartbeat register may not update as frequently
1090 * as it should. So we dial down lockup detection during firmware flash. and
1091 * dial it back up when firmware flash completes.
1092 */
1093 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1094 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1095 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1096 struct CommandList *c)
1097 {
1098 if (!is_firmware_flash_cmd(c->Request.CDB))
1099 return;
1100 atomic_inc(&h->firmware_flash_in_progress);
1101 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1102 }
1103
1104 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1105 struct CommandList *c)
1106 {
1107 if (is_firmware_flash_cmd(c->Request.CDB) &&
1108 atomic_dec_and_test(&h->firmware_flash_in_progress))
1109 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1110 }
1111
1112 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1113 struct CommandList *c, int reply_queue)
1114 {
1115 dial_down_lockup_detection_during_fw_flash(h, c);
1116 atomic_inc(&h->commands_outstanding);
1117 switch (c->cmd_type) {
1118 case CMD_IOACCEL1:
1119 set_ioaccel1_performant_mode(h, c, reply_queue);
1120 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1121 break;
1122 case CMD_IOACCEL2:
1123 set_ioaccel2_performant_mode(h, c, reply_queue);
1124 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1125 break;
1126 case IOACCEL2_TMF:
1127 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1128 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1129 break;
1130 default:
1131 set_performant_mode(h, c, reply_queue);
1132 h->access.submit_command(h, c);
1133 }
1134 }
1135
1136 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1137 {
1138 if (unlikely(hpsa_is_pending_event(c)))
1139 return finish_cmd(c);
1140
1141 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1142 }
1143
1144 static inline int is_hba_lunid(unsigned char scsi3addr[])
1145 {
1146 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1147 }
1148
1149 static inline int is_scsi_rev_5(struct ctlr_info *h)
1150 {
1151 if (!h->hba_inquiry_data)
1152 return 0;
1153 if ((h->hba_inquiry_data[2] & 0x07) == 5)
1154 return 1;
1155 return 0;
1156 }
1157
1158 static int hpsa_find_target_lun(struct ctlr_info *h,
1159 unsigned char scsi3addr[], int bus, int *target, int *lun)
1160 {
1161 /* finds an unused bus, target, lun for a new physical device
1162 * assumes h->devlock is held
1163 */
1164 int i, found = 0;
1165 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1166
1167 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1168
1169 for (i = 0; i < h->ndevices; i++) {
1170 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1171 __set_bit(h->dev[i]->target, lun_taken);
1172 }
1173
1174 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1175 if (i < HPSA_MAX_DEVICES) {
1176 /* *bus = 1; */
1177 *target = i;
1178 *lun = 0;
1179 found = 1;
1180 }
1181 return !found;
1182 }
1183
1184 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1185 struct hpsa_scsi_dev_t *dev, char *description)
1186 {
1187 #define LABEL_SIZE 25
1188 char label[LABEL_SIZE];
1189
1190 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1191 return;
1192
1193 switch (dev->devtype) {
1194 case TYPE_RAID:
1195 snprintf(label, LABEL_SIZE, "controller");
1196 break;
1197 case TYPE_ENCLOSURE:
1198 snprintf(label, LABEL_SIZE, "enclosure");
1199 break;
1200 case TYPE_DISK:
1201 case TYPE_ZBC:
1202 if (dev->external)
1203 snprintf(label, LABEL_SIZE, "external");
1204 else if (!is_logical_dev_addr_mode(dev->scsi3addr))
1205 snprintf(label, LABEL_SIZE, "%s",
1206 raid_label[PHYSICAL_DRIVE]);
1207 else
1208 snprintf(label, LABEL_SIZE, "RAID-%s",
1209 dev->raid_level > RAID_UNKNOWN ? "?" :
1210 raid_label[dev->raid_level]);
1211 break;
1212 case TYPE_ROM:
1213 snprintf(label, LABEL_SIZE, "rom");
1214 break;
1215 case TYPE_TAPE:
1216 snprintf(label, LABEL_SIZE, "tape");
1217 break;
1218 case TYPE_MEDIUM_CHANGER:
1219 snprintf(label, LABEL_SIZE, "changer");
1220 break;
1221 default:
1222 snprintf(label, LABEL_SIZE, "UNKNOWN");
1223 break;
1224 }
1225
1226 dev_printk(level, &h->pdev->dev,
1227 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
1228 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1229 description,
1230 scsi_device_type(dev->devtype),
1231 dev->vendor,
1232 dev->model,
1233 label,
1234 dev->offload_config ? '+' : '-',
1235 dev->offload_enabled ? '+' : '-',
1236 dev->expose_device);
1237 }
1238
1239 /* Add an entry into h->dev[] array. */
1240 static int hpsa_scsi_add_entry(struct ctlr_info *h,
1241 struct hpsa_scsi_dev_t *device,
1242 struct hpsa_scsi_dev_t *added[], int *nadded)
1243 {
1244 /* assumes h->devlock is held */
1245 int n = h->ndevices;
1246 int i;
1247 unsigned char addr1[8], addr2[8];
1248 struct hpsa_scsi_dev_t *sd;
1249
1250 if (n >= HPSA_MAX_DEVICES) {
1251 dev_err(&h->pdev->dev, "too many devices, some will be "
1252 "inaccessible.\n");
1253 return -1;
1254 }
1255
1256 /* physical devices do not have lun or target assigned until now. */
1257 if (device->lun != -1)
1258 /* Logical device, lun is already assigned. */
1259 goto lun_assigned;
1260
1261 /* If this device a non-zero lun of a multi-lun device
1262 * byte 4 of the 8-byte LUN addr will contain the logical
1263 * unit no, zero otherwise.
1264 */
1265 if (device->scsi3addr[4] == 0) {
1266 /* This is not a non-zero lun of a multi-lun device */
1267 if (hpsa_find_target_lun(h, device->scsi3addr,
1268 device->bus, &device->target, &device->lun) != 0)
1269 return -1;
1270 goto lun_assigned;
1271 }
1272
1273 /* This is a non-zero lun of a multi-lun device.
1274 * Search through our list and find the device which
1275 * has the same 8 byte LUN address, excepting byte 4 and 5.
1276 * Assign the same bus and target for this new LUN.
1277 * Use the logical unit number from the firmware.
1278 */
1279 memcpy(addr1, device->scsi3addr, 8);
1280 addr1[4] = 0;
1281 addr1[5] = 0;
1282 for (i = 0; i < n; i++) {
1283 sd = h->dev[i];
1284 memcpy(addr2, sd->scsi3addr, 8);
1285 addr2[4] = 0;
1286 addr2[5] = 0;
1287 /* differ only in byte 4 and 5? */
1288 if (memcmp(addr1, addr2, 8) == 0) {
1289 device->bus = sd->bus;
1290 device->target = sd->target;
1291 device->lun = device->scsi3addr[4];
1292 break;
1293 }
1294 }
1295 if (device->lun == -1) {
1296 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1297 " suspect firmware bug or unsupported hardware "
1298 "configuration.\n");
1299 return -1;
1300 }
1301
1302 lun_assigned:
1303
1304 h->dev[n] = device;
1305 h->ndevices++;
1306 added[*nadded] = device;
1307 (*nadded)++;
1308 hpsa_show_dev_msg(KERN_INFO, h, device,
1309 device->expose_device ? "added" : "masked");
1310 device->offload_to_be_enabled = device->offload_enabled;
1311 device->offload_enabled = 0;
1312 return 0;
1313 }
1314
1315 /* Update an entry in h->dev[] array. */
1316 static void hpsa_scsi_update_entry(struct ctlr_info *h,
1317 int entry, struct hpsa_scsi_dev_t *new_entry)
1318 {
1319 int offload_enabled;
1320 /* assumes h->devlock is held */
1321 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1322
1323 /* Raid level changed. */
1324 h->dev[entry]->raid_level = new_entry->raid_level;
1325
1326 /* Raid offload parameters changed. Careful about the ordering. */
1327 if (new_entry->offload_config && new_entry->offload_enabled) {
1328 /*
1329 * if drive is newly offload_enabled, we want to copy the
1330 * raid map data first. If previously offload_enabled and
1331 * offload_config were set, raid map data had better be
1332 * the same as it was before. if raid map data is changed
1333 * then it had better be the case that
1334 * h->dev[entry]->offload_enabled is currently 0.
1335 */
1336 h->dev[entry]->raid_map = new_entry->raid_map;
1337 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1338 }
1339 if (new_entry->hba_ioaccel_enabled) {
1340 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1341 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1342 }
1343 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1344 h->dev[entry]->offload_config = new_entry->offload_config;
1345 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1346 h->dev[entry]->queue_depth = new_entry->queue_depth;
1347
1348 /*
1349 * We can turn off ioaccel offload now, but need to delay turning
1350 * it on until we can update h->dev[entry]->phys_disk[], but we
1351 * can't do that until all the devices are updated.
1352 */
1353 h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
1354 if (!new_entry->offload_enabled)
1355 h->dev[entry]->offload_enabled = 0;
1356
1357 offload_enabled = h->dev[entry]->offload_enabled;
1358 h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled;
1359 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1360 h->dev[entry]->offload_enabled = offload_enabled;
1361 }
1362
1363 /* Replace an entry from h->dev[] array. */
1364 static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1365 int entry, struct hpsa_scsi_dev_t *new_entry,
1366 struct hpsa_scsi_dev_t *added[], int *nadded,
1367 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1368 {
1369 /* assumes h->devlock is held */
1370 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1371 removed[*nremoved] = h->dev[entry];
1372 (*nremoved)++;
1373
1374 /*
1375 * New physical devices won't have target/lun assigned yet
1376 * so we need to preserve the values in the slot we are replacing.
1377 */
1378 if (new_entry->target == -1) {
1379 new_entry->target = h->dev[entry]->target;
1380 new_entry->lun = h->dev[entry]->lun;
1381 }
1382
1383 h->dev[entry] = new_entry;
1384 added[*nadded] = new_entry;
1385 (*nadded)++;
1386 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1387 new_entry->offload_to_be_enabled = new_entry->offload_enabled;
1388 new_entry->offload_enabled = 0;
1389 }
1390
1391 /* Remove an entry from h->dev[] array. */
1392 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1393 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1394 {
1395 /* assumes h->devlock is held */
1396 int i;
1397 struct hpsa_scsi_dev_t *sd;
1398
1399 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1400
1401 sd = h->dev[entry];
1402 removed[*nremoved] = h->dev[entry];
1403 (*nremoved)++;
1404
1405 for (i = entry; i < h->ndevices-1; i++)
1406 h->dev[i] = h->dev[i+1];
1407 h->ndevices--;
1408 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1409 }
1410
1411 #define SCSI3ADDR_EQ(a, b) ( \
1412 (a)[7] == (b)[7] && \
1413 (a)[6] == (b)[6] && \
1414 (a)[5] == (b)[5] && \
1415 (a)[4] == (b)[4] && \
1416 (a)[3] == (b)[3] && \
1417 (a)[2] == (b)[2] && \
1418 (a)[1] == (b)[1] && \
1419 (a)[0] == (b)[0])
1420
1421 static void fixup_botched_add(struct ctlr_info *h,
1422 struct hpsa_scsi_dev_t *added)
1423 {
1424 /* called when scsi_add_device fails in order to re-adjust
1425 * h->dev[] to match the mid layer's view.
1426 */
1427 unsigned long flags;
1428 int i, j;
1429
1430 spin_lock_irqsave(&h->lock, flags);
1431 for (i = 0; i < h->ndevices; i++) {
1432 if (h->dev[i] == added) {
1433 for (j = i; j < h->ndevices-1; j++)
1434 h->dev[j] = h->dev[j+1];
1435 h->ndevices--;
1436 break;
1437 }
1438 }
1439 spin_unlock_irqrestore(&h->lock, flags);
1440 kfree(added);
1441 }
1442
1443 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1444 struct hpsa_scsi_dev_t *dev2)
1445 {
1446 /* we compare everything except lun and target as these
1447 * are not yet assigned. Compare parts likely
1448 * to differ first
1449 */
1450 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1451 sizeof(dev1->scsi3addr)) != 0)
1452 return 0;
1453 if (memcmp(dev1->device_id, dev2->device_id,
1454 sizeof(dev1->device_id)) != 0)
1455 return 0;
1456 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1457 return 0;
1458 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1459 return 0;
1460 if (dev1->devtype != dev2->devtype)
1461 return 0;
1462 if (dev1->bus != dev2->bus)
1463 return 0;
1464 return 1;
1465 }
1466
1467 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1468 struct hpsa_scsi_dev_t *dev2)
1469 {
1470 /* Device attributes that can change, but don't mean
1471 * that the device is a different device, nor that the OS
1472 * needs to be told anything about the change.
1473 */
1474 if (dev1->raid_level != dev2->raid_level)
1475 return 1;
1476 if (dev1->offload_config != dev2->offload_config)
1477 return 1;
1478 if (dev1->offload_enabled != dev2->offload_enabled)
1479 return 1;
1480 if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1481 if (dev1->queue_depth != dev2->queue_depth)
1482 return 1;
1483 return 0;
1484 }
1485
1486 /* Find needle in haystack. If exact match found, return DEVICE_SAME,
1487 * and return needle location in *index. If scsi3addr matches, but not
1488 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1489 * location in *index.
1490 * In the case of a minor device attribute change, such as RAID level, just
1491 * return DEVICE_UPDATED, along with the updated device's location in index.
1492 * If needle not found, return DEVICE_NOT_FOUND.
1493 */
1494 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1495 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1496 int *index)
1497 {
1498 int i;
1499 #define DEVICE_NOT_FOUND 0
1500 #define DEVICE_CHANGED 1
1501 #define DEVICE_SAME 2
1502 #define DEVICE_UPDATED 3
1503 if (needle == NULL)
1504 return DEVICE_NOT_FOUND;
1505
1506 for (i = 0; i < haystack_size; i++) {
1507 if (haystack[i] == NULL) /* previously removed. */
1508 continue;
1509 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1510 *index = i;
1511 if (device_is_the_same(needle, haystack[i])) {
1512 if (device_updated(needle, haystack[i]))
1513 return DEVICE_UPDATED;
1514 return DEVICE_SAME;
1515 } else {
1516 /* Keep offline devices offline */
1517 if (needle->volume_offline)
1518 return DEVICE_NOT_FOUND;
1519 return DEVICE_CHANGED;
1520 }
1521 }
1522 }
1523 *index = -1;
1524 return DEVICE_NOT_FOUND;
1525 }
1526
1527 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1528 unsigned char scsi3addr[])
1529 {
1530 struct offline_device_entry *device;
1531 unsigned long flags;
1532
1533 /* Check to see if device is already on the list */
1534 spin_lock_irqsave(&h->offline_device_lock, flags);
1535 list_for_each_entry(device, &h->offline_device_list, offline_list) {
1536 if (memcmp(device->scsi3addr, scsi3addr,
1537 sizeof(device->scsi3addr)) == 0) {
1538 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1539 return;
1540 }
1541 }
1542 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1543
1544 /* Device is not on the list, add it. */
1545 device = kmalloc(sizeof(*device), GFP_KERNEL);
1546 if (!device) {
1547 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1548 return;
1549 }
1550 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1551 spin_lock_irqsave(&h->offline_device_lock, flags);
1552 list_add_tail(&device->offline_list, &h->offline_device_list);
1553 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1554 }
1555
1556 /* Print a message explaining various offline volume states */
1557 static void hpsa_show_volume_status(struct ctlr_info *h,
1558 struct hpsa_scsi_dev_t *sd)
1559 {
1560 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1561 dev_info(&h->pdev->dev,
1562 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1563 h->scsi_host->host_no,
1564 sd->bus, sd->target, sd->lun);
1565 switch (sd->volume_offline) {
1566 case HPSA_LV_OK:
1567 break;
1568 case HPSA_LV_UNDERGOING_ERASE:
1569 dev_info(&h->pdev->dev,
1570 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1571 h->scsi_host->host_no,
1572 sd->bus, sd->target, sd->lun);
1573 break;
1574 case HPSA_LV_NOT_AVAILABLE:
1575 dev_info(&h->pdev->dev,
1576 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1577 h->scsi_host->host_no,
1578 sd->bus, sd->target, sd->lun);
1579 break;
1580 case HPSA_LV_UNDERGOING_RPI:
1581 dev_info(&h->pdev->dev,
1582 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1583 h->scsi_host->host_no,
1584 sd->bus, sd->target, sd->lun);
1585 break;
1586 case HPSA_LV_PENDING_RPI:
1587 dev_info(&h->pdev->dev,
1588 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1589 h->scsi_host->host_no,
1590 sd->bus, sd->target, sd->lun);
1591 break;
1592 case HPSA_LV_ENCRYPTED_NO_KEY:
1593 dev_info(&h->pdev->dev,
1594 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1595 h->scsi_host->host_no,
1596 sd->bus, sd->target, sd->lun);
1597 break;
1598 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1599 dev_info(&h->pdev->dev,
1600 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1601 h->scsi_host->host_no,
1602 sd->bus, sd->target, sd->lun);
1603 break;
1604 case HPSA_LV_UNDERGOING_ENCRYPTION:
1605 dev_info(&h->pdev->dev,
1606 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1607 h->scsi_host->host_no,
1608 sd->bus, sd->target, sd->lun);
1609 break;
1610 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1611 dev_info(&h->pdev->dev,
1612 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1613 h->scsi_host->host_no,
1614 sd->bus, sd->target, sd->lun);
1615 break;
1616 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1617 dev_info(&h->pdev->dev,
1618 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1619 h->scsi_host->host_no,
1620 sd->bus, sd->target, sd->lun);
1621 break;
1622 case HPSA_LV_PENDING_ENCRYPTION:
1623 dev_info(&h->pdev->dev,
1624 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1625 h->scsi_host->host_no,
1626 sd->bus, sd->target, sd->lun);
1627 break;
1628 case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1629 dev_info(&h->pdev->dev,
1630 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1631 h->scsi_host->host_no,
1632 sd->bus, sd->target, sd->lun);
1633 break;
1634 }
1635 }
1636
1637 /*
1638 * Figure the list of physical drive pointers for a logical drive with
1639 * raid offload configured.
1640 */
1641 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1642 struct hpsa_scsi_dev_t *dev[], int ndevices,
1643 struct hpsa_scsi_dev_t *logical_drive)
1644 {
1645 struct raid_map_data *map = &logical_drive->raid_map;
1646 struct raid_map_disk_data *dd = &map->data[0];
1647 int i, j;
1648 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1649 le16_to_cpu(map->metadata_disks_per_row);
1650 int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1651 le16_to_cpu(map->layout_map_count) *
1652 total_disks_per_row;
1653 int nphys_disk = le16_to_cpu(map->layout_map_count) *
1654 total_disks_per_row;
1655 int qdepth;
1656
1657 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1658 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1659
1660 logical_drive->nphysical_disks = nraid_map_entries;
1661
1662 qdepth = 0;
1663 for (i = 0; i < nraid_map_entries; i++) {
1664 logical_drive->phys_disk[i] = NULL;
1665 if (!logical_drive->offload_config)
1666 continue;
1667 for (j = 0; j < ndevices; j++) {
1668 if (dev[j] == NULL)
1669 continue;
1670 if (dev[j]->devtype != TYPE_DISK &&
1671 dev[j]->devtype != TYPE_ZBC)
1672 continue;
1673 if (is_logical_device(dev[j]))
1674 continue;
1675 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1676 continue;
1677
1678 logical_drive->phys_disk[i] = dev[j];
1679 if (i < nphys_disk)
1680 qdepth = min(h->nr_cmds, qdepth +
1681 logical_drive->phys_disk[i]->queue_depth);
1682 break;
1683 }
1684
1685 /*
1686 * This can happen if a physical drive is removed and
1687 * the logical drive is degraded. In that case, the RAID
1688 * map data will refer to a physical disk which isn't actually
1689 * present. And in that case offload_enabled should already
1690 * be 0, but we'll turn it off here just in case
1691 */
1692 if (!logical_drive->phys_disk[i]) {
1693 logical_drive->offload_enabled = 0;
1694 logical_drive->offload_to_be_enabled = 0;
1695 logical_drive->queue_depth = 8;
1696 }
1697 }
1698 if (nraid_map_entries)
1699 /*
1700 * This is correct for reads, too high for full stripe writes,
1701 * way too high for partial stripe writes
1702 */
1703 logical_drive->queue_depth = qdepth;
1704 else
1705 logical_drive->queue_depth = h->nr_cmds;
1706 }
1707
1708 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1709 struct hpsa_scsi_dev_t *dev[], int ndevices)
1710 {
1711 int i;
1712
1713 for (i = 0; i < ndevices; i++) {
1714 if (dev[i] == NULL)
1715 continue;
1716 if (dev[i]->devtype != TYPE_DISK &&
1717 dev[i]->devtype != TYPE_ZBC)
1718 continue;
1719 if (!is_logical_device(dev[i]))
1720 continue;
1721
1722 /*
1723 * If offload is currently enabled, the RAID map and
1724 * phys_disk[] assignment *better* not be changing
1725 * and since it isn't changing, we do not need to
1726 * update it.
1727 */
1728 if (dev[i]->offload_enabled)
1729 continue;
1730
1731 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1732 }
1733 }
1734
1735 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1736 {
1737 int rc = 0;
1738
1739 if (!h->scsi_host)
1740 return 1;
1741
1742 if (is_logical_device(device)) /* RAID */
1743 rc = scsi_add_device(h->scsi_host, device->bus,
1744 device->target, device->lun);
1745 else /* HBA */
1746 rc = hpsa_add_sas_device(h->sas_host, device);
1747
1748 return rc;
1749 }
1750
1751 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1752 struct hpsa_scsi_dev_t *dev)
1753 {
1754 int i;
1755 int count = 0;
1756
1757 for (i = 0; i < h->nr_cmds; i++) {
1758 struct CommandList *c = h->cmd_pool + i;
1759 int refcount = atomic_inc_return(&c->refcount);
1760
1761 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1762 dev->scsi3addr)) {
1763 unsigned long flags;
1764
1765 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
1766 if (!hpsa_is_cmd_idle(c))
1767 ++count;
1768 spin_unlock_irqrestore(&h->lock, flags);
1769 }
1770
1771 cmd_free(h, c);
1772 }
1773
1774 return count;
1775 }
1776
1777 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1778 struct hpsa_scsi_dev_t *device)
1779 {
1780 int cmds = 0;
1781 int waits = 0;
1782
1783 while (1) {
1784 cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1785 if (cmds == 0)
1786 break;
1787 if (++waits > 20)
1788 break;
1789 dev_warn(&h->pdev->dev,
1790 "%s: removing device with %d outstanding commands!\n",
1791 __func__, cmds);
1792 msleep(1000);
1793 }
1794 }
1795
1796 static void hpsa_remove_device(struct ctlr_info *h,
1797 struct hpsa_scsi_dev_t *device)
1798 {
1799 struct scsi_device *sdev = NULL;
1800
1801 if (!h->scsi_host)
1802 return;
1803
1804 if (is_logical_device(device)) { /* RAID */
1805 sdev = scsi_device_lookup(h->scsi_host, device->bus,
1806 device->target, device->lun);
1807 if (sdev) {
1808 scsi_remove_device(sdev);
1809 scsi_device_put(sdev);
1810 } else {
1811 /*
1812 * We don't expect to get here. Future commands
1813 * to this device will get a selection timeout as
1814 * if the device were gone.
1815 */
1816 hpsa_show_dev_msg(KERN_WARNING, h, device,
1817 "didn't find device for removal.");
1818 }
1819 } else { /* HBA */
1820
1821 device->removed = 1;
1822 hpsa_wait_for_outstanding_commands_for_dev(h, device);
1823
1824 hpsa_remove_sas_device(device);
1825 }
1826 }
1827
1828 static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1829 struct hpsa_scsi_dev_t *sd[], int nsds)
1830 {
1831 /* sd contains scsi3 addresses and devtypes, and inquiry
1832 * data. This function takes what's in sd to be the current
1833 * reality and updates h->dev[] to reflect that reality.
1834 */
1835 int i, entry, device_change, changes = 0;
1836 struct hpsa_scsi_dev_t *csd;
1837 unsigned long flags;
1838 struct hpsa_scsi_dev_t **added, **removed;
1839 int nadded, nremoved;
1840
1841 /*
1842 * A reset can cause a device status to change
1843 * re-schedule the scan to see what happened.
1844 */
1845 if (h->reset_in_progress) {
1846 h->drv_req_rescan = 1;
1847 return;
1848 }
1849
1850 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1851 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1852
1853 if (!added || !removed) {
1854 dev_warn(&h->pdev->dev, "out of memory in "
1855 "adjust_hpsa_scsi_table\n");
1856 goto free_and_out;
1857 }
1858
1859 spin_lock_irqsave(&h->devlock, flags);
1860
1861 /* find any devices in h->dev[] that are not in
1862 * sd[] and remove them from h->dev[], and for any
1863 * devices which have changed, remove the old device
1864 * info and add the new device info.
1865 * If minor device attributes change, just update
1866 * the existing device structure.
1867 */
1868 i = 0;
1869 nremoved = 0;
1870 nadded = 0;
1871 while (i < h->ndevices) {
1872 csd = h->dev[i];
1873 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1874 if (device_change == DEVICE_NOT_FOUND) {
1875 changes++;
1876 hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1877 continue; /* remove ^^^, hence i not incremented */
1878 } else if (device_change == DEVICE_CHANGED) {
1879 changes++;
1880 hpsa_scsi_replace_entry(h, i, sd[entry],
1881 added, &nadded, removed, &nremoved);
1882 /* Set it to NULL to prevent it from being freed
1883 * at the bottom of hpsa_update_scsi_devices()
1884 */
1885 sd[entry] = NULL;
1886 } else if (device_change == DEVICE_UPDATED) {
1887 hpsa_scsi_update_entry(h, i, sd[entry]);
1888 }
1889 i++;
1890 }
1891
1892 /* Now, make sure every device listed in sd[] is also
1893 * listed in h->dev[], adding them if they aren't found
1894 */
1895
1896 for (i = 0; i < nsds; i++) {
1897 if (!sd[i]) /* if already added above. */
1898 continue;
1899
1900 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1901 * as the SCSI mid-layer does not handle such devices well.
1902 * It relentlessly loops sending TUR at 3Hz, then READ(10)
1903 * at 160Hz, and prevents the system from coming up.
1904 */
1905 if (sd[i]->volume_offline) {
1906 hpsa_show_volume_status(h, sd[i]);
1907 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1908 continue;
1909 }
1910
1911 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1912 h->ndevices, &entry);
1913 if (device_change == DEVICE_NOT_FOUND) {
1914 changes++;
1915 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1916 break;
1917 sd[i] = NULL; /* prevent from being freed later. */
1918 } else if (device_change == DEVICE_CHANGED) {
1919 /* should never happen... */
1920 changes++;
1921 dev_warn(&h->pdev->dev,
1922 "device unexpectedly changed.\n");
1923 /* but if it does happen, we just ignore that device */
1924 }
1925 }
1926 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
1927
1928 /* Now that h->dev[]->phys_disk[] is coherent, we can enable
1929 * any logical drives that need it enabled.
1930 */
1931 for (i = 0; i < h->ndevices; i++) {
1932 if (h->dev[i] == NULL)
1933 continue;
1934 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
1935 }
1936
1937 spin_unlock_irqrestore(&h->devlock, flags);
1938
1939 /* Monitor devices which are in one of several NOT READY states to be
1940 * brought online later. This must be done without holding h->devlock,
1941 * so don't touch h->dev[]
1942 */
1943 for (i = 0; i < nsds; i++) {
1944 if (!sd[i]) /* if already added above. */
1945 continue;
1946 if (sd[i]->volume_offline)
1947 hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1948 }
1949
1950 /* Don't notify scsi mid layer of any changes the first time through
1951 * (or if there are no changes) scsi_scan_host will do it later the
1952 * first time through.
1953 */
1954 if (!changes)
1955 goto free_and_out;
1956
1957 /* Notify scsi mid layer of any removed devices */
1958 for (i = 0; i < nremoved; i++) {
1959 if (removed[i] == NULL)
1960 continue;
1961 if (removed[i]->expose_device)
1962 hpsa_remove_device(h, removed[i]);
1963 kfree(removed[i]);
1964 removed[i] = NULL;
1965 }
1966
1967 /* Notify scsi mid layer of any added devices */
1968 for (i = 0; i < nadded; i++) {
1969 int rc = 0;
1970
1971 if (added[i] == NULL)
1972 continue;
1973 if (!(added[i]->expose_device))
1974 continue;
1975 rc = hpsa_add_device(h, added[i]);
1976 if (!rc)
1977 continue;
1978 dev_warn(&h->pdev->dev,
1979 "addition failed %d, device not added.", rc);
1980 /* now we have to remove it from h->dev,
1981 * since it didn't get added to scsi mid layer
1982 */
1983 fixup_botched_add(h, added[i]);
1984 h->drv_req_rescan = 1;
1985 }
1986
1987 free_and_out:
1988 kfree(added);
1989 kfree(removed);
1990 }
1991
1992 /*
1993 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1994 * Assume's h->devlock is held.
1995 */
1996 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1997 int bus, int target, int lun)
1998 {
1999 int i;
2000 struct hpsa_scsi_dev_t *sd;
2001
2002 for (i = 0; i < h->ndevices; i++) {
2003 sd = h->dev[i];
2004 if (sd->bus == bus && sd->target == target && sd->lun == lun)
2005 return sd;
2006 }
2007 return NULL;
2008 }
2009
2010 static int hpsa_slave_alloc(struct scsi_device *sdev)
2011 {
2012 struct hpsa_scsi_dev_t *sd = NULL;
2013 unsigned long flags;
2014 struct ctlr_info *h;
2015
2016 h = sdev_to_hba(sdev);
2017 spin_lock_irqsave(&h->devlock, flags);
2018 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2019 struct scsi_target *starget;
2020 struct sas_rphy *rphy;
2021
2022 starget = scsi_target(sdev);
2023 rphy = target_to_rphy(starget);
2024 sd = hpsa_find_device_by_sas_rphy(h, rphy);
2025 if (sd) {
2026 sd->target = sdev_id(sdev);
2027 sd->lun = sdev->lun;
2028 }
2029 }
2030 if (!sd)
2031 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2032 sdev_id(sdev), sdev->lun);
2033
2034 if (sd && sd->expose_device) {
2035 atomic_set(&sd->ioaccel_cmds_out, 0);
2036 sdev->hostdata = sd;
2037 } else
2038 sdev->hostdata = NULL;
2039 spin_unlock_irqrestore(&h->devlock, flags);
2040 return 0;
2041 }
2042
2043 /* configure scsi device based on internal per-device structure */
2044 static int hpsa_slave_configure(struct scsi_device *sdev)
2045 {
2046 struct hpsa_scsi_dev_t *sd;
2047 int queue_depth;
2048
2049 sd = sdev->hostdata;
2050 sdev->no_uld_attach = !sd || !sd->expose_device;
2051
2052 if (sd)
2053 queue_depth = sd->queue_depth != 0 ?
2054 sd->queue_depth : sdev->host->can_queue;
2055 else
2056 queue_depth = sdev->host->can_queue;
2057
2058 scsi_change_queue_depth(sdev, queue_depth);
2059
2060 return 0;
2061 }
2062
2063 static void hpsa_slave_destroy(struct scsi_device *sdev)
2064 {
2065 /* nothing to do. */
2066 }
2067
2068 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2069 {
2070 int i;
2071
2072 if (!h->ioaccel2_cmd_sg_list)
2073 return;
2074 for (i = 0; i < h->nr_cmds; i++) {
2075 kfree(h->ioaccel2_cmd_sg_list[i]);
2076 h->ioaccel2_cmd_sg_list[i] = NULL;
2077 }
2078 kfree(h->ioaccel2_cmd_sg_list);
2079 h->ioaccel2_cmd_sg_list = NULL;
2080 }
2081
2082 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2083 {
2084 int i;
2085
2086 if (h->chainsize <= 0)
2087 return 0;
2088
2089 h->ioaccel2_cmd_sg_list =
2090 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds,
2091 GFP_KERNEL);
2092 if (!h->ioaccel2_cmd_sg_list)
2093 return -ENOMEM;
2094 for (i = 0; i < h->nr_cmds; i++) {
2095 h->ioaccel2_cmd_sg_list[i] =
2096 kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) *
2097 h->maxsgentries, GFP_KERNEL);
2098 if (!h->ioaccel2_cmd_sg_list[i])
2099 goto clean;
2100 }
2101 return 0;
2102
2103 clean:
2104 hpsa_free_ioaccel2_sg_chain_blocks(h);
2105 return -ENOMEM;
2106 }
2107
2108 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
2109 {
2110 int i;
2111
2112 if (!h->cmd_sg_list)
2113 return;
2114 for (i = 0; i < h->nr_cmds; i++) {
2115 kfree(h->cmd_sg_list[i]);
2116 h->cmd_sg_list[i] = NULL;
2117 }
2118 kfree(h->cmd_sg_list);
2119 h->cmd_sg_list = NULL;
2120 }
2121
2122 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
2123 {
2124 int i;
2125
2126 if (h->chainsize <= 0)
2127 return 0;
2128
2129 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
2130 GFP_KERNEL);
2131 if (!h->cmd_sg_list) {
2132 dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
2133 return -ENOMEM;
2134 }
2135 for (i = 0; i < h->nr_cmds; i++) {
2136 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
2137 h->chainsize, GFP_KERNEL);
2138 if (!h->cmd_sg_list[i]) {
2139 dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
2140 goto clean;
2141 }
2142 }
2143 return 0;
2144
2145 clean:
2146 hpsa_free_sg_chain_blocks(h);
2147 return -ENOMEM;
2148 }
2149
2150 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2151 struct io_accel2_cmd *cp, struct CommandList *c)
2152 {
2153 struct ioaccel2_sg_element *chain_block;
2154 u64 temp64;
2155 u32 chain_size;
2156
2157 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2158 chain_size = le32_to_cpu(cp->sg[0].length);
2159 temp64 = pci_map_single(h->pdev, chain_block, chain_size,
2160 PCI_DMA_TODEVICE);
2161 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2162 /* prevent subsequent unmapping */
2163 cp->sg->address = 0;
2164 return -1;
2165 }
2166 cp->sg->address = cpu_to_le64(temp64);
2167 return 0;
2168 }
2169
2170 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2171 struct io_accel2_cmd *cp)
2172 {
2173 struct ioaccel2_sg_element *chain_sg;
2174 u64 temp64;
2175 u32 chain_size;
2176
2177 chain_sg = cp->sg;
2178 temp64 = le64_to_cpu(chain_sg->address);
2179 chain_size = le32_to_cpu(cp->sg[0].length);
2180 pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
2181 }
2182
2183 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
2184 struct CommandList *c)
2185 {
2186 struct SGDescriptor *chain_sg, *chain_block;
2187 u64 temp64;
2188 u32 chain_len;
2189
2190 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2191 chain_block = h->cmd_sg_list[c->cmdindex];
2192 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2193 chain_len = sizeof(*chain_sg) *
2194 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2195 chain_sg->Len = cpu_to_le32(chain_len);
2196 temp64 = pci_map_single(h->pdev, chain_block, chain_len,
2197 PCI_DMA_TODEVICE);
2198 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2199 /* prevent subsequent unmapping */
2200 chain_sg->Addr = cpu_to_le64(0);
2201 return -1;
2202 }
2203 chain_sg->Addr = cpu_to_le64(temp64);
2204 return 0;
2205 }
2206
2207 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2208 struct CommandList *c)
2209 {
2210 struct SGDescriptor *chain_sg;
2211
2212 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2213 return;
2214
2215 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2216 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
2217 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
2218 }
2219
2220
2221 /* Decode the various types of errors on ioaccel2 path.
2222 * Return 1 for any error that should generate a RAID path retry.
2223 * Return 0 for errors that don't require a RAID path retry.
2224 */
2225 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2226 struct CommandList *c,
2227 struct scsi_cmnd *cmd,
2228 struct io_accel2_cmd *c2,
2229 struct hpsa_scsi_dev_t *dev)
2230 {
2231 int data_len;
2232 int retry = 0;
2233 u32 ioaccel2_resid = 0;
2234
2235 switch (c2->error_data.serv_response) {
2236 case IOACCEL2_SERV_RESPONSE_COMPLETE:
2237 switch (c2->error_data.status) {
2238 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2239 if (cmd)
2240 cmd->result = 0;
2241 break;
2242 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2243 cmd->result |= SAM_STAT_CHECK_CONDITION;
2244 if (c2->error_data.data_present !=
2245 IOACCEL2_SENSE_DATA_PRESENT) {
2246 memset(cmd->sense_buffer, 0,
2247 SCSI_SENSE_BUFFERSIZE);
2248 break;
2249 }
2250 /* copy the sense data */
2251 data_len = c2->error_data.sense_data_len;
2252 if (data_len > SCSI_SENSE_BUFFERSIZE)
2253 data_len = SCSI_SENSE_BUFFERSIZE;
2254 if (data_len > sizeof(c2->error_data.sense_data_buff))
2255 data_len =
2256 sizeof(c2->error_data.sense_data_buff);
2257 memcpy(cmd->sense_buffer,
2258 c2->error_data.sense_data_buff, data_len);
2259 retry = 1;
2260 break;
2261 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2262 retry = 1;
2263 break;
2264 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2265 retry = 1;
2266 break;
2267 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2268 retry = 1;
2269 break;
2270 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2271 retry = 1;
2272 break;
2273 default:
2274 retry = 1;
2275 break;
2276 }
2277 break;
2278 case IOACCEL2_SERV_RESPONSE_FAILURE:
2279 switch (c2->error_data.status) {
2280 case IOACCEL2_STATUS_SR_IO_ERROR:
2281 case IOACCEL2_STATUS_SR_IO_ABORTED:
2282 case IOACCEL2_STATUS_SR_OVERRUN:
2283 retry = 1;
2284 break;
2285 case IOACCEL2_STATUS_SR_UNDERRUN:
2286 cmd->result = (DID_OK << 16); /* host byte */
2287 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2288 ioaccel2_resid = get_unaligned_le32(
2289 &c2->error_data.resid_cnt[0]);
2290 scsi_set_resid(cmd, ioaccel2_resid);
2291 break;
2292 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2293 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2294 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2295 /*
2296 * Did an HBA disk disappear? We will eventually
2297 * get a state change event from the controller but
2298 * in the meantime, we need to tell the OS that the
2299 * HBA disk is no longer there and stop I/O
2300 * from going down. This allows the potential re-insert
2301 * of the disk to get the same device node.
2302 */
2303 if (dev->physical_device && dev->expose_device) {
2304 cmd->result = DID_NO_CONNECT << 16;
2305 dev->removed = 1;
2306 h->drv_req_rescan = 1;
2307 dev_warn(&h->pdev->dev,
2308 "%s: device is gone!\n", __func__);
2309 } else
2310 /*
2311 * Retry by sending down the RAID path.
2312 * We will get an event from ctlr to
2313 * trigger rescan regardless.
2314 */
2315 retry = 1;
2316 break;
2317 default:
2318 retry = 1;
2319 }
2320 break;
2321 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2322 break;
2323 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2324 break;
2325 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2326 retry = 1;
2327 break;
2328 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2329 break;
2330 default:
2331 retry = 1;
2332 break;
2333 }
2334
2335 return retry; /* retry on raid path? */
2336 }
2337
2338 static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2339 struct CommandList *c)
2340 {
2341 bool do_wake = false;
2342
2343 /*
2344 * Prevent the following race in the abort handler:
2345 *
2346 * 1. LLD is requested to abort a SCSI command
2347 * 2. The SCSI command completes
2348 * 3. The struct CommandList associated with step 2 is made available
2349 * 4. New I/O request to LLD to another LUN re-uses struct CommandList
2350 * 5. Abort handler follows scsi_cmnd->host_scribble and
2351 * finds struct CommandList and tries to aborts it
2352 * Now we have aborted the wrong command.
2353 *
2354 * Reset c->scsi_cmd here so that the abort or reset handler will know
2355 * this command has completed. Then, check to see if the handler is
2356 * waiting for this command, and, if so, wake it.
2357 */
2358 c->scsi_cmd = SCSI_CMD_IDLE;
2359 mb(); /* Declare command idle before checking for pending events. */
2360 if (c->abort_pending) {
2361 do_wake = true;
2362 c->abort_pending = false;
2363 }
2364 if (c->reset_pending) {
2365 unsigned long flags;
2366 struct hpsa_scsi_dev_t *dev;
2367
2368 /*
2369 * There appears to be a reset pending; lock the lock and
2370 * reconfirm. If so, then decrement the count of outstanding
2371 * commands and wake the reset command if this is the last one.
2372 */
2373 spin_lock_irqsave(&h->lock, flags);
2374 dev = c->reset_pending; /* Re-fetch under the lock. */
2375 if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2376 do_wake = true;
2377 c->reset_pending = NULL;
2378 spin_unlock_irqrestore(&h->lock, flags);
2379 }
2380
2381 if (do_wake)
2382 wake_up_all(&h->event_sync_wait_queue);
2383 }
2384
2385 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2386 struct CommandList *c)
2387 {
2388 hpsa_cmd_resolve_events(h, c);
2389 cmd_tagged_free(h, c);
2390 }
2391
2392 static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2393 struct CommandList *c, struct scsi_cmnd *cmd)
2394 {
2395 hpsa_cmd_resolve_and_free(h, c);
2396 if (cmd && cmd->scsi_done)
2397 cmd->scsi_done(cmd);
2398 }
2399
2400 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2401 {
2402 INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2403 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2404 }
2405
2406 static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd)
2407 {
2408 cmd->result = DID_ABORT << 16;
2409 }
2410
2411 static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c,
2412 struct scsi_cmnd *cmd)
2413 {
2414 hpsa_set_scsi_cmd_aborted(cmd);
2415 dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
2416 c->Request.CDB, c->err_info->ScsiStatus);
2417 hpsa_cmd_resolve_and_free(h, c);
2418 }
2419
2420 static void process_ioaccel2_completion(struct ctlr_info *h,
2421 struct CommandList *c, struct scsi_cmnd *cmd,
2422 struct hpsa_scsi_dev_t *dev)
2423 {
2424 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2425
2426 /* check for good status */
2427 if (likely(c2->error_data.serv_response == 0 &&
2428 c2->error_data.status == 0)) {
2429 cmd->result = 0;
2430 return hpsa_cmd_free_and_done(h, c, cmd);
2431 }
2432
2433 /*
2434 * Any RAID offload error results in retry which will use
2435 * the normal I/O path so the controller can handle whatever's
2436 * wrong.
2437 */
2438 if (is_logical_device(dev) &&
2439 c2->error_data.serv_response ==
2440 IOACCEL2_SERV_RESPONSE_FAILURE) {
2441 if (c2->error_data.status ==
2442 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
2443 dev->offload_enabled = 0;
2444 dev->offload_to_be_enabled = 0;
2445 }
2446
2447 return hpsa_retry_cmd(h, c);
2448 }
2449
2450 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
2451 return hpsa_retry_cmd(h, c);
2452
2453 return hpsa_cmd_free_and_done(h, c, cmd);
2454 }
2455
2456 /* Returns 0 on success, < 0 otherwise. */
2457 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2458 struct CommandList *cp)
2459 {
2460 u8 tmf_status = cp->err_info->ScsiStatus;
2461
2462 switch (tmf_status) {
2463 case CISS_TMF_COMPLETE:
2464 /*
2465 * CISS_TMF_COMPLETE never happens, instead,
2466 * ei->CommandStatus == 0 for this case.
2467 */
2468 case CISS_TMF_SUCCESS:
2469 return 0;
2470 case CISS_TMF_INVALID_FRAME:
2471 case CISS_TMF_NOT_SUPPORTED:
2472 case CISS_TMF_FAILED:
2473 case CISS_TMF_WRONG_LUN:
2474 case CISS_TMF_OVERLAPPED_TAG:
2475 break;
2476 default:
2477 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2478 tmf_status);
2479 break;
2480 }
2481 return -tmf_status;
2482 }
2483
2484 static void complete_scsi_command(struct CommandList *cp)
2485 {
2486 struct scsi_cmnd *cmd;
2487 struct ctlr_info *h;
2488 struct ErrorInfo *ei;
2489 struct hpsa_scsi_dev_t *dev;
2490 struct io_accel2_cmd *c2;
2491
2492 u8 sense_key;
2493 u8 asc; /* additional sense code */
2494 u8 ascq; /* additional sense code qualifier */
2495 unsigned long sense_data_size;
2496
2497 ei = cp->err_info;
2498 cmd = cp->scsi_cmd;
2499 h = cp->h;
2500
2501 if (!cmd->device) {
2502 cmd->result = DID_NO_CONNECT << 16;
2503 return hpsa_cmd_free_and_done(h, cp, cmd);
2504 }
2505
2506 dev = cmd->device->hostdata;
2507 if (!dev) {
2508 cmd->result = DID_NO_CONNECT << 16;
2509 return hpsa_cmd_free_and_done(h, cp, cmd);
2510 }
2511 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2512
2513 scsi_dma_unmap(cmd); /* undo the DMA mappings */
2514 if ((cp->cmd_type == CMD_SCSI) &&
2515 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2516 hpsa_unmap_sg_chain_block(h, cp);
2517
2518 if ((cp->cmd_type == CMD_IOACCEL2) &&
2519 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2520 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2521
2522 cmd->result = (DID_OK << 16); /* host byte */
2523 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2524
2525 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2526 if (dev->physical_device && dev->expose_device &&
2527 dev->removed) {
2528 cmd->result = DID_NO_CONNECT << 16;
2529 return hpsa_cmd_free_and_done(h, cp, cmd);
2530 }
2531 if (likely(cp->phys_disk != NULL))
2532 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2533 }
2534
2535 /*
2536 * We check for lockup status here as it may be set for
2537 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2538 * fail_all_oustanding_cmds()
2539 */
2540 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2541 /* DID_NO_CONNECT will prevent a retry */
2542 cmd->result = DID_NO_CONNECT << 16;
2543 return hpsa_cmd_free_and_done(h, cp, cmd);
2544 }
2545
2546 if ((unlikely(hpsa_is_pending_event(cp)))) {
2547 if (cp->reset_pending)
2548 return hpsa_cmd_resolve_and_free(h, cp);
2549 if (cp->abort_pending)
2550 return hpsa_cmd_abort_and_free(h, cp, cmd);
2551 }
2552
2553 if (cp->cmd_type == CMD_IOACCEL2)
2554 return process_ioaccel2_completion(h, cp, cmd, dev);
2555
2556 scsi_set_resid(cmd, ei->ResidualCnt);
2557 if (ei->CommandStatus == 0)
2558 return hpsa_cmd_free_and_done(h, cp, cmd);
2559
2560 /* For I/O accelerator commands, copy over some fields to the normal
2561 * CISS header used below for error handling.
2562 */
2563 if (cp->cmd_type == CMD_IOACCEL1) {
2564 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2565 cp->Header.SGList = scsi_sg_count(cmd);
2566 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2567 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2568 IOACCEL1_IOFLAGS_CDBLEN_MASK;
2569 cp->Header.tag = c->tag;
2570 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2571 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2572
2573 /* Any RAID offload error results in retry which will use
2574 * the normal I/O path so the controller can handle whatever's
2575 * wrong.
2576 */
2577 if (is_logical_device(dev)) {
2578 if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2579 dev->offload_enabled = 0;
2580 return hpsa_retry_cmd(h, cp);
2581 }
2582 }
2583
2584 /* an error has occurred */
2585 switch (ei->CommandStatus) {
2586
2587 case CMD_TARGET_STATUS:
2588 cmd->result |= ei->ScsiStatus;
2589 /* copy the sense data */
2590 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2591 sense_data_size = SCSI_SENSE_BUFFERSIZE;
2592 else
2593 sense_data_size = sizeof(ei->SenseInfo);
2594 if (ei->SenseLen < sense_data_size)
2595 sense_data_size = ei->SenseLen;
2596 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2597 if (ei->ScsiStatus)
2598 decode_sense_data(ei->SenseInfo, sense_data_size,
2599 &sense_key, &asc, &ascq);
2600 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2601 if (sense_key == ABORTED_COMMAND) {
2602 cmd->result |= DID_SOFT_ERROR << 16;
2603 break;
2604 }
2605 break;
2606 }
2607 /* Problem was not a check condition
2608 * Pass it up to the upper layers...
2609 */
2610 if (ei->ScsiStatus) {
2611 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2612 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2613 "Returning result: 0x%x\n",
2614 cp, ei->ScsiStatus,
2615 sense_key, asc, ascq,
2616 cmd->result);
2617 } else { /* scsi status is zero??? How??? */
2618 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2619 "Returning no connection.\n", cp),
2620
2621 /* Ordinarily, this case should never happen,
2622 * but there is a bug in some released firmware
2623 * revisions that allows it to happen if, for
2624 * example, a 4100 backplane loses power and
2625 * the tape drive is in it. We assume that
2626 * it's a fatal error of some kind because we
2627 * can't show that it wasn't. We will make it
2628 * look like selection timeout since that is
2629 * the most common reason for this to occur,
2630 * and it's severe enough.
2631 */
2632
2633 cmd->result = DID_NO_CONNECT << 16;
2634 }
2635 break;
2636
2637 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2638 break;
2639 case CMD_DATA_OVERRUN:
2640 dev_warn(&h->pdev->dev,
2641 "CDB %16phN data overrun\n", cp->Request.CDB);
2642 break;
2643 case CMD_INVALID: {
2644 /* print_bytes(cp, sizeof(*cp), 1, 0);
2645 print_cmd(cp); */
2646 /* We get CMD_INVALID if you address a non-existent device
2647 * instead of a selection timeout (no response). You will
2648 * see this if you yank out a drive, then try to access it.
2649 * This is kind of a shame because it means that any other
2650 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2651 * missing target. */
2652 cmd->result = DID_NO_CONNECT << 16;
2653 }
2654 break;
2655 case CMD_PROTOCOL_ERR:
2656 cmd->result = DID_ERROR << 16;
2657 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2658 cp->Request.CDB);
2659 break;
2660 case CMD_HARDWARE_ERR:
2661 cmd->result = DID_ERROR << 16;
2662 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2663 cp->Request.CDB);
2664 break;
2665 case CMD_CONNECTION_LOST:
2666 cmd->result = DID_ERROR << 16;
2667 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2668 cp->Request.CDB);
2669 break;
2670 case CMD_ABORTED:
2671 /* Return now to avoid calling scsi_done(). */
2672 return hpsa_cmd_abort_and_free(h, cp, cmd);
2673 case CMD_ABORT_FAILED:
2674 cmd->result = DID_ERROR << 16;
2675 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2676 cp->Request.CDB);
2677 break;
2678 case CMD_UNSOLICITED_ABORT:
2679 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2680 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2681 cp->Request.CDB);
2682 break;
2683 case CMD_TIMEOUT:
2684 cmd->result = DID_TIME_OUT << 16;
2685 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2686 cp->Request.CDB);
2687 break;
2688 case CMD_UNABORTABLE:
2689 cmd->result = DID_ERROR << 16;
2690 dev_warn(&h->pdev->dev, "Command unabortable\n");
2691 break;
2692 case CMD_TMF_STATUS:
2693 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2694 cmd->result = DID_ERROR << 16;
2695 break;
2696 case CMD_IOACCEL_DISABLED:
2697 /* This only handles the direct pass-through case since RAID
2698 * offload is handled above. Just attempt a retry.
2699 */
2700 cmd->result = DID_SOFT_ERROR << 16;
2701 dev_warn(&h->pdev->dev,
2702 "cp %p had HP SSD Smart Path error\n", cp);
2703 break;
2704 default:
2705 cmd->result = DID_ERROR << 16;
2706 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2707 cp, ei->CommandStatus);
2708 }
2709
2710 return hpsa_cmd_free_and_done(h, cp, cmd);
2711 }
2712
2713 static void hpsa_pci_unmap(struct pci_dev *pdev,
2714 struct CommandList *c, int sg_used, int data_direction)
2715 {
2716 int i;
2717
2718 for (i = 0; i < sg_used; i++)
2719 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2720 le32_to_cpu(c->SG[i].Len),
2721 data_direction);
2722 }
2723
2724 static int hpsa_map_one(struct pci_dev *pdev,
2725 struct CommandList *cp,
2726 unsigned char *buf,
2727 size_t buflen,
2728 int data_direction)
2729 {
2730 u64 addr64;
2731
2732 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2733 cp->Header.SGList = 0;
2734 cp->Header.SGTotal = cpu_to_le16(0);
2735 return 0;
2736 }
2737
2738 addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2739 if (dma_mapping_error(&pdev->dev, addr64)) {
2740 /* Prevent subsequent unmap of something never mapped */
2741 cp->Header.SGList = 0;
2742 cp->Header.SGTotal = cpu_to_le16(0);
2743 return -1;
2744 }
2745 cp->SG[0].Addr = cpu_to_le64(addr64);
2746 cp->SG[0].Len = cpu_to_le32(buflen);
2747 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2748 cp->Header.SGList = 1; /* no. SGs contig in this cmd */
2749 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2750 return 0;
2751 }
2752
2753 #define NO_TIMEOUT ((unsigned long) -1)
2754 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2755 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2756 struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2757 {
2758 DECLARE_COMPLETION_ONSTACK(wait);
2759
2760 c->waiting = &wait;
2761 __enqueue_cmd_and_start_io(h, c, reply_queue);
2762 if (timeout_msecs == NO_TIMEOUT) {
2763 /* TODO: get rid of this no-timeout thing */
2764 wait_for_completion_io(&wait);
2765 return IO_OK;
2766 }
2767 if (!wait_for_completion_io_timeout(&wait,
2768 msecs_to_jiffies(timeout_msecs))) {
2769 dev_warn(&h->pdev->dev, "Command timed out.\n");
2770 return -ETIMEDOUT;
2771 }
2772 return IO_OK;
2773 }
2774
2775 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2776 int reply_queue, unsigned long timeout_msecs)
2777 {
2778 if (unlikely(lockup_detected(h))) {
2779 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2780 return IO_OK;
2781 }
2782 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2783 }
2784
2785 static u32 lockup_detected(struct ctlr_info *h)
2786 {
2787 int cpu;
2788 u32 rc, *lockup_detected;
2789
2790 cpu = get_cpu();
2791 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2792 rc = *lockup_detected;
2793 put_cpu();
2794 return rc;
2795 }
2796
2797 #define MAX_DRIVER_CMD_RETRIES 25
2798 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2799 struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2800 {
2801 int backoff_time = 10, retry_count = 0;
2802 int rc;
2803
2804 do {
2805 memset(c->err_info, 0, sizeof(*c->err_info));
2806 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2807 timeout_msecs);
2808 if (rc)
2809 break;
2810 retry_count++;
2811 if (retry_count > 3) {
2812 msleep(backoff_time);
2813 if (backoff_time < 1000)
2814 backoff_time *= 2;
2815 }
2816 } while ((check_for_unit_attention(h, c) ||
2817 check_for_busy(h, c)) &&
2818 retry_count <= MAX_DRIVER_CMD_RETRIES);
2819 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2820 if (retry_count > MAX_DRIVER_CMD_RETRIES)
2821 rc = -EIO;
2822 return rc;
2823 }
2824
2825 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2826 struct CommandList *c)
2827 {
2828 const u8 *cdb = c->Request.CDB;
2829 const u8 *lun = c->Header.LUN.LunAddrBytes;
2830
2831 dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2832 " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2833 txt, lun[0], lun[1], lun[2], lun[3],
2834 lun[4], lun[5], lun[6], lun[7],
2835 cdb[0], cdb[1], cdb[2], cdb[3],
2836 cdb[4], cdb[5], cdb[6], cdb[7],
2837 cdb[8], cdb[9], cdb[10], cdb[11],
2838 cdb[12], cdb[13], cdb[14], cdb[15]);
2839 }
2840
2841 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2842 struct CommandList *cp)
2843 {
2844 const struct ErrorInfo *ei = cp->err_info;
2845 struct device *d = &cp->h->pdev->dev;
2846 u8 sense_key, asc, ascq;
2847 int sense_len;
2848
2849 switch (ei->CommandStatus) {
2850 case CMD_TARGET_STATUS:
2851 if (ei->SenseLen > sizeof(ei->SenseInfo))
2852 sense_len = sizeof(ei->SenseInfo);
2853 else
2854 sense_len = ei->SenseLen;
2855 decode_sense_data(ei->SenseInfo, sense_len,
2856 &sense_key, &asc, &ascq);
2857 hpsa_print_cmd(h, "SCSI status", cp);
2858 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2859 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2860 sense_key, asc, ascq);
2861 else
2862 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2863 if (ei->ScsiStatus == 0)
2864 dev_warn(d, "SCSI status is abnormally zero. "
2865 "(probably indicates selection timeout "
2866 "reported incorrectly due to a known "
2867 "firmware bug, circa July, 2001.)\n");
2868 break;
2869 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2870 break;
2871 case CMD_DATA_OVERRUN:
2872 hpsa_print_cmd(h, "overrun condition", cp);
2873 break;
2874 case CMD_INVALID: {
2875 /* controller unfortunately reports SCSI passthru's
2876 * to non-existent targets as invalid commands.
2877 */
2878 hpsa_print_cmd(h, "invalid command", cp);
2879 dev_warn(d, "probably means device no longer present\n");
2880 }
2881 break;
2882 case CMD_PROTOCOL_ERR:
2883 hpsa_print_cmd(h, "protocol error", cp);
2884 break;
2885 case CMD_HARDWARE_ERR:
2886 hpsa_print_cmd(h, "hardware error", cp);
2887 break;
2888 case CMD_CONNECTION_LOST:
2889 hpsa_print_cmd(h, "connection lost", cp);
2890 break;
2891 case CMD_ABORTED:
2892 hpsa_print_cmd(h, "aborted", cp);
2893 break;
2894 case CMD_ABORT_FAILED:
2895 hpsa_print_cmd(h, "abort failed", cp);
2896 break;
2897 case CMD_UNSOLICITED_ABORT:
2898 hpsa_print_cmd(h, "unsolicited abort", cp);
2899 break;
2900 case CMD_TIMEOUT:
2901 hpsa_print_cmd(h, "timed out", cp);
2902 break;
2903 case CMD_UNABORTABLE:
2904 hpsa_print_cmd(h, "unabortable", cp);
2905 break;
2906 case CMD_CTLR_LOCKUP:
2907 hpsa_print_cmd(h, "controller lockup detected", cp);
2908 break;
2909 default:
2910 hpsa_print_cmd(h, "unknown status", cp);
2911 dev_warn(d, "Unknown command status %x\n",
2912 ei->CommandStatus);
2913 }
2914 }
2915
2916 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2917 u16 page, unsigned char *buf,
2918 unsigned char bufsize)
2919 {
2920 int rc = IO_OK;
2921 struct CommandList *c;
2922 struct ErrorInfo *ei;
2923
2924 c = cmd_alloc(h);
2925
2926 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2927 page, scsi3addr, TYPE_CMD)) {
2928 rc = -1;
2929 goto out;
2930 }
2931 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2932 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
2933 if (rc)
2934 goto out;
2935 ei = c->err_info;
2936 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2937 hpsa_scsi_interpret_error(h, c);
2938 rc = -1;
2939 }
2940 out:
2941 cmd_free(h, c);
2942 return rc;
2943 }
2944
2945 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2946 u8 reset_type, int reply_queue)
2947 {
2948 int rc = IO_OK;
2949 struct CommandList *c;
2950 struct ErrorInfo *ei;
2951
2952 c = cmd_alloc(h);
2953
2954
2955 /* fill_cmd can't fail here, no data buffer to map. */
2956 (void) fill_cmd(c, reset_type, h, NULL, 0, 0,
2957 scsi3addr, TYPE_MSG);
2958 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
2959 if (rc) {
2960 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
2961 goto out;
2962 }
2963 /* no unmap needed here because no data xfer. */
2964
2965 ei = c->err_info;
2966 if (ei->CommandStatus != 0) {
2967 hpsa_scsi_interpret_error(h, c);
2968 rc = -1;
2969 }
2970 out:
2971 cmd_free(h, c);
2972 return rc;
2973 }
2974
2975 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
2976 struct hpsa_scsi_dev_t *dev,
2977 unsigned char *scsi3addr)
2978 {
2979 int i;
2980 bool match = false;
2981 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2982 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
2983
2984 if (hpsa_is_cmd_idle(c))
2985 return false;
2986
2987 switch (c->cmd_type) {
2988 case CMD_SCSI:
2989 case CMD_IOCTL_PEND:
2990 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
2991 sizeof(c->Header.LUN.LunAddrBytes));
2992 break;
2993
2994 case CMD_IOACCEL1:
2995 case CMD_IOACCEL2:
2996 if (c->phys_disk == dev) {
2997 /* HBA mode match */
2998 match = true;
2999 } else {
3000 /* Possible RAID mode -- check each phys dev. */
3001 /* FIXME: Do we need to take out a lock here? If
3002 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
3003 * instead. */
3004 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3005 /* FIXME: an alternate test might be
3006 *
3007 * match = dev->phys_disk[i]->ioaccel_handle
3008 * == c2->scsi_nexus; */
3009 match = dev->phys_disk[i] == c->phys_disk;
3010 }
3011 }
3012 break;
3013
3014 case IOACCEL2_TMF:
3015 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3016 match = dev->phys_disk[i]->ioaccel_handle ==
3017 le32_to_cpu(ac->it_nexus);
3018 }
3019 break;
3020
3021 case 0: /* The command is in the middle of being initialized. */
3022 match = false;
3023 break;
3024
3025 default:
3026 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3027 c->cmd_type);
3028 BUG();
3029 }
3030
3031 return match;
3032 }
3033
3034 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3035 unsigned char *scsi3addr, u8 reset_type, int reply_queue)
3036 {
3037 int i;
3038 int rc = 0;
3039
3040 /* We can really only handle one reset at a time */
3041 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3042 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3043 return -EINTR;
3044 }
3045
3046 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
3047
3048 for (i = 0; i < h->nr_cmds; i++) {
3049 struct CommandList *c = h->cmd_pool + i;
3050 int refcount = atomic_inc_return(&c->refcount);
3051
3052 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
3053 unsigned long flags;
3054
3055 /*
3056 * Mark the target command as having a reset pending,
3057 * then lock a lock so that the command cannot complete
3058 * while we're considering it. If the command is not
3059 * idle then count it; otherwise revoke the event.
3060 */
3061 c->reset_pending = dev;
3062 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
3063 if (!hpsa_is_cmd_idle(c))
3064 atomic_inc(&dev->reset_cmds_out);
3065 else
3066 c->reset_pending = NULL;
3067 spin_unlock_irqrestore(&h->lock, flags);
3068 }
3069
3070 cmd_free(h, c);
3071 }
3072
3073 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
3074 if (!rc)
3075 wait_event(h->event_sync_wait_queue,
3076 atomic_read(&dev->reset_cmds_out) == 0 ||
3077 lockup_detected(h));
3078
3079 if (unlikely(lockup_detected(h))) {
3080 dev_warn(&h->pdev->dev,
3081 "Controller lockup detected during reset wait\n");
3082 rc = -ENODEV;
3083 }
3084
3085 if (unlikely(rc))
3086 atomic_set(&dev->reset_cmds_out, 0);
3087
3088 mutex_unlock(&h->reset_mutex);
3089 return rc;
3090 }
3091
3092 static void hpsa_get_raid_level(struct ctlr_info *h,
3093 unsigned char *scsi3addr, unsigned char *raid_level)
3094 {
3095 int rc;
3096 unsigned char *buf;
3097
3098 *raid_level = RAID_UNKNOWN;
3099 buf = kzalloc(64, GFP_KERNEL);
3100 if (!buf)
3101 return;
3102
3103 if (!hpsa_vpd_page_supported(h, scsi3addr,
3104 HPSA_VPD_LV_DEVICE_GEOMETRY))
3105 goto exit;
3106
3107 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3108 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
3109
3110 if (rc == 0)
3111 *raid_level = buf[8];
3112 if (*raid_level > RAID_UNKNOWN)
3113 *raid_level = RAID_UNKNOWN;
3114 exit:
3115 kfree(buf);
3116 return;
3117 }
3118
3119 #define HPSA_MAP_DEBUG
3120 #ifdef HPSA_MAP_DEBUG
3121 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3122 struct raid_map_data *map_buff)
3123 {
3124 struct raid_map_disk_data *dd = &map_buff->data[0];
3125 int map, row, col;
3126 u16 map_cnt, row_cnt, disks_per_row;
3127
3128 if (rc != 0)
3129 return;
3130
3131 /* Show details only if debugging has been activated. */
3132 if (h->raid_offload_debug < 2)
3133 return;
3134
3135 dev_info(&h->pdev->dev, "structure_size = %u\n",
3136 le32_to_cpu(map_buff->structure_size));
3137 dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3138 le32_to_cpu(map_buff->volume_blk_size));
3139 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3140 le64_to_cpu(map_buff->volume_blk_cnt));
3141 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3142 map_buff->phys_blk_shift);
3143 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3144 map_buff->parity_rotation_shift);
3145 dev_info(&h->pdev->dev, "strip_size = %u\n",
3146 le16_to_cpu(map_buff->strip_size));
3147 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3148 le64_to_cpu(map_buff->disk_starting_blk));
3149 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3150 le64_to_cpu(map_buff->disk_blk_cnt));
3151 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3152 le16_to_cpu(map_buff->data_disks_per_row));
3153 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3154 le16_to_cpu(map_buff->metadata_disks_per_row));
3155 dev_info(&h->pdev->dev, "row_cnt = %u\n",
3156 le16_to_cpu(map_buff->row_cnt));
3157 dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3158 le16_to_cpu(map_buff->layout_map_count));
3159 dev_info(&h->pdev->dev, "flags = 0x%x\n",
3160 le16_to_cpu(map_buff->flags));
3161 dev_info(&h->pdev->dev, "encrypytion = %s\n",
3162 le16_to_cpu(map_buff->flags) &
3163 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF");
3164 dev_info(&h->pdev->dev, "dekindex = %u\n",
3165 le16_to_cpu(map_buff->dekindex));
3166 map_cnt = le16_to_cpu(map_buff->layout_map_count);
3167 for (map = 0; map < map_cnt; map++) {
3168 dev_info(&h->pdev->dev, "Map%u:\n", map);
3169 row_cnt = le16_to_cpu(map_buff->row_cnt);
3170 for (row = 0; row < row_cnt; row++) {
3171 dev_info(&h->pdev->dev, " Row%u:\n", row);
3172 disks_per_row =
3173 le16_to_cpu(map_buff->data_disks_per_row);
3174 for (col = 0; col < disks_per_row; col++, dd++)
3175 dev_info(&h->pdev->dev,
3176 " D%02u: h=0x%04x xor=%u,%u\n",
3177 col, dd->ioaccel_handle,
3178 dd->xor_mult[0], dd->xor_mult[1]);
3179 disks_per_row =
3180 le16_to_cpu(map_buff->metadata_disks_per_row);
3181 for (col = 0; col < disks_per_row; col++, dd++)
3182 dev_info(&h->pdev->dev,
3183 " M%02u: h=0x%04x xor=%u,%u\n",
3184 col, dd->ioaccel_handle,
3185 dd->xor_mult[0], dd->xor_mult[1]);
3186 }
3187 }
3188 }
3189 #else
3190 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3191 __attribute__((unused)) int rc,
3192 __attribute__((unused)) struct raid_map_data *map_buff)
3193 {
3194 }
3195 #endif
3196
3197 static int hpsa_get_raid_map(struct ctlr_info *h,
3198 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3199 {
3200 int rc = 0;
3201 struct CommandList *c;
3202 struct ErrorInfo *ei;
3203
3204 c = cmd_alloc(h);
3205
3206 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3207 sizeof(this_device->raid_map), 0,
3208 scsi3addr, TYPE_CMD)) {
3209 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
3210 cmd_free(h, c);
3211 return -1;
3212 }
3213 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3214 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
3215 if (rc)
3216 goto out;
3217 ei = c->err_info;
3218 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3219 hpsa_scsi_interpret_error(h, c);
3220 rc = -1;
3221 goto out;
3222 }
3223 cmd_free(h, c);
3224
3225 /* @todo in the future, dynamically allocate RAID map memory */
3226 if (le32_to_cpu(this_device->raid_map.structure_size) >
3227 sizeof(this_device->raid_map)) {
3228 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3229 rc = -1;
3230 }
3231 hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3232 return rc;
3233 out:
3234 cmd_free(h, c);
3235 return rc;
3236 }
3237
3238 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3239 unsigned char scsi3addr[], u16 bmic_device_index,
3240 struct bmic_sense_subsystem_info *buf, size_t bufsize)
3241 {
3242 int rc = IO_OK;
3243 struct CommandList *c;
3244 struct ErrorInfo *ei;
3245
3246 c = cmd_alloc(h);
3247
3248 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3249 0, RAID_CTLR_LUNID, TYPE_CMD);
3250 if (rc)
3251 goto out;
3252
3253 c->Request.CDB[2] = bmic_device_index & 0xff;
3254 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3255
3256 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3257 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
3258 if (rc)
3259 goto out;
3260 ei = c->err_info;
3261 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3262 hpsa_scsi_interpret_error(h, c);
3263 rc = -1;
3264 }
3265 out:
3266 cmd_free(h, c);
3267 return rc;
3268 }
3269
3270 static int hpsa_bmic_id_controller(struct ctlr_info *h,
3271 struct bmic_identify_controller *buf, size_t bufsize)
3272 {
3273 int rc = IO_OK;
3274 struct CommandList *c;
3275 struct ErrorInfo *ei;
3276
3277 c = cmd_alloc(h);
3278
3279 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
3280 0, RAID_CTLR_LUNID, TYPE_CMD);
3281 if (rc)
3282 goto out;
3283
3284 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3285 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
3286 if (rc)
3287 goto out;
3288 ei = c->err_info;
3289 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3290 hpsa_scsi_interpret_error(h, c);
3291 rc = -1;
3292 }
3293 out:
3294 cmd_free(h, c);
3295 return rc;
3296 }
3297
3298 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3299 unsigned char scsi3addr[], u16 bmic_device_index,
3300 struct bmic_identify_physical_device *buf, size_t bufsize)
3301 {
3302 int rc = IO_OK;
3303 struct CommandList *c;
3304 struct ErrorInfo *ei;
3305
3306 c = cmd_alloc(h);
3307 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3308 0, RAID_CTLR_LUNID, TYPE_CMD);
3309 if (rc)
3310 goto out;
3311
3312 c->Request.CDB[2] = bmic_device_index & 0xff;
3313 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3314
3315 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3316 DEFAULT_TIMEOUT);
3317 ei = c->err_info;
3318 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3319 hpsa_scsi_interpret_error(h, c);
3320 rc = -1;
3321 }
3322 out:
3323 cmd_free(h, c);
3324
3325 return rc;
3326 }
3327
3328 /*
3329 * get enclosure information
3330 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3331 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3332 * Uses id_physical_device to determine the box_index.
3333 */
3334 static void hpsa_get_enclosure_info(struct ctlr_info *h,
3335 unsigned char *scsi3addr,
3336 struct ReportExtendedLUNdata *rlep, int rle_index,
3337 struct hpsa_scsi_dev_t *encl_dev)
3338 {
3339 int rc = -1;
3340 struct CommandList *c = NULL;
3341 struct ErrorInfo *ei = NULL;
3342 struct bmic_sense_storage_box_params *bssbp = NULL;
3343 struct bmic_identify_physical_device *id_phys = NULL;
3344 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3345 u16 bmic_device_index = 0;
3346
3347 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3348
3349 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
3350 rc = IO_OK;
3351 goto out;
3352 }
3353
3354 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3355 if (!bssbp)
3356 goto out;
3357
3358 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3359 if (!id_phys)
3360 goto out;
3361
3362 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3363 id_phys, sizeof(*id_phys));
3364 if (rc) {
3365 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3366 __func__, encl_dev->external, bmic_device_index);
3367 goto out;
3368 }
3369
3370 c = cmd_alloc(h);
3371
3372 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3373 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3374
3375 if (rc)
3376 goto out;
3377
3378 if (id_phys->phys_connector[1] == 'E')
3379 c->Request.CDB[5] = id_phys->box_index;
3380 else
3381 c->Request.CDB[5] = 0;
3382
3383 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3384 DEFAULT_TIMEOUT);
3385 if (rc)
3386 goto out;
3387
3388 ei = c->err_info;
3389 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3390 rc = -1;
3391 goto out;
3392 }
3393
3394 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3395 memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3396 bssbp->phys_connector, sizeof(bssbp->phys_connector));
3397
3398 rc = IO_OK;
3399 out:
3400 kfree(bssbp);
3401 kfree(id_phys);
3402
3403 if (c)
3404 cmd_free(h, c);
3405
3406 if (rc != IO_OK)
3407 hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3408 "Error, could not get enclosure information\n");
3409 }
3410
3411 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3412 unsigned char *scsi3addr)
3413 {
3414 struct ReportExtendedLUNdata *physdev;
3415 u32 nphysicals;
3416 u64 sa = 0;
3417 int i;
3418
3419 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3420 if (!physdev)
3421 return 0;
3422
3423 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3424 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3425 kfree(physdev);
3426 return 0;
3427 }
3428 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3429
3430 for (i = 0; i < nphysicals; i++)
3431 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3432 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3433 break;
3434 }
3435
3436 kfree(physdev);
3437
3438 return sa;
3439 }
3440
3441 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3442 struct hpsa_scsi_dev_t *dev)
3443 {
3444 int rc;
3445 u64 sa = 0;
3446
3447 if (is_hba_lunid(scsi3addr)) {
3448 struct bmic_sense_subsystem_info *ssi;
3449
3450 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3451 if (ssi == NULL) {
3452 dev_warn(&h->pdev->dev,
3453 "%s: out of memory\n", __func__);
3454 return;
3455 }
3456
3457 rc = hpsa_bmic_sense_subsystem_information(h,
3458 scsi3addr, 0, ssi, sizeof(*ssi));
3459 if (rc == 0) {
3460 sa = get_unaligned_be64(ssi->primary_world_wide_id);
3461 h->sas_address = sa;
3462 }
3463
3464 kfree(ssi);
3465 } else
3466 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3467
3468 dev->sas_address = sa;
3469 }
3470
3471 /* Get a device id from inquiry page 0x83 */
3472 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
3473 unsigned char scsi3addr[], u8 page)
3474 {
3475 int rc;
3476 int i;
3477 int pages;
3478 unsigned char *buf, bufsize;
3479
3480 buf = kzalloc(256, GFP_KERNEL);
3481 if (!buf)
3482 return false;
3483
3484 /* Get the size of the page list first */
3485 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3486 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3487 buf, HPSA_VPD_HEADER_SZ);
3488 if (rc != 0)
3489 goto exit_unsupported;
3490 pages = buf[3];
3491 if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3492 bufsize = pages + HPSA_VPD_HEADER_SZ;
3493 else
3494 bufsize = 255;
3495
3496 /* Get the whole VPD page list */
3497 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3498 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3499 buf, bufsize);
3500 if (rc != 0)
3501 goto exit_unsupported;
3502
3503 pages = buf[3];
3504 for (i = 1; i <= pages; i++)
3505 if (buf[3 + i] == page)
3506 goto exit_supported;
3507 exit_unsupported:
3508 kfree(buf);
3509 return false;
3510 exit_supported:
3511 kfree(buf);
3512 return true;
3513 }
3514
3515 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3516 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3517 {
3518 int rc;
3519 unsigned char *buf;
3520 u8 ioaccel_status;
3521
3522 this_device->offload_config = 0;
3523 this_device->offload_enabled = 0;
3524 this_device->offload_to_be_enabled = 0;
3525
3526 buf = kzalloc(64, GFP_KERNEL);
3527 if (!buf)
3528 return;
3529 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3530 goto out;
3531 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3532 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3533 if (rc != 0)
3534 goto out;
3535
3536 #define IOACCEL_STATUS_BYTE 4
3537 #define OFFLOAD_CONFIGURED_BIT 0x01
3538 #define OFFLOAD_ENABLED_BIT 0x02
3539 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3540 this_device->offload_config =
3541 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3542 if (this_device->offload_config) {
3543 this_device->offload_enabled =
3544 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3545 if (hpsa_get_raid_map(h, scsi3addr, this_device))
3546 this_device->offload_enabled = 0;
3547 }
3548 this_device->offload_to_be_enabled = this_device->offload_enabled;
3549 out:
3550 kfree(buf);
3551 return;
3552 }
3553
3554 /* Get the device id from inquiry page 0x83 */
3555 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3556 unsigned char *device_id, int index, int buflen)
3557 {
3558 int rc;
3559 unsigned char *buf;
3560
3561 /* Does controller have VPD for device id? */
3562 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
3563 return 1; /* not supported */
3564
3565 buf = kzalloc(64, GFP_KERNEL);
3566 if (!buf)
3567 return -ENOMEM;
3568
3569 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3570 HPSA_VPD_LV_DEVICE_ID, buf, 64);
3571 if (rc == 0) {
3572 if (buflen > 16)
3573 buflen = 16;
3574 memcpy(device_id, &buf[8], buflen);
3575 }
3576
3577 kfree(buf);
3578
3579 return rc; /*0 - got id, otherwise, didn't */
3580 }
3581
3582 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3583 void *buf, int bufsize,
3584 int extended_response)
3585 {
3586 int rc = IO_OK;
3587 struct CommandList *c;
3588 unsigned char scsi3addr[8];
3589 struct ErrorInfo *ei;
3590
3591 c = cmd_alloc(h);
3592
3593 /* address the controller */
3594 memset(scsi3addr, 0, sizeof(scsi3addr));
3595 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3596 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3597 rc = -1;
3598 goto out;
3599 }
3600 if (extended_response)
3601 c->Request.CDB[1] = extended_response;
3602 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3603 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
3604 if (rc)
3605 goto out;
3606 ei = c->err_info;
3607 if (ei->CommandStatus != 0 &&
3608 ei->CommandStatus != CMD_DATA_UNDERRUN) {
3609 hpsa_scsi_interpret_error(h, c);
3610 rc = -1;
3611 } else {
3612 struct ReportLUNdata *rld = buf;
3613
3614 if (rld->extended_response_flag != extended_response) {
3615 dev_err(&h->pdev->dev,
3616 "report luns requested format %u, got %u\n",
3617 extended_response,
3618 rld->extended_response_flag);
3619 rc = -1;
3620 }
3621 }
3622 out:
3623 cmd_free(h, c);
3624 return rc;
3625 }
3626
3627 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3628 struct ReportExtendedLUNdata *buf, int bufsize)
3629 {
3630 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3631 HPSA_REPORT_PHYS_EXTENDED);
3632 }
3633
3634 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3635 struct ReportLUNdata *buf, int bufsize)
3636 {
3637 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3638 }
3639
3640 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3641 int bus, int target, int lun)
3642 {
3643 device->bus = bus;
3644 device->target = target;
3645 device->lun = lun;
3646 }
3647
3648 /* Use VPD inquiry to get details of volume status */
3649 static int hpsa_get_volume_status(struct ctlr_info *h,
3650 unsigned char scsi3addr[])
3651 {
3652 int rc;
3653 int status;
3654 int size;
3655 unsigned char *buf;
3656
3657 buf = kzalloc(64, GFP_KERNEL);
3658 if (!buf)
3659 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3660
3661 /* Does controller have VPD for logical volume status? */
3662 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3663 goto exit_failed;
3664
3665 /* Get the size of the VPD return buffer */
3666 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3667 buf, HPSA_VPD_HEADER_SZ);
3668 if (rc != 0)
3669 goto exit_failed;
3670 size = buf[3];
3671
3672 /* Now get the whole VPD buffer */
3673 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3674 buf, size + HPSA_VPD_HEADER_SZ);
3675 if (rc != 0)
3676 goto exit_failed;
3677 status = buf[4]; /* status byte */
3678
3679 kfree(buf);
3680 return status;
3681 exit_failed:
3682 kfree(buf);
3683 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3684 }
3685
3686 /* Determine offline status of a volume.
3687 * Return either:
3688 * 0 (not offline)
3689 * 0xff (offline for unknown reasons)
3690 * # (integer code indicating one of several NOT READY states
3691 * describing why a volume is to be kept offline)
3692 */
3693 static unsigned char hpsa_volume_offline(struct ctlr_info *h,
3694 unsigned char scsi3addr[])
3695 {
3696 struct CommandList *c;
3697 unsigned char *sense;
3698 u8 sense_key, asc, ascq;
3699 int sense_len;
3700 int rc, ldstat = 0;
3701 u16 cmd_status;
3702 u8 scsi_status;
3703 #define ASC_LUN_NOT_READY 0x04
3704 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3705 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3706
3707 c = cmd_alloc(h);
3708
3709 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3710 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3711 DEFAULT_TIMEOUT);
3712 if (rc) {
3713 cmd_free(h, c);
3714 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3715 }
3716 sense = c->err_info->SenseInfo;
3717 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3718 sense_len = sizeof(c->err_info->SenseInfo);
3719 else
3720 sense_len = c->err_info->SenseLen;
3721 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3722 cmd_status = c->err_info->CommandStatus;
3723 scsi_status = c->err_info->ScsiStatus;
3724 cmd_free(h, c);
3725
3726 /* Determine the reason for not ready state */
3727 ldstat = hpsa_get_volume_status(h, scsi3addr);
3728
3729 /* Keep volume offline in certain cases: */
3730 switch (ldstat) {
3731 case HPSA_LV_FAILED:
3732 case HPSA_LV_UNDERGOING_ERASE:
3733 case HPSA_LV_NOT_AVAILABLE:
3734 case HPSA_LV_UNDERGOING_RPI:
3735 case HPSA_LV_PENDING_RPI:
3736 case HPSA_LV_ENCRYPTED_NO_KEY:
3737 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3738 case HPSA_LV_UNDERGOING_ENCRYPTION:
3739 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3740 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3741 return ldstat;
3742 case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3743 /* If VPD status page isn't available,
3744 * use ASC/ASCQ to determine state
3745 */
3746 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3747 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3748 return ldstat;
3749 break;
3750 default:
3751 break;
3752 }
3753 return HPSA_LV_OK;
3754 }
3755
3756 /*
3757 * Find out if a logical device supports aborts by simply trying one.
3758 * Smart Array may claim not to support aborts on logical drives, but
3759 * if a MSA2000 * is connected, the drives on that will be presented
3760 * by the Smart Array as logical drives, and aborts may be sent to
3761 * those devices successfully. So the simplest way to find out is
3762 * to simply try an abort and see how the device responds.
3763 */
3764 static int hpsa_device_supports_aborts(struct ctlr_info *h,
3765 unsigned char *scsi3addr)
3766 {
3767 struct CommandList *c;
3768 struct ErrorInfo *ei;
3769 int rc = 0;
3770
3771 u64 tag = (u64) -1; /* bogus tag */
3772
3773 /* Assume that physical devices support aborts */
3774 if (!is_logical_dev_addr_mode(scsi3addr))
3775 return 1;
3776
3777 c = cmd_alloc(h);
3778
3779 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG);
3780 (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3781 DEFAULT_TIMEOUT);
3782 /* no unmap needed here because no data xfer. */
3783 ei = c->err_info;
3784 switch (ei->CommandStatus) {
3785 case CMD_INVALID:
3786 rc = 0;
3787 break;
3788 case CMD_UNABORTABLE:
3789 case CMD_ABORT_FAILED:
3790 rc = 1;
3791 break;
3792 case CMD_TMF_STATUS:
3793 rc = hpsa_evaluate_tmf_status(h, c);
3794 break;
3795 default:
3796 rc = 0;
3797 break;
3798 }
3799 cmd_free(h, c);
3800 return rc;
3801 }
3802
3803 static int hpsa_update_device_info(struct ctlr_info *h,
3804 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3805 unsigned char *is_OBDR_device)
3806 {
3807
3808 #define OBDR_SIG_OFFSET 43
3809 #define OBDR_TAPE_SIG "$DR-10"
3810 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3811 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3812
3813 unsigned char *inq_buff;
3814 unsigned char *obdr_sig;
3815 int rc = 0;
3816
3817 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3818 if (!inq_buff) {
3819 rc = -ENOMEM;
3820 goto bail_out;
3821 }
3822
3823 /* Do an inquiry to the device to see what it is. */
3824 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3825 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3826 dev_err(&h->pdev->dev,
3827 "%s: inquiry failed, device will be skipped.\n",
3828 __func__);
3829 rc = HPSA_INQUIRY_FAILED;
3830 goto bail_out;
3831 }
3832
3833 scsi_sanitize_inquiry_string(&inq_buff[8], 8);
3834 scsi_sanitize_inquiry_string(&inq_buff[16], 16);
3835
3836 this_device->devtype = (inq_buff[0] & 0x1f);
3837 memcpy(this_device->scsi3addr, scsi3addr, 8);
3838 memcpy(this_device->vendor, &inq_buff[8],
3839 sizeof(this_device->vendor));
3840 memcpy(this_device->model, &inq_buff[16],
3841 sizeof(this_device->model));
3842 this_device->rev = inq_buff[2];
3843 memset(this_device->device_id, 0,
3844 sizeof(this_device->device_id));
3845 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3846 sizeof(this_device->device_id)))
3847 dev_err(&h->pdev->dev,
3848 "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n",
3849 h->ctlr, __func__,
3850 h->scsi_host->host_no,
3851 this_device->target, this_device->lun,
3852 scsi_device_type(this_device->devtype),
3853 this_device->model);
3854
3855 if ((this_device->devtype == TYPE_DISK ||
3856 this_device->devtype == TYPE_ZBC) &&
3857 is_logical_dev_addr_mode(scsi3addr)) {
3858 unsigned char volume_offline;
3859
3860 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3861 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3862 hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3863 volume_offline = hpsa_volume_offline(h, scsi3addr);
3864 this_device->volume_offline = volume_offline;
3865 if (volume_offline == HPSA_LV_FAILED) {
3866 rc = HPSA_LV_FAILED;
3867 dev_err(&h->pdev->dev,
3868 "%s: LV failed, device will be skipped.\n",
3869 __func__);
3870 goto bail_out;
3871 }
3872 } else {
3873 this_device->raid_level = RAID_UNKNOWN;
3874 this_device->offload_config = 0;
3875 this_device->offload_enabled = 0;
3876 this_device->offload_to_be_enabled = 0;
3877 this_device->hba_ioaccel_enabled = 0;
3878 this_device->volume_offline = 0;
3879 this_device->queue_depth = h->nr_cmds;
3880 }
3881
3882 if (is_OBDR_device) {
3883 /* See if this is a One-Button-Disaster-Recovery device
3884 * by looking for "$DR-10" at offset 43 in inquiry data.
3885 */
3886 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
3887 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
3888 strncmp(obdr_sig, OBDR_TAPE_SIG,
3889 OBDR_SIG_LEN) == 0);
3890 }
3891 kfree(inq_buff);
3892 return 0;
3893
3894 bail_out:
3895 kfree(inq_buff);
3896 return rc;
3897 }
3898
3899 static void hpsa_update_device_supports_aborts(struct ctlr_info *h,
3900 struct hpsa_scsi_dev_t *dev, u8 *scsi3addr)
3901 {
3902 unsigned long flags;
3903 int rc, entry;
3904 /*
3905 * See if this device supports aborts. If we already know
3906 * the device, we already know if it supports aborts, otherwise
3907 * we have to find out if it supports aborts by trying one.
3908 */
3909 spin_lock_irqsave(&h->devlock, flags);
3910 rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry);
3911 if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) &&
3912 entry >= 0 && entry < h->ndevices) {
3913 dev->supports_aborts = h->dev[entry]->supports_aborts;
3914 spin_unlock_irqrestore(&h->devlock, flags);
3915 } else {
3916 spin_unlock_irqrestore(&h->devlock, flags);
3917 dev->supports_aborts =
3918 hpsa_device_supports_aborts(h, scsi3addr);
3919 if (dev->supports_aborts < 0)
3920 dev->supports_aborts = 0;
3921 }
3922 }
3923
3924 /*
3925 * Helper function to assign bus, target, lun mapping of devices.
3926 * Logical drive target and lun are assigned at this time, but
3927 * physical device lun and target assignment are deferred (assigned
3928 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
3929 */
3930 static void figure_bus_target_lun(struct ctlr_info *h,
3931 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
3932 {
3933 u32 lunid = get_unaligned_le32(lunaddrbytes);
3934
3935 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
3936 /* physical device, target and lun filled in later */
3937 if (is_hba_lunid(lunaddrbytes)) {
3938 int bus = HPSA_HBA_BUS;
3939
3940 if (!device->rev)
3941 bus = HPSA_LEGACY_HBA_BUS;
3942 hpsa_set_bus_target_lun(device,
3943 bus, 0, lunid & 0x3fff);
3944 } else
3945 /* defer target, lun assignment for physical devices */
3946 hpsa_set_bus_target_lun(device,
3947 HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
3948 return;
3949 }
3950 /* It's a logical device */
3951 if (device->external) {
3952 hpsa_set_bus_target_lun(device,
3953 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
3954 lunid & 0x00ff);
3955 return;
3956 }
3957 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
3958 0, lunid & 0x3fff);
3959 }
3960
3961
3962 /*
3963 * Get address of physical disk used for an ioaccel2 mode command:
3964 * 1. Extract ioaccel2 handle from the command.
3965 * 2. Find a matching ioaccel2 handle from list of physical disks.
3966 * 3. Return:
3967 * 1 and set scsi3addr to address of matching physical
3968 * 0 if no matching physical disk was found.
3969 */
3970 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
3971 struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
3972 {
3973 struct io_accel2_cmd *c2 =
3974 &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
3975 unsigned long flags;
3976 int i;
3977
3978 spin_lock_irqsave(&h->devlock, flags);
3979 for (i = 0; i < h->ndevices; i++)
3980 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) {
3981 memcpy(scsi3addr, h->dev[i]->scsi3addr,
3982 sizeof(h->dev[i]->scsi3addr));
3983 spin_unlock_irqrestore(&h->devlock, flags);
3984 return 1;
3985 }
3986 spin_unlock_irqrestore(&h->devlock, flags);
3987 return 0;
3988 }
3989
3990 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
3991 int i, int nphysicals, int nlocal_logicals)
3992 {
3993 /* In report logicals, local logicals are listed first,
3994 * then any externals.
3995 */
3996 int logicals_start = nphysicals + (raid_ctlr_position == 0);
3997
3998 if (i == raid_ctlr_position)
3999 return 0;
4000
4001 if (i < logicals_start)
4002 return 0;
4003
4004 /* i is in logicals range, but still within local logicals */
4005 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
4006 return 0;
4007
4008 return 1; /* it's an external lun */
4009 }
4010
4011 /*
4012 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
4013 * logdev. The number of luns in physdev and logdev are returned in
4014 * *nphysicals and *nlogicals, respectively.
4015 * Returns 0 on success, -1 otherwise.
4016 */
4017 static int hpsa_gather_lun_info(struct ctlr_info *h,
4018 struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
4019 struct ReportLUNdata *logdev, u32 *nlogicals)
4020 {
4021 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
4022 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
4023 return -1;
4024 }
4025 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
4026 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
4027 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
4028 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
4029 *nphysicals = HPSA_MAX_PHYS_LUN;
4030 }
4031 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
4032 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
4033 return -1;
4034 }
4035 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
4036 /* Reject Logicals in excess of our max capability. */
4037 if (*nlogicals > HPSA_MAX_LUN) {
4038 dev_warn(&h->pdev->dev,
4039 "maximum logical LUNs (%d) exceeded. "
4040 "%d LUNs ignored.\n", HPSA_MAX_LUN,
4041 *nlogicals - HPSA_MAX_LUN);
4042 *nlogicals = HPSA_MAX_LUN;
4043 }
4044 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4045 dev_warn(&h->pdev->dev,
4046 "maximum logical + physical LUNs (%d) exceeded. "
4047 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4048 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4049 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4050 }
4051 return 0;
4052 }
4053
4054 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
4055 int i, int nphysicals, int nlogicals,
4056 struct ReportExtendedLUNdata *physdev_list,
4057 struct ReportLUNdata *logdev_list)
4058 {
4059 /* Helper function, figure out where the LUN ID info is coming from
4060 * given index i, lists of physical and logical devices, where in
4061 * the list the raid controller is supposed to appear (first or last)
4062 */
4063
4064 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4065 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4066
4067 if (i == raid_ctlr_position)
4068 return RAID_CTLR_LUNID;
4069
4070 if (i < logicals_start)
4071 return &physdev_list->LUN[i -
4072 (raid_ctlr_position == 0)].lunid[0];
4073
4074 if (i < last_device)
4075 return &logdev_list->LUN[i - nphysicals -
4076 (raid_ctlr_position == 0)][0];
4077 BUG();
4078 return NULL;
4079 }
4080
4081 /* get physical drive ioaccel handle and queue depth */
4082 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
4083 struct hpsa_scsi_dev_t *dev,
4084 struct ReportExtendedLUNdata *rlep, int rle_index,
4085 struct bmic_identify_physical_device *id_phys)
4086 {
4087 int rc;
4088 struct ext_report_lun_entry *rle;
4089
4090 /*
4091 * external targets don't support BMIC
4092 */
4093 if (dev->external) {
4094 dev->queue_depth = 7;
4095 return;
4096 }
4097
4098 rle = &rlep->LUN[rle_index];
4099
4100 dev->ioaccel_handle = rle->ioaccel_handle;
4101 if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4102 dev->hba_ioaccel_enabled = 1;
4103 memset(id_phys, 0, sizeof(*id_phys));
4104 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4105 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
4106 sizeof(*id_phys));
4107 if (!rc)
4108 /* Reserve space for FW operations */
4109 #define DRIVE_CMDS_RESERVED_FOR_FW 2
4110 #define DRIVE_QUEUE_DEPTH 7
4111 dev->queue_depth =
4112 le16_to_cpu(id_phys->current_queue_depth_limit) -
4113 DRIVE_CMDS_RESERVED_FOR_FW;
4114 else
4115 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
4116 }
4117
4118 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4119 struct ReportExtendedLUNdata *rlep, int rle_index,
4120 struct bmic_identify_physical_device *id_phys)
4121 {
4122 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
4123
4124 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
4125 this_device->hba_ioaccel_enabled = 1;
4126
4127 memcpy(&this_device->active_path_index,
4128 &id_phys->active_path_number,
4129 sizeof(this_device->active_path_index));
4130 memcpy(&this_device->path_map,
4131 &id_phys->redundant_path_present_map,
4132 sizeof(this_device->path_map));
4133 memcpy(&this_device->box,
4134 &id_phys->alternate_paths_phys_box_on_port,
4135 sizeof(this_device->box));
4136 memcpy(&this_device->phys_connector,
4137 &id_phys->alternate_paths_phys_connector,
4138 sizeof(this_device->phys_connector));
4139 memcpy(&this_device->bay,
4140 &id_phys->phys_bay_in_box,
4141 sizeof(this_device->bay));
4142 }
4143
4144 /* get number of local logical disks. */
4145 static int hpsa_set_local_logical_count(struct ctlr_info *h,
4146 struct bmic_identify_controller *id_ctlr,
4147 u32 *nlocals)
4148 {
4149 int rc;
4150
4151 if (!id_ctlr) {
4152 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
4153 __func__);
4154 return -ENOMEM;
4155 }
4156 memset(id_ctlr, 0, sizeof(*id_ctlr));
4157 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
4158 if (!rc)
4159 if (id_ctlr->configured_logical_drive_count < 256)
4160 *nlocals = id_ctlr->configured_logical_drive_count;
4161 else
4162 *nlocals = le16_to_cpu(
4163 id_ctlr->extended_logical_unit_count);
4164 else
4165 *nlocals = -1;
4166 return rc;
4167 }
4168
4169 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
4170 {
4171 struct bmic_identify_physical_device *id_phys;
4172 bool is_spare = false;
4173 int rc;
4174
4175 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4176 if (!id_phys)
4177 return false;
4178
4179 rc = hpsa_bmic_id_physical_device(h,
4180 lunaddrbytes,
4181 GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
4182 id_phys, sizeof(*id_phys));
4183 if (rc == 0)
4184 is_spare = (id_phys->more_flags >> 6) & 0x01;
4185
4186 kfree(id_phys);
4187 return is_spare;
4188 }
4189
4190 #define RPL_DEV_FLAG_NON_DISK 0x1
4191 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2
4192 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4
4193
4194 #define BMIC_DEVICE_TYPE_ENCLOSURE 6
4195
4196 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
4197 struct ext_report_lun_entry *rle)
4198 {
4199 u8 device_flags;
4200 u8 device_type;
4201
4202 if (!MASKED_DEVICE(lunaddrbytes))
4203 return false;
4204
4205 device_flags = rle->device_flags;
4206 device_type = rle->device_type;
4207
4208 if (device_flags & RPL_DEV_FLAG_NON_DISK) {
4209 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
4210 return false;
4211 return true;
4212 }
4213
4214 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
4215 return false;
4216
4217 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
4218 return false;
4219
4220 /*
4221 * Spares may be spun down, we do not want to
4222 * do an Inquiry to a RAID set spare drive as
4223 * that would have them spun up, that is a
4224 * performance hit because I/O to the RAID device
4225 * stops while the spin up occurs which can take
4226 * over 50 seconds.
4227 */
4228 if (hpsa_is_disk_spare(h, lunaddrbytes))
4229 return true;
4230
4231 return false;
4232 }
4233
4234 static void hpsa_update_scsi_devices(struct ctlr_info *h)
4235 {
4236 /* the idea here is we could get notified
4237 * that some devices have changed, so we do a report
4238 * physical luns and report logical luns cmd, and adjust
4239 * our list of devices accordingly.
4240 *
4241 * The scsi3addr's of devices won't change so long as the
4242 * adapter is not reset. That means we can rescan and
4243 * tell which devices we already know about, vs. new
4244 * devices, vs. disappearing devices.
4245 */
4246 struct ReportExtendedLUNdata *physdev_list = NULL;
4247 struct ReportLUNdata *logdev_list = NULL;
4248 struct bmic_identify_physical_device *id_phys = NULL;
4249 struct bmic_identify_controller *id_ctlr = NULL;
4250 u32 nphysicals = 0;
4251 u32 nlogicals = 0;
4252 u32 nlocal_logicals = 0;
4253 u32 ndev_allocated = 0;
4254 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4255 int ncurrent = 0;
4256 int i, n_ext_target_devs, ndevs_to_allocate;
4257 int raid_ctlr_position;
4258 bool physical_device;
4259 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4260
4261 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
4262 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
4263 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4264 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
4265 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4266 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4267
4268 if (!currentsd || !physdev_list || !logdev_list ||
4269 !tmpdevice || !id_phys || !id_ctlr) {
4270 dev_err(&h->pdev->dev, "out of memory\n");
4271 goto out;
4272 }
4273 memset(lunzerobits, 0, sizeof(lunzerobits));
4274
4275 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4276
4277 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4278 logdev_list, &nlogicals)) {
4279 h->drv_req_rescan = 1;
4280 goto out;
4281 }
4282
4283 /* Set number of local logicals (non PTRAID) */
4284 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
4285 dev_warn(&h->pdev->dev,
4286 "%s: Can't determine number of local logical devices.\n",
4287 __func__);
4288 }
4289
4290 /* We might see up to the maximum number of logical and physical disks
4291 * plus external target devices, and a device for the local RAID
4292 * controller.
4293 */
4294 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4295
4296 /* Allocate the per device structures */
4297 for (i = 0; i < ndevs_to_allocate; i++) {
4298 if (i >= HPSA_MAX_DEVICES) {
4299 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4300 " %d devices ignored.\n", HPSA_MAX_DEVICES,
4301 ndevs_to_allocate - HPSA_MAX_DEVICES);
4302 break;
4303 }
4304
4305 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4306 if (!currentsd[i]) {
4307 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
4308 __FILE__, __LINE__);
4309 h->drv_req_rescan = 1;
4310 goto out;
4311 }
4312 ndev_allocated++;
4313 }
4314
4315 if (is_scsi_rev_5(h))
4316 raid_ctlr_position = 0;
4317 else
4318 raid_ctlr_position = nphysicals + nlogicals;
4319
4320 /* adjust our table of devices */
4321 n_ext_target_devs = 0;
4322 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
4323 u8 *lunaddrbytes, is_OBDR = 0;
4324 int rc = 0;
4325 int phys_dev_index = i - (raid_ctlr_position == 0);
4326 bool skip_device = false;
4327
4328 physical_device = i < nphysicals + (raid_ctlr_position == 0);
4329
4330 /* Figure out where the LUN ID info is coming from */
4331 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4332 i, nphysicals, nlogicals, physdev_list, logdev_list);
4333
4334 /* Determine if this is a lun from an external target array */
4335 tmpdevice->external =
4336 figure_external_status(h, raid_ctlr_position, i,
4337 nphysicals, nlocal_logicals);
4338
4339 /*
4340 * Skip over some devices such as a spare.
4341 */
4342 if (!tmpdevice->external && physical_device) {
4343 skip_device = hpsa_skip_device(h, lunaddrbytes,
4344 &physdev_list->LUN[phys_dev_index]);
4345 if (skip_device)
4346 continue;
4347 }
4348
4349 /* Get device type, vendor, model, device id */
4350 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4351 &is_OBDR);
4352 if (rc == -ENOMEM) {
4353 dev_warn(&h->pdev->dev,
4354 "Out of memory, rescan deferred.\n");
4355 h->drv_req_rescan = 1;
4356 goto out;
4357 }
4358 if (rc) {
4359 h->drv_req_rescan = 1;
4360 continue;
4361 }
4362
4363 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4364 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes);
4365 this_device = currentsd[ncurrent];
4366
4367 /* Turn on discovery_polling if there are ext target devices.
4368 * Event-based change notification is unreliable for those.
4369 */
4370 if (!h->discovery_polling) {
4371 if (tmpdevice->external) {
4372 h->discovery_polling = 1;
4373 dev_info(&h->pdev->dev,
4374 "External target, activate discovery polling.\n");
4375 }
4376 }
4377
4378
4379 *this_device = *tmpdevice;
4380 this_device->physical_device = physical_device;
4381
4382 /*
4383 * Expose all devices except for physical devices that
4384 * are masked.
4385 */
4386 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
4387 this_device->expose_device = 0;
4388 else
4389 this_device->expose_device = 1;
4390
4391
4392 /*
4393 * Get the SAS address for physical devices that are exposed.
4394 */
4395 if (this_device->physical_device && this_device->expose_device)
4396 hpsa_get_sas_address(h, lunaddrbytes, this_device);
4397
4398 switch (this_device->devtype) {
4399 case TYPE_ROM:
4400 /* We don't *really* support actual CD-ROM devices,
4401 * just "One Button Disaster Recovery" tape drive
4402 * which temporarily pretends to be a CD-ROM drive.
4403 * So we check that the device is really an OBDR tape
4404 * device by checking for "$DR-10" in bytes 43-48 of
4405 * the inquiry data.
4406 */
4407 if (is_OBDR)
4408 ncurrent++;
4409 break;
4410 case TYPE_DISK:
4411 case TYPE_ZBC:
4412 if (this_device->physical_device) {
4413 /* The disk is in HBA mode. */
4414 /* Never use RAID mapper in HBA mode. */
4415 this_device->offload_enabled = 0;
4416 hpsa_get_ioaccel_drive_info(h, this_device,
4417 physdev_list, phys_dev_index, id_phys);
4418 hpsa_get_path_info(this_device,
4419 physdev_list, phys_dev_index, id_phys);
4420 }
4421 ncurrent++;
4422 break;
4423 case TYPE_TAPE:
4424 case TYPE_MEDIUM_CHANGER:
4425 ncurrent++;
4426 break;
4427 case TYPE_ENCLOSURE:
4428 if (!this_device->external)
4429 hpsa_get_enclosure_info(h, lunaddrbytes,
4430 physdev_list, phys_dev_index,
4431 this_device);
4432 ncurrent++;
4433 break;
4434 case TYPE_RAID:
4435 /* Only present the Smartarray HBA as a RAID controller.
4436 * If it's a RAID controller other than the HBA itself
4437 * (an external RAID controller, MSA500 or similar)
4438 * don't present it.
4439 */
4440 if (!is_hba_lunid(lunaddrbytes))
4441 break;
4442 ncurrent++;
4443 break;
4444 default:
4445 break;
4446 }
4447 if (ncurrent >= HPSA_MAX_DEVICES)
4448 break;
4449 }
4450
4451 if (h->sas_host == NULL) {
4452 int rc = 0;
4453
4454 rc = hpsa_add_sas_host(h);
4455 if (rc) {
4456 dev_warn(&h->pdev->dev,
4457 "Could not add sas host %d\n", rc);
4458 goto out;
4459 }
4460 }
4461
4462 adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4463 out:
4464 kfree(tmpdevice);
4465 for (i = 0; i < ndev_allocated; i++)
4466 kfree(currentsd[i]);
4467 kfree(currentsd);
4468 kfree(physdev_list);
4469 kfree(logdev_list);
4470 kfree(id_ctlr);
4471 kfree(id_phys);
4472 }
4473
4474 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4475 struct scatterlist *sg)
4476 {
4477 u64 addr64 = (u64) sg_dma_address(sg);
4478 unsigned int len = sg_dma_len(sg);
4479
4480 desc->Addr = cpu_to_le64(addr64);
4481 desc->Len = cpu_to_le32(len);
4482 desc->Ext = 0;
4483 }
4484
4485 /*
4486 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4487 * dma mapping and fills in the scatter gather entries of the
4488 * hpsa command, cp.
4489 */
4490 static int hpsa_scatter_gather(struct ctlr_info *h,
4491 struct CommandList *cp,
4492 struct scsi_cmnd *cmd)
4493 {
4494 struct scatterlist *sg;
4495 int use_sg, i, sg_limit, chained, last_sg;
4496 struct SGDescriptor *curr_sg;
4497
4498 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4499
4500 use_sg = scsi_dma_map(cmd);
4501 if (use_sg < 0)
4502 return use_sg;
4503
4504 if (!use_sg)
4505 goto sglist_finished;
4506
4507 /*
4508 * If the number of entries is greater than the max for a single list,
4509 * then we have a chained list; we will set up all but one entry in the
4510 * first list (the last entry is saved for link information);
4511 * otherwise, we don't have a chained list and we'll set up at each of
4512 * the entries in the one list.
4513 */
4514 curr_sg = cp->SG;
4515 chained = use_sg > h->max_cmd_sg_entries;
4516 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4517 last_sg = scsi_sg_count(cmd) - 1;
4518 scsi_for_each_sg(cmd, sg, sg_limit, i) {
4519 hpsa_set_sg_descriptor(curr_sg, sg);
4520 curr_sg++;
4521 }
4522
4523 if (chained) {
4524 /*
4525 * Continue with the chained list. Set curr_sg to the chained
4526 * list. Modify the limit to the total count less the entries
4527 * we've already set up. Resume the scan at the list entry
4528 * where the previous loop left off.
4529 */
4530 curr_sg = h->cmd_sg_list[cp->cmdindex];
4531 sg_limit = use_sg - sg_limit;
4532 for_each_sg(sg, sg, sg_limit, i) {
4533 hpsa_set_sg_descriptor(curr_sg, sg);
4534 curr_sg++;
4535 }
4536 }
4537
4538 /* Back the pointer up to the last entry and mark it as "last". */
4539 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
4540
4541 if (use_sg + chained > h->maxSG)
4542 h->maxSG = use_sg + chained;
4543
4544 if (chained) {
4545 cp->Header.SGList = h->max_cmd_sg_entries;
4546 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4547 if (hpsa_map_sg_chain_block(h, cp)) {
4548 scsi_dma_unmap(cmd);
4549 return -1;
4550 }
4551 return 0;
4552 }
4553
4554 sglist_finished:
4555
4556 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
4557 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4558 return 0;
4559 }
4560
4561 #define IO_ACCEL_INELIGIBLE (1)
4562 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4563 {
4564 int is_write = 0;
4565 u32 block;
4566 u32 block_cnt;
4567
4568 /* Perform some CDB fixups if needed using 10 byte reads/writes only */
4569 switch (cdb[0]) {
4570 case WRITE_6:
4571 case WRITE_12:
4572 is_write = 1;
4573 case READ_6:
4574 case READ_12:
4575 if (*cdb_len == 6) {
4576 block = (((cdb[1] & 0x1F) << 16) |
4577 (cdb[2] << 8) |
4578 cdb[3]);
4579 block_cnt = cdb[4];
4580 if (block_cnt == 0)
4581 block_cnt = 256;
4582 } else {
4583 BUG_ON(*cdb_len != 12);
4584 block = get_unaligned_be32(&cdb[2]);
4585 block_cnt = get_unaligned_be32(&cdb[6]);
4586 }
4587 if (block_cnt > 0xffff)
4588 return IO_ACCEL_INELIGIBLE;
4589
4590 cdb[0] = is_write ? WRITE_10 : READ_10;
4591 cdb[1] = 0;
4592 cdb[2] = (u8) (block >> 24);
4593 cdb[3] = (u8) (block >> 16);
4594 cdb[4] = (u8) (block >> 8);
4595 cdb[5] = (u8) (block);
4596 cdb[6] = 0;
4597 cdb[7] = (u8) (block_cnt >> 8);
4598 cdb[8] = (u8) (block_cnt);
4599 cdb[9] = 0;
4600 *cdb_len = 10;
4601 break;
4602 }
4603 return 0;
4604 }
4605
4606 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4607 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4608 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4609 {
4610 struct scsi_cmnd *cmd = c->scsi_cmd;
4611 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4612 unsigned int len;
4613 unsigned int total_len = 0;
4614 struct scatterlist *sg;
4615 u64 addr64;
4616 int use_sg, i;
4617 struct SGDescriptor *curr_sg;
4618 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4619
4620 /* TODO: implement chaining support */
4621 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4622 atomic_dec(&phys_disk->ioaccel_cmds_out);
4623 return IO_ACCEL_INELIGIBLE;
4624 }
4625
4626 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4627
4628 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4629 atomic_dec(&phys_disk->ioaccel_cmds_out);
4630 return IO_ACCEL_INELIGIBLE;
4631 }
4632
4633 c->cmd_type = CMD_IOACCEL1;
4634
4635 /* Adjust the DMA address to point to the accelerated command buffer */
4636 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4637 (c->cmdindex * sizeof(*cp));
4638 BUG_ON(c->busaddr & 0x0000007F);
4639
4640 use_sg = scsi_dma_map(cmd);
4641 if (use_sg < 0) {
4642 atomic_dec(&phys_disk->ioaccel_cmds_out);
4643 return use_sg;
4644 }
4645
4646 if (use_sg) {
4647 curr_sg = cp->SG;
4648 scsi_for_each_sg(cmd, sg, use_sg, i) {
4649 addr64 = (u64) sg_dma_address(sg);
4650 len = sg_dma_len(sg);
4651 total_len += len;
4652 curr_sg->Addr = cpu_to_le64(addr64);
4653 curr_sg->Len = cpu_to_le32(len);
4654 curr_sg->Ext = cpu_to_le32(0);
4655 curr_sg++;
4656 }
4657 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4658
4659 switch (cmd->sc_data_direction) {
4660 case DMA_TO_DEVICE:
4661 control |= IOACCEL1_CONTROL_DATA_OUT;
4662 break;
4663 case DMA_FROM_DEVICE:
4664 control |= IOACCEL1_CONTROL_DATA_IN;
4665 break;
4666 case DMA_NONE:
4667 control |= IOACCEL1_CONTROL_NODATAXFER;
4668 break;
4669 default:
4670 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4671 cmd->sc_data_direction);
4672 BUG();
4673 break;
4674 }
4675 } else {
4676 control |= IOACCEL1_CONTROL_NODATAXFER;
4677 }
4678
4679 c->Header.SGList = use_sg;
4680 /* Fill out the command structure to submit */
4681 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4682 cp->transfer_len = cpu_to_le32(total_len);
4683 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4684 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4685 cp->control = cpu_to_le32(control);
4686 memcpy(cp->CDB, cdb, cdb_len);
4687 memcpy(cp->CISS_LUN, scsi3addr, 8);
4688 /* Tag was already set at init time. */
4689 enqueue_cmd_and_start_io(h, c);
4690 return 0;
4691 }
4692
4693 /*
4694 * Queue a command directly to a device behind the controller using the
4695 * I/O accelerator path.
4696 */
4697 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4698 struct CommandList *c)
4699 {
4700 struct scsi_cmnd *cmd = c->scsi_cmd;
4701 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4702
4703 if (!dev)
4704 return -1;
4705
4706 c->phys_disk = dev;
4707
4708 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4709 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4710 }
4711
4712 /*
4713 * Set encryption parameters for the ioaccel2 request
4714 */
4715 static void set_encrypt_ioaccel2(struct ctlr_info *h,
4716 struct CommandList *c, struct io_accel2_cmd *cp)
4717 {
4718 struct scsi_cmnd *cmd = c->scsi_cmd;
4719 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4720 struct raid_map_data *map = &dev->raid_map;
4721 u64 first_block;
4722
4723 /* Are we doing encryption on this device */
4724 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4725 return;
4726 /* Set the data encryption key index. */
4727 cp->dekindex = map->dekindex;
4728
4729 /* Set the encryption enable flag, encoded into direction field. */
4730 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4731
4732 /* Set encryption tweak values based on logical block address
4733 * If block size is 512, tweak value is LBA.
4734 * For other block sizes, tweak is (LBA * block size)/ 512)
4735 */
4736 switch (cmd->cmnd[0]) {
4737 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4738 case READ_6:
4739 case WRITE_6:
4740 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4741 (cmd->cmnd[2] << 8) |
4742 cmd->cmnd[3]);
4743 break;
4744 case WRITE_10:
4745 case READ_10:
4746 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4747 case WRITE_12:
4748 case READ_12:
4749 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4750 break;
4751 case WRITE_16:
4752 case READ_16:
4753 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4754 break;
4755 default:
4756 dev_err(&h->pdev->dev,
4757 "ERROR: %s: size (0x%x) not supported for encryption\n",
4758 __func__, cmd->cmnd[0]);
4759 BUG();
4760 break;
4761 }
4762
4763 if (le32_to_cpu(map->volume_blk_size) != 512)
4764 first_block = first_block *
4765 le32_to_cpu(map->volume_blk_size)/512;
4766
4767 cp->tweak_lower = cpu_to_le32(first_block);
4768 cp->tweak_upper = cpu_to_le32(first_block >> 32);
4769 }
4770
4771 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4772 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4773 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4774 {
4775 struct scsi_cmnd *cmd = c->scsi_cmd;
4776 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4777 struct ioaccel2_sg_element *curr_sg;
4778 int use_sg, i;
4779 struct scatterlist *sg;
4780 u64 addr64;
4781 u32 len;
4782 u32 total_len = 0;
4783
4784 if (!cmd->device)
4785 return -1;
4786
4787 if (!cmd->device->hostdata)
4788 return -1;
4789
4790 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4791
4792 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4793 atomic_dec(&phys_disk->ioaccel_cmds_out);
4794 return IO_ACCEL_INELIGIBLE;
4795 }
4796
4797 c->cmd_type = CMD_IOACCEL2;
4798 /* Adjust the DMA address to point to the accelerated command buffer */
4799 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4800 (c->cmdindex * sizeof(*cp));
4801 BUG_ON(c->busaddr & 0x0000007F);
4802
4803 memset(cp, 0, sizeof(*cp));
4804 cp->IU_type = IOACCEL2_IU_TYPE;
4805
4806 use_sg = scsi_dma_map(cmd);
4807 if (use_sg < 0) {
4808 atomic_dec(&phys_disk->ioaccel_cmds_out);
4809 return use_sg;
4810 }
4811
4812 if (use_sg) {
4813 curr_sg = cp->sg;
4814 if (use_sg > h->ioaccel_maxsg) {
4815 addr64 = le64_to_cpu(
4816 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4817 curr_sg->address = cpu_to_le64(addr64);
4818 curr_sg->length = 0;
4819 curr_sg->reserved[0] = 0;
4820 curr_sg->reserved[1] = 0;
4821 curr_sg->reserved[2] = 0;
4822 curr_sg->chain_indicator = IOACCEL2_CHAIN;
4823
4824 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4825 }
4826 scsi_for_each_sg(cmd, sg, use_sg, i) {
4827 addr64 = (u64) sg_dma_address(sg);
4828 len = sg_dma_len(sg);
4829 total_len += len;
4830 curr_sg->address = cpu_to_le64(addr64);
4831 curr_sg->length = cpu_to_le32(len);
4832 curr_sg->reserved[0] = 0;
4833 curr_sg->reserved[1] = 0;
4834 curr_sg->reserved[2] = 0;
4835 curr_sg->chain_indicator = 0;
4836 curr_sg++;
4837 }
4838
4839 /*
4840 * Set the last s/g element bit
4841 */
4842 (curr_sg - 1)->chain_indicator = IOACCEL2_LAST_SG;
4843
4844 switch (cmd->sc_data_direction) {
4845 case DMA_TO_DEVICE:
4846 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4847 cp->direction |= IOACCEL2_DIR_DATA_OUT;
4848 break;
4849 case DMA_FROM_DEVICE:
4850 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4851 cp->direction |= IOACCEL2_DIR_DATA_IN;
4852 break;
4853 case DMA_NONE:
4854 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4855 cp->direction |= IOACCEL2_DIR_NO_DATA;
4856 break;
4857 default:
4858 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4859 cmd->sc_data_direction);
4860 BUG();
4861 break;
4862 }
4863 } else {
4864 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4865 cp->direction |= IOACCEL2_DIR_NO_DATA;
4866 }
4867
4868 /* Set encryption parameters, if necessary */
4869 set_encrypt_ioaccel2(h, c, cp);
4870
4871 cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4872 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4873 memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4874
4875 cp->data_len = cpu_to_le32(total_len);
4876 cp->err_ptr = cpu_to_le64(c->busaddr +
4877 offsetof(struct io_accel2_cmd, error_data));
4878 cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4879
4880 /* fill in sg elements */
4881 if (use_sg > h->ioaccel_maxsg) {
4882 cp->sg_count = 1;
4883 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
4884 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4885 atomic_dec(&phys_disk->ioaccel_cmds_out);
4886 scsi_dma_unmap(cmd);
4887 return -1;
4888 }
4889 } else
4890 cp->sg_count = (u8) use_sg;
4891
4892 enqueue_cmd_and_start_io(h, c);
4893 return 0;
4894 }
4895
4896 /*
4897 * Queue a command to the correct I/O accelerator path.
4898 */
4899 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
4900 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4901 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4902 {
4903 if (!c->scsi_cmd->device)
4904 return -1;
4905
4906 if (!c->scsi_cmd->device->hostdata)
4907 return -1;
4908
4909 /* Try to honor the device's queue depth */
4910 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
4911 phys_disk->queue_depth) {
4912 atomic_dec(&phys_disk->ioaccel_cmds_out);
4913 return IO_ACCEL_INELIGIBLE;
4914 }
4915 if (h->transMethod & CFGTBL_Trans_io_accel1)
4916 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
4917 cdb, cdb_len, scsi3addr,
4918 phys_disk);
4919 else
4920 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
4921 cdb, cdb_len, scsi3addr,
4922 phys_disk);
4923 }
4924
4925 static void raid_map_helper(struct raid_map_data *map,
4926 int offload_to_mirror, u32 *map_index, u32 *current_group)
4927 {
4928 if (offload_to_mirror == 0) {
4929 /* use physical disk in the first mirrored group. */
4930 *map_index %= le16_to_cpu(map->data_disks_per_row);
4931 return;
4932 }
4933 do {
4934 /* determine mirror group that *map_index indicates */
4935 *current_group = *map_index /
4936 le16_to_cpu(map->data_disks_per_row);
4937 if (offload_to_mirror == *current_group)
4938 continue;
4939 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
4940 /* select map index from next group */
4941 *map_index += le16_to_cpu(map->data_disks_per_row);
4942 (*current_group)++;
4943 } else {
4944 /* select map index from first group */
4945 *map_index %= le16_to_cpu(map->data_disks_per_row);
4946 *current_group = 0;
4947 }
4948 } while (offload_to_mirror != *current_group);
4949 }
4950
4951 /*
4952 * Attempt to perform offload RAID mapping for a logical volume I/O.
4953 */
4954 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
4955 struct CommandList *c)
4956 {
4957 struct scsi_cmnd *cmd = c->scsi_cmd;
4958 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4959 struct raid_map_data *map = &dev->raid_map;
4960 struct raid_map_disk_data *dd = &map->data[0];
4961 int is_write = 0;
4962 u32 map_index;
4963 u64 first_block, last_block;
4964 u32 block_cnt;
4965 u32 blocks_per_row;
4966 u64 first_row, last_row;
4967 u32 first_row_offset, last_row_offset;
4968 u32 first_column, last_column;
4969 u64 r0_first_row, r0_last_row;
4970 u32 r5or6_blocks_per_row;
4971 u64 r5or6_first_row, r5or6_last_row;
4972 u32 r5or6_first_row_offset, r5or6_last_row_offset;
4973 u32 r5or6_first_column, r5or6_last_column;
4974 u32 total_disks_per_row;
4975 u32 stripesize;
4976 u32 first_group, last_group, current_group;
4977 u32 map_row;
4978 u32 disk_handle;
4979 u64 disk_block;
4980 u32 disk_block_cnt;
4981 u8 cdb[16];
4982 u8 cdb_len;
4983 u16 strip_size;
4984 #if BITS_PER_LONG == 32
4985 u64 tmpdiv;
4986 #endif
4987 int offload_to_mirror;
4988
4989 if (!dev)
4990 return -1;
4991
4992 /* check for valid opcode, get LBA and block count */
4993 switch (cmd->cmnd[0]) {
4994 case WRITE_6:
4995 is_write = 1;
4996 case READ_6:
4997 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4998 (cmd->cmnd[2] << 8) |
4999 cmd->cmnd[3]);
5000 block_cnt = cmd->cmnd[4];
5001 if (block_cnt == 0)
5002 block_cnt = 256;
5003 break;
5004 case WRITE_10:
5005 is_write = 1;
5006 case READ_10:
5007 first_block =
5008 (((u64) cmd->cmnd[2]) << 24) |
5009 (((u64) cmd->cmnd[3]) << 16) |
5010 (((u64) cmd->cmnd[4]) << 8) |
5011 cmd->cmnd[5];
5012 block_cnt =
5013 (((u32) cmd->cmnd[7]) << 8) |
5014 cmd->cmnd[8];
5015 break;
5016 case WRITE_12:
5017 is_write = 1;
5018 case READ_12:
5019 first_block =
5020 (((u64) cmd->cmnd[2]) << 24) |
5021 (((u64) cmd->cmnd[3]) << 16) |
5022 (((u64) cmd->cmnd[4]) << 8) |
5023 cmd->cmnd[5];
5024 block_cnt =
5025 (((u32) cmd->cmnd[6]) << 24) |
5026 (((u32) cmd->cmnd[7]) << 16) |
5027 (((u32) cmd->cmnd[8]) << 8) |
5028 cmd->cmnd[9];
5029 break;
5030 case WRITE_16:
5031 is_write = 1;
5032 case READ_16:
5033 first_block =
5034 (((u64) cmd->cmnd[2]) << 56) |
5035 (((u64) cmd->cmnd[3]) << 48) |
5036 (((u64) cmd->cmnd[4]) << 40) |
5037 (((u64) cmd->cmnd[5]) << 32) |
5038 (((u64) cmd->cmnd[6]) << 24) |
5039 (((u64) cmd->cmnd[7]) << 16) |
5040 (((u64) cmd->cmnd[8]) << 8) |
5041 cmd->cmnd[9];
5042 block_cnt =
5043 (((u32) cmd->cmnd[10]) << 24) |
5044 (((u32) cmd->cmnd[11]) << 16) |
5045 (((u32) cmd->cmnd[12]) << 8) |
5046 cmd->cmnd[13];
5047 break;
5048 default:
5049 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
5050 }
5051 last_block = first_block + block_cnt - 1;
5052
5053 /* check for write to non-RAID-0 */
5054 if (is_write && dev->raid_level != 0)
5055 return IO_ACCEL_INELIGIBLE;
5056
5057 /* check for invalid block or wraparound */
5058 if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
5059 last_block < first_block)
5060 return IO_ACCEL_INELIGIBLE;
5061
5062 /* calculate stripe information for the request */
5063 blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
5064 le16_to_cpu(map->strip_size);
5065 strip_size = le16_to_cpu(map->strip_size);
5066 #if BITS_PER_LONG == 32
5067 tmpdiv = first_block;
5068 (void) do_div(tmpdiv, blocks_per_row);
5069 first_row = tmpdiv;
5070 tmpdiv = last_block;
5071 (void) do_div(tmpdiv, blocks_per_row);
5072 last_row = tmpdiv;
5073 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5074 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5075 tmpdiv = first_row_offset;
5076 (void) do_div(tmpdiv, strip_size);
5077 first_column = tmpdiv;
5078 tmpdiv = last_row_offset;
5079 (void) do_div(tmpdiv, strip_size);
5080 last_column = tmpdiv;
5081 #else
5082 first_row = first_block / blocks_per_row;
5083 last_row = last_block / blocks_per_row;
5084 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5085 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5086 first_column = first_row_offset / strip_size;
5087 last_column = last_row_offset / strip_size;
5088 #endif
5089
5090 /* if this isn't a single row/column then give to the controller */
5091 if ((first_row != last_row) || (first_column != last_column))
5092 return IO_ACCEL_INELIGIBLE;
5093
5094 /* proceeding with driver mapping */
5095 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
5096 le16_to_cpu(map->metadata_disks_per_row);
5097 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5098 le16_to_cpu(map->row_cnt);
5099 map_index = (map_row * total_disks_per_row) + first_column;
5100
5101 switch (dev->raid_level) {
5102 case HPSA_RAID_0:
5103 break; /* nothing special to do */
5104 case HPSA_RAID_1:
5105 /* Handles load balance across RAID 1 members.
5106 * (2-drive R1 and R10 with even # of drives.)
5107 * Appropriate for SSDs, not optimal for HDDs
5108 */
5109 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
5110 if (dev->offload_to_mirror)
5111 map_index += le16_to_cpu(map->data_disks_per_row);
5112 dev->offload_to_mirror = !dev->offload_to_mirror;
5113 break;
5114 case HPSA_RAID_ADM:
5115 /* Handles N-way mirrors (R1-ADM)
5116 * and R10 with # of drives divisible by 3.)
5117 */
5118 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
5119
5120 offload_to_mirror = dev->offload_to_mirror;
5121 raid_map_helper(map, offload_to_mirror,
5122 &map_index, &current_group);
5123 /* set mirror group to use next time */
5124 offload_to_mirror =
5125 (offload_to_mirror >=
5126 le16_to_cpu(map->layout_map_count) - 1)
5127 ? 0 : offload_to_mirror + 1;
5128 dev->offload_to_mirror = offload_to_mirror;
5129 /* Avoid direct use of dev->offload_to_mirror within this
5130 * function since multiple threads might simultaneously
5131 * increment it beyond the range of dev->layout_map_count -1.
5132 */
5133 break;
5134 case HPSA_RAID_5:
5135 case HPSA_RAID_6:
5136 if (le16_to_cpu(map->layout_map_count) <= 1)
5137 break;
5138
5139 /* Verify first and last block are in same RAID group */
5140 r5or6_blocks_per_row =
5141 le16_to_cpu(map->strip_size) *
5142 le16_to_cpu(map->data_disks_per_row);
5143 BUG_ON(r5or6_blocks_per_row == 0);
5144 stripesize = r5or6_blocks_per_row *
5145 le16_to_cpu(map->layout_map_count);
5146 #if BITS_PER_LONG == 32
5147 tmpdiv = first_block;
5148 first_group = do_div(tmpdiv, stripesize);
5149 tmpdiv = first_group;
5150 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5151 first_group = tmpdiv;
5152 tmpdiv = last_block;
5153 last_group = do_div(tmpdiv, stripesize);
5154 tmpdiv = last_group;
5155 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5156 last_group = tmpdiv;
5157 #else
5158 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
5159 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
5160 #endif
5161 if (first_group != last_group)
5162 return IO_ACCEL_INELIGIBLE;
5163
5164 /* Verify request is in a single row of RAID 5/6 */
5165 #if BITS_PER_LONG == 32
5166 tmpdiv = first_block;
5167 (void) do_div(tmpdiv, stripesize);
5168 first_row = r5or6_first_row = r0_first_row = tmpdiv;
5169 tmpdiv = last_block;
5170 (void) do_div(tmpdiv, stripesize);
5171 r5or6_last_row = r0_last_row = tmpdiv;
5172 #else
5173 first_row = r5or6_first_row = r0_first_row =
5174 first_block / stripesize;
5175 r5or6_last_row = r0_last_row = last_block / stripesize;
5176 #endif
5177 if (r5or6_first_row != r5or6_last_row)
5178 return IO_ACCEL_INELIGIBLE;
5179
5180
5181 /* Verify request is in a single column */
5182 #if BITS_PER_LONG == 32
5183 tmpdiv = first_block;
5184 first_row_offset = do_div(tmpdiv, stripesize);
5185 tmpdiv = first_row_offset;
5186 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
5187 r5or6_first_row_offset = first_row_offset;
5188 tmpdiv = last_block;
5189 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
5190 tmpdiv = r5or6_last_row_offset;
5191 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
5192 tmpdiv = r5or6_first_row_offset;
5193 (void) do_div(tmpdiv, map->strip_size);
5194 first_column = r5or6_first_column = tmpdiv;
5195 tmpdiv = r5or6_last_row_offset;
5196 (void) do_div(tmpdiv, map->strip_size);
5197 r5or6_last_column = tmpdiv;
5198 #else
5199 first_row_offset = r5or6_first_row_offset =
5200 (u32)((first_block % stripesize) %
5201 r5or6_blocks_per_row);
5202
5203 r5or6_last_row_offset =
5204 (u32)((last_block % stripesize) %
5205 r5or6_blocks_per_row);
5206
5207 first_column = r5or6_first_column =
5208 r5or6_first_row_offset / le16_to_cpu(map->strip_size);
5209 r5or6_last_column =
5210 r5or6_last_row_offset / le16_to_cpu(map->strip_size);
5211 #endif
5212 if (r5or6_first_column != r5or6_last_column)
5213 return IO_ACCEL_INELIGIBLE;
5214
5215 /* Request is eligible */
5216 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5217 le16_to_cpu(map->row_cnt);
5218
5219 map_index = (first_group *
5220 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
5221 (map_row * total_disks_per_row) + first_column;
5222 break;
5223 default:
5224 return IO_ACCEL_INELIGIBLE;
5225 }
5226
5227 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
5228 return IO_ACCEL_INELIGIBLE;
5229
5230 c->phys_disk = dev->phys_disk[map_index];
5231 if (!c->phys_disk)
5232 return IO_ACCEL_INELIGIBLE;
5233
5234 disk_handle = dd[map_index].ioaccel_handle;
5235 disk_block = le64_to_cpu(map->disk_starting_blk) +
5236 first_row * le16_to_cpu(map->strip_size) +
5237 (first_row_offset - first_column *
5238 le16_to_cpu(map->strip_size));
5239 disk_block_cnt = block_cnt;
5240
5241 /* handle differing logical/physical block sizes */
5242 if (map->phys_blk_shift) {
5243 disk_block <<= map->phys_blk_shift;
5244 disk_block_cnt <<= map->phys_blk_shift;
5245 }
5246 BUG_ON(disk_block_cnt > 0xffff);
5247
5248 /* build the new CDB for the physical disk I/O */
5249 if (disk_block > 0xffffffff) {
5250 cdb[0] = is_write ? WRITE_16 : READ_16;
5251 cdb[1] = 0;
5252 cdb[2] = (u8) (disk_block >> 56);
5253 cdb[3] = (u8) (disk_block >> 48);
5254 cdb[4] = (u8) (disk_block >> 40);
5255 cdb[5] = (u8) (disk_block >> 32);
5256 cdb[6] = (u8) (disk_block >> 24);
5257 cdb[7] = (u8) (disk_block >> 16);
5258 cdb[8] = (u8) (disk_block >> 8);
5259 cdb[9] = (u8) (disk_block);
5260 cdb[10] = (u8) (disk_block_cnt >> 24);
5261 cdb[11] = (u8) (disk_block_cnt >> 16);
5262 cdb[12] = (u8) (disk_block_cnt >> 8);
5263 cdb[13] = (u8) (disk_block_cnt);
5264 cdb[14] = 0;
5265 cdb[15] = 0;
5266 cdb_len = 16;
5267 } else {
5268 cdb[0] = is_write ? WRITE_10 : READ_10;
5269 cdb[1] = 0;
5270 cdb[2] = (u8) (disk_block >> 24);
5271 cdb[3] = (u8) (disk_block >> 16);
5272 cdb[4] = (u8) (disk_block >> 8);
5273 cdb[5] = (u8) (disk_block);
5274 cdb[6] = 0;
5275 cdb[7] = (u8) (disk_block_cnt >> 8);
5276 cdb[8] = (u8) (disk_block_cnt);
5277 cdb[9] = 0;
5278 cdb_len = 10;
5279 }
5280 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
5281 dev->scsi3addr,
5282 dev->phys_disk[map_index]);
5283 }
5284
5285 /*
5286 * Submit commands down the "normal" RAID stack path
5287 * All callers to hpsa_ciss_submit must check lockup_detected
5288 * beforehand, before (opt.) and after calling cmd_alloc
5289 */
5290 static int hpsa_ciss_submit(struct ctlr_info *h,
5291 struct CommandList *c, struct scsi_cmnd *cmd,
5292 unsigned char scsi3addr[])
5293 {
5294 cmd->host_scribble = (unsigned char *) c;
5295 c->cmd_type = CMD_SCSI;
5296 c->scsi_cmd = cmd;
5297 c->Header.ReplyQueue = 0; /* unused in simple mode */
5298 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
5299 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5300
5301 /* Fill in the request block... */
5302
5303 c->Request.Timeout = 0;
5304 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5305 c->Request.CDBLen = cmd->cmd_len;
5306 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5307 switch (cmd->sc_data_direction) {
5308 case DMA_TO_DEVICE:
5309 c->Request.type_attr_dir =
5310 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5311 break;
5312 case DMA_FROM_DEVICE:
5313 c->Request.type_attr_dir =
5314 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5315 break;
5316 case DMA_NONE:
5317 c->Request.type_attr_dir =
5318 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5319 break;
5320 case DMA_BIDIRECTIONAL:
5321 /* This can happen if a buggy application does a scsi passthru
5322 * and sets both inlen and outlen to non-zero. ( see
5323 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5324 */
5325
5326 c->Request.type_attr_dir =
5327 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5328 /* This is technically wrong, and hpsa controllers should
5329 * reject it with CMD_INVALID, which is the most correct
5330 * response, but non-fibre backends appear to let it
5331 * slide by, and give the same results as if this field
5332 * were set correctly. Either way is acceptable for
5333 * our purposes here.
5334 */
5335
5336 break;
5337
5338 default:
5339 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5340 cmd->sc_data_direction);
5341 BUG();
5342 break;
5343 }
5344
5345 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
5346 hpsa_cmd_resolve_and_free(h, c);
5347 return SCSI_MLQUEUE_HOST_BUSY;
5348 }
5349 enqueue_cmd_and_start_io(h, c);
5350 /* the cmd'll come back via intr handler in complete_scsi_command() */
5351 return 0;
5352 }
5353
5354 static void hpsa_cmd_init(struct ctlr_info *h, int index,
5355 struct CommandList *c)
5356 {
5357 dma_addr_t cmd_dma_handle, err_dma_handle;
5358
5359 /* Zero out all of commandlist except the last field, refcount */
5360 memset(c, 0, offsetof(struct CommandList, refcount));
5361 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5362 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5363 c->err_info = h->errinfo_pool + index;
5364 memset(c->err_info, 0, sizeof(*c->err_info));
5365 err_dma_handle = h->errinfo_pool_dhandle
5366 + index * sizeof(*c->err_info);
5367 c->cmdindex = index;
5368 c->busaddr = (u32) cmd_dma_handle;
5369 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5370 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5371 c->h = h;
5372 c->scsi_cmd = SCSI_CMD_IDLE;
5373 }
5374
5375 static void hpsa_preinitialize_commands(struct ctlr_info *h)
5376 {
5377 int i;
5378
5379 for (i = 0; i < h->nr_cmds; i++) {
5380 struct CommandList *c = h->cmd_pool + i;
5381
5382 hpsa_cmd_init(h, i, c);
5383 atomic_set(&c->refcount, 0);
5384 }
5385 }
5386
5387 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5388 struct CommandList *c)
5389 {
5390 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5391
5392 BUG_ON(c->cmdindex != index);
5393
5394 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5395 memset(c->err_info, 0, sizeof(*c->err_info));
5396 c->busaddr = (u32) cmd_dma_handle;
5397 }
5398
5399 static int hpsa_ioaccel_submit(struct ctlr_info *h,
5400 struct CommandList *c, struct scsi_cmnd *cmd,
5401 unsigned char *scsi3addr)
5402 {
5403 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5404 int rc = IO_ACCEL_INELIGIBLE;
5405
5406 if (!dev)
5407 return SCSI_MLQUEUE_HOST_BUSY;
5408
5409 cmd->host_scribble = (unsigned char *) c;
5410
5411 if (dev->offload_enabled) {
5412 hpsa_cmd_init(h, c->cmdindex, c);
5413 c->cmd_type = CMD_SCSI;
5414 c->scsi_cmd = cmd;
5415 rc = hpsa_scsi_ioaccel_raid_map(h, c);
5416 if (rc < 0) /* scsi_dma_map failed. */
5417 rc = SCSI_MLQUEUE_HOST_BUSY;
5418 } else if (dev->hba_ioaccel_enabled) {
5419 hpsa_cmd_init(h, c->cmdindex, c);
5420 c->cmd_type = CMD_SCSI;
5421 c->scsi_cmd = cmd;
5422 rc = hpsa_scsi_ioaccel_direct_map(h, c);
5423 if (rc < 0) /* scsi_dma_map failed. */
5424 rc = SCSI_MLQUEUE_HOST_BUSY;
5425 }
5426 return rc;
5427 }
5428
5429 static void hpsa_command_resubmit_worker(struct work_struct *work)
5430 {
5431 struct scsi_cmnd *cmd;
5432 struct hpsa_scsi_dev_t *dev;
5433 struct CommandList *c = container_of(work, struct CommandList, work);
5434
5435 cmd = c->scsi_cmd;
5436 dev = cmd->device->hostdata;
5437 if (!dev) {
5438 cmd->result = DID_NO_CONNECT << 16;
5439 return hpsa_cmd_free_and_done(c->h, c, cmd);
5440 }
5441 if (c->reset_pending)
5442 return hpsa_cmd_resolve_and_free(c->h, c);
5443 if (c->abort_pending)
5444 return hpsa_cmd_abort_and_free(c->h, c, cmd);
5445 if (c->cmd_type == CMD_IOACCEL2) {
5446 struct ctlr_info *h = c->h;
5447 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5448 int rc;
5449
5450 if (c2->error_data.serv_response ==
5451 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5452 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
5453 if (rc == 0)
5454 return;
5455 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5456 /*
5457 * If we get here, it means dma mapping failed.
5458 * Try again via scsi mid layer, which will
5459 * then get SCSI_MLQUEUE_HOST_BUSY.
5460 */
5461 cmd->result = DID_IMM_RETRY << 16;
5462 return hpsa_cmd_free_and_done(h, c, cmd);
5463 }
5464 /* else, fall thru and resubmit down CISS path */
5465 }
5466 }
5467 hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5468 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
5469 /*
5470 * If we get here, it means dma mapping failed. Try
5471 * again via scsi mid layer, which will then get
5472 * SCSI_MLQUEUE_HOST_BUSY.
5473 *
5474 * hpsa_ciss_submit will have already freed c
5475 * if it encountered a dma mapping failure.
5476 */
5477 cmd->result = DID_IMM_RETRY << 16;
5478 cmd->scsi_done(cmd);
5479 }
5480 }
5481
5482 /* Running in struct Scsi_Host->host_lock less mode */
5483 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5484 {
5485 struct ctlr_info *h;
5486 struct hpsa_scsi_dev_t *dev;
5487 unsigned char scsi3addr[8];
5488 struct CommandList *c;
5489 int rc = 0;
5490
5491 /* Get the ptr to our adapter structure out of cmd->host. */
5492 h = sdev_to_hba(cmd->device);
5493
5494 BUG_ON(cmd->request->tag < 0);
5495
5496 dev = cmd->device->hostdata;
5497 if (!dev) {
5498 cmd->result = NOT_READY << 16; /* host byte */
5499 cmd->scsi_done(cmd);
5500 return 0;
5501 }
5502
5503 if (dev->removed) {
5504 cmd->result = DID_NO_CONNECT << 16;
5505 cmd->scsi_done(cmd);
5506 return 0;
5507 }
5508
5509 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
5510
5511 if (unlikely(lockup_detected(h))) {
5512 cmd->result = DID_NO_CONNECT << 16;
5513 cmd->scsi_done(cmd);
5514 return 0;
5515 }
5516 c = cmd_tagged_alloc(h, cmd);
5517
5518 /*
5519 * This is necessary because the SML doesn't zero out this field during
5520 * error recovery.
5521 */
5522 cmd->result = 0;
5523
5524 /*
5525 * Call alternate submit routine for I/O accelerated commands.
5526 * Retries always go down the normal I/O path.
5527 */
5528 if (likely(cmd->retries == 0 &&
5529 cmd->request->cmd_type == REQ_TYPE_FS &&
5530 h->acciopath_status)) {
5531 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
5532 if (rc == 0)
5533 return 0;
5534 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5535 hpsa_cmd_resolve_and_free(h, c);
5536 return SCSI_MLQUEUE_HOST_BUSY;
5537 }
5538 }
5539 return hpsa_ciss_submit(h, c, cmd, scsi3addr);
5540 }
5541
5542 static void hpsa_scan_complete(struct ctlr_info *h)
5543 {
5544 unsigned long flags;
5545
5546 spin_lock_irqsave(&h->scan_lock, flags);
5547 h->scan_finished = 1;
5548 wake_up(&h->scan_wait_queue);
5549 spin_unlock_irqrestore(&h->scan_lock, flags);
5550 }
5551
5552 static void hpsa_scan_start(struct Scsi_Host *sh)
5553 {
5554 struct ctlr_info *h = shost_to_hba(sh);
5555 unsigned long flags;
5556
5557 /*
5558 * Don't let rescans be initiated on a controller known to be locked
5559 * up. If the controller locks up *during* a rescan, that thread is
5560 * probably hosed, but at least we can prevent new rescan threads from
5561 * piling up on a locked up controller.
5562 */
5563 if (unlikely(lockup_detected(h)))
5564 return hpsa_scan_complete(h);
5565
5566 /*
5567 * If a scan is already waiting to run, no need to add another
5568 */
5569 spin_lock_irqsave(&h->scan_lock, flags);
5570 if (h->scan_waiting) {
5571 spin_unlock_irqrestore(&h->scan_lock, flags);
5572 return;
5573 }
5574
5575 spin_unlock_irqrestore(&h->scan_lock, flags);
5576
5577 /* wait until any scan already in progress is finished. */
5578 while (1) {
5579 spin_lock_irqsave(&h->scan_lock, flags);
5580 if (h->scan_finished)
5581 break;
5582 h->scan_waiting = 1;
5583 spin_unlock_irqrestore(&h->scan_lock, flags);
5584 wait_event(h->scan_wait_queue, h->scan_finished);
5585 /* Note: We don't need to worry about a race between this
5586 * thread and driver unload because the midlayer will
5587 * have incremented the reference count, so unload won't
5588 * happen if we're in here.
5589 */
5590 }
5591 h->scan_finished = 0; /* mark scan as in progress */
5592 h->scan_waiting = 0;
5593 spin_unlock_irqrestore(&h->scan_lock, flags);
5594
5595 if (unlikely(lockup_detected(h)))
5596 return hpsa_scan_complete(h);
5597
5598 hpsa_update_scsi_devices(h);
5599
5600 hpsa_scan_complete(h);
5601 }
5602
5603 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
5604 {
5605 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
5606
5607 if (!logical_drive)
5608 return -ENODEV;
5609
5610 if (qdepth < 1)
5611 qdepth = 1;
5612 else if (qdepth > logical_drive->queue_depth)
5613 qdepth = logical_drive->queue_depth;
5614
5615 return scsi_change_queue_depth(sdev, qdepth);
5616 }
5617
5618 static int hpsa_scan_finished(struct Scsi_Host *sh,
5619 unsigned long elapsed_time)
5620 {
5621 struct ctlr_info *h = shost_to_hba(sh);
5622 unsigned long flags;
5623 int finished;
5624
5625 spin_lock_irqsave(&h->scan_lock, flags);
5626 finished = h->scan_finished;
5627 spin_unlock_irqrestore(&h->scan_lock, flags);
5628 return finished;
5629 }
5630
5631 static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5632 {
5633 struct Scsi_Host *sh;
5634
5635 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
5636 if (sh == NULL) {
5637 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5638 return -ENOMEM;
5639 }
5640
5641 sh->io_port = 0;
5642 sh->n_io_port = 0;
5643 sh->this_id = -1;
5644 sh->max_channel = 3;
5645 sh->max_cmd_len = MAX_COMMAND_SIZE;
5646 sh->max_lun = HPSA_MAX_LUN;
5647 sh->max_id = HPSA_MAX_LUN;
5648 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5649 sh->cmd_per_lun = sh->can_queue;
5650 sh->sg_tablesize = h->maxsgentries;
5651 sh->transportt = hpsa_sas_transport_template;
5652 sh->hostdata[0] = (unsigned long) h;
5653 sh->irq = h->intr[h->intr_mode];
5654 sh->unique_id = sh->irq;
5655
5656 h->scsi_host = sh;
5657 return 0;
5658 }
5659
5660 static int hpsa_scsi_add_host(struct ctlr_info *h)
5661 {
5662 int rv;
5663
5664 rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5665 if (rv) {
5666 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5667 return rv;
5668 }
5669 scsi_scan_host(h->scsi_host);
5670 return 0;
5671 }
5672
5673 /*
5674 * The block layer has already gone to the trouble of picking out a unique,
5675 * small-integer tag for this request. We use an offset from that value as
5676 * an index to select our command block. (The offset allows us to reserve the
5677 * low-numbered entries for our own uses.)
5678 */
5679 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5680 {
5681 int idx = scmd->request->tag;
5682
5683 if (idx < 0)
5684 return idx;
5685
5686 /* Offset to leave space for internal cmds. */
5687 return idx += HPSA_NRESERVED_CMDS;
5688 }
5689
5690 /*
5691 * Send a TEST_UNIT_READY command to the specified LUN using the specified
5692 * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5693 */
5694 static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5695 struct CommandList *c, unsigned char lunaddr[],
5696 int reply_queue)
5697 {
5698 int rc;
5699
5700 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5701 (void) fill_cmd(c, TEST_UNIT_READY, h,
5702 NULL, 0, 0, lunaddr, TYPE_CMD);
5703 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
5704 if (rc)
5705 return rc;
5706 /* no unmap needed here because no data xfer. */
5707
5708 /* Check if the unit is already ready. */
5709 if (c->err_info->CommandStatus == CMD_SUCCESS)
5710 return 0;
5711
5712 /*
5713 * The first command sent after reset will receive "unit attention" to
5714 * indicate that the LUN has been reset...this is actually what we're
5715 * looking for (but, success is good too).
5716 */
5717 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5718 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5719 (c->err_info->SenseInfo[2] == NO_SENSE ||
5720 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5721 return 0;
5722
5723 return 1;
5724 }
5725
5726 /*
5727 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5728 * returns zero when the unit is ready, and non-zero when giving up.
5729 */
5730 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5731 struct CommandList *c,
5732 unsigned char lunaddr[], int reply_queue)
5733 {
5734 int rc;
5735 int count = 0;
5736 int waittime = 1; /* seconds */
5737
5738 /* Send test unit ready until device ready, or give up. */
5739 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5740
5741 /*
5742 * Wait for a bit. do this first, because if we send
5743 * the TUR right away, the reset will just abort it.
5744 */
5745 msleep(1000 * waittime);
5746
5747 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5748 if (!rc)
5749 break;
5750
5751 /* Increase wait time with each try, up to a point. */
5752 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5753 waittime *= 2;
5754
5755 dev_warn(&h->pdev->dev,
5756 "waiting %d secs for device to become ready.\n",
5757 waittime);
5758 }
5759
5760 return rc;
5761 }
5762
5763 static int wait_for_device_to_become_ready(struct ctlr_info *h,
5764 unsigned char lunaddr[],
5765 int reply_queue)
5766 {
5767 int first_queue;
5768 int last_queue;
5769 int rq;
5770 int rc = 0;
5771 struct CommandList *c;
5772
5773 c = cmd_alloc(h);
5774
5775 /*
5776 * If no specific reply queue was requested, then send the TUR
5777 * repeatedly, requesting a reply on each reply queue; otherwise execute
5778 * the loop exactly once using only the specified queue.
5779 */
5780 if (reply_queue == DEFAULT_REPLY_QUEUE) {
5781 first_queue = 0;
5782 last_queue = h->nreply_queues - 1;
5783 } else {
5784 first_queue = reply_queue;
5785 last_queue = reply_queue;
5786 }
5787
5788 for (rq = first_queue; rq <= last_queue; rq++) {
5789 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5790 if (rc)
5791 break;
5792 }
5793
5794 if (rc)
5795 dev_warn(&h->pdev->dev, "giving up on device.\n");
5796 else
5797 dev_warn(&h->pdev->dev, "device is ready.\n");
5798
5799 cmd_free(h, c);
5800 return rc;
5801 }
5802
5803 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5804 * complaining. Doing a host- or bus-reset can't do anything good here.
5805 */
5806 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5807 {
5808 int rc;
5809 struct ctlr_info *h;
5810 struct hpsa_scsi_dev_t *dev;
5811 u8 reset_type;
5812 char msg[48];
5813
5814 /* find the controller to which the command to be aborted was sent */
5815 h = sdev_to_hba(scsicmd->device);
5816 if (h == NULL) /* paranoia */
5817 return FAILED;
5818
5819 if (lockup_detected(h))
5820 return FAILED;
5821
5822 dev = scsicmd->device->hostdata;
5823 if (!dev) {
5824 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5825 return FAILED;
5826 }
5827
5828 /* if controller locked up, we can guarantee command won't complete */
5829 if (lockup_detected(h)) {
5830 snprintf(msg, sizeof(msg),
5831 "cmd %d RESET FAILED, lockup detected",
5832 hpsa_get_cmd_index(scsicmd));
5833 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5834 return FAILED;
5835 }
5836
5837 /* this reset request might be the result of a lockup; check */
5838 if (detect_controller_lockup(h)) {
5839 snprintf(msg, sizeof(msg),
5840 "cmd %d RESET FAILED, new lockup detected",
5841 hpsa_get_cmd_index(scsicmd));
5842 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5843 return FAILED;
5844 }
5845
5846 /* Do not attempt on controller */
5847 if (is_hba_lunid(dev->scsi3addr))
5848 return SUCCESS;
5849
5850 if (is_logical_dev_addr_mode(dev->scsi3addr))
5851 reset_type = HPSA_DEVICE_RESET_MSG;
5852 else
5853 reset_type = HPSA_PHYS_TARGET_RESET;
5854
5855 sprintf(msg, "resetting %s",
5856 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
5857 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5858
5859 h->reset_in_progress = 1;
5860
5861 /* send a reset to the SCSI LUN which the command was sent to */
5862 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type,
5863 DEFAULT_REPLY_QUEUE);
5864 sprintf(msg, "reset %s %s",
5865 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
5866 rc == 0 ? "completed successfully" : "failed");
5867 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5868 h->reset_in_progress = 0;
5869 return rc == 0 ? SUCCESS : FAILED;
5870 }
5871
5872 static void swizzle_abort_tag(u8 *tag)
5873 {
5874 u8 original_tag[8];
5875
5876 memcpy(original_tag, tag, 8);
5877 tag[0] = original_tag[3];
5878 tag[1] = original_tag[2];
5879 tag[2] = original_tag[1];
5880 tag[3] = original_tag[0];
5881 tag[4] = original_tag[7];
5882 tag[5] = original_tag[6];
5883 tag[6] = original_tag[5];
5884 tag[7] = original_tag[4];
5885 }
5886
5887 static void hpsa_get_tag(struct ctlr_info *h,
5888 struct CommandList *c, __le32 *taglower, __le32 *tagupper)
5889 {
5890 u64 tag;
5891 if (c->cmd_type == CMD_IOACCEL1) {
5892 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
5893 &h->ioaccel_cmd_pool[c->cmdindex];
5894 tag = le64_to_cpu(cm1->tag);
5895 *tagupper = cpu_to_le32(tag >> 32);
5896 *taglower = cpu_to_le32(tag);
5897 return;
5898 }
5899 if (c->cmd_type == CMD_IOACCEL2) {
5900 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
5901 &h->ioaccel2_cmd_pool[c->cmdindex];
5902 /* upper tag not used in ioaccel2 mode */
5903 memset(tagupper, 0, sizeof(*tagupper));
5904 *taglower = cm2->Tag;
5905 return;
5906 }
5907 tag = le64_to_cpu(c->Header.tag);
5908 *tagupper = cpu_to_le32(tag >> 32);
5909 *taglower = cpu_to_le32(tag);
5910 }
5911
5912 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
5913 struct CommandList *abort, int reply_queue)
5914 {
5915 int rc = IO_OK;
5916 struct CommandList *c;
5917 struct ErrorInfo *ei;
5918 __le32 tagupper, taglower;
5919
5920 c = cmd_alloc(h);
5921
5922 /* fill_cmd can't fail here, no buffer to map */
5923 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag,
5924 0, 0, scsi3addr, TYPE_MSG);
5925 if (h->needs_abort_tags_swizzled)
5926 swizzle_abort_tag(&c->Request.CDB[4]);
5927 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
5928 hpsa_get_tag(h, abort, &taglower, &tagupper);
5929 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n",
5930 __func__, tagupper, taglower);
5931 /* no unmap needed here because no data xfer. */
5932
5933 ei = c->err_info;
5934 switch (ei->CommandStatus) {
5935 case CMD_SUCCESS:
5936 break;
5937 case CMD_TMF_STATUS:
5938 rc = hpsa_evaluate_tmf_status(h, c);
5939 break;
5940 case CMD_UNABORTABLE: /* Very common, don't make noise. */
5941 rc = -1;
5942 break;
5943 default:
5944 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
5945 __func__, tagupper, taglower);
5946 hpsa_scsi_interpret_error(h, c);
5947 rc = -1;
5948 break;
5949 }
5950 cmd_free(h, c);
5951 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
5952 __func__, tagupper, taglower);
5953 return rc;
5954 }
5955
5956 static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h,
5957 struct CommandList *command_to_abort, int reply_queue)
5958 {
5959 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5960 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
5961 struct io_accel2_cmd *c2a =
5962 &h->ioaccel2_cmd_pool[command_to_abort->cmdindex];
5963 struct scsi_cmnd *scmd = command_to_abort->scsi_cmd;
5964 struct hpsa_scsi_dev_t *dev = scmd->device->hostdata;
5965
5966 if (!dev)
5967 return;
5968
5969 /*
5970 * We're overlaying struct hpsa_tmf_struct on top of something which
5971 * was allocated as a struct io_accel2_cmd, so we better be sure it
5972 * actually fits, and doesn't overrun the error info space.
5973 */
5974 BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) >
5975 sizeof(struct io_accel2_cmd));
5976 BUG_ON(offsetof(struct io_accel2_cmd, error_data) <
5977 offsetof(struct hpsa_tmf_struct, error_len) +
5978 sizeof(ac->error_len));
5979
5980 c->cmd_type = IOACCEL2_TMF;
5981 c->scsi_cmd = SCSI_CMD_BUSY;
5982
5983 /* Adjust the DMA address to point to the accelerated command buffer */
5984 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
5985 (c->cmdindex * sizeof(struct io_accel2_cmd));
5986 BUG_ON(c->busaddr & 0x0000007F);
5987
5988 memset(ac, 0, sizeof(*c2)); /* yes this is correct */
5989 ac->iu_type = IOACCEL2_IU_TMF_TYPE;
5990 ac->reply_queue = reply_queue;
5991 ac->tmf = IOACCEL2_TMF_ABORT;
5992 ac->it_nexus = cpu_to_le32(dev->ioaccel_handle);
5993 memset(ac->lun_id, 0, sizeof(ac->lun_id));
5994 ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT);
5995 ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag));
5996 ac->error_ptr = cpu_to_le64(c->busaddr +
5997 offsetof(struct io_accel2_cmd, error_data));
5998 ac->error_len = cpu_to_le32(sizeof(c2->error_data));
5999 }
6000
6001 /* ioaccel2 path firmware cannot handle abort task requests.
6002 * Change abort requests to physical target reset, and send to the
6003 * address of the physical disk used for the ioaccel 2 command.
6004 * Return 0 on success (IO_OK)
6005 * -1 on failure
6006 */
6007
6008 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
6009 unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
6010 {
6011 int rc = IO_OK;
6012 struct scsi_cmnd *scmd; /* scsi command within request being aborted */
6013 struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
6014 unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
6015 unsigned char *psa = &phys_scsi3addr[0];
6016
6017 /* Get a pointer to the hpsa logical device. */
6018 scmd = abort->scsi_cmd;
6019 dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
6020 if (dev == NULL) {
6021 dev_warn(&h->pdev->dev,
6022 "Cannot abort: no device pointer for command.\n");
6023 return -1; /* not abortable */
6024 }
6025
6026 if (h->raid_offload_debug > 0)
6027 dev_info(&h->pdev->dev,
6028 "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
6029 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
6030 "Reset as abort",
6031 scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
6032 scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
6033
6034 if (!dev->offload_enabled) {
6035 dev_warn(&h->pdev->dev,
6036 "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
6037 return -1; /* not abortable */
6038 }
6039
6040 /* Incoming scsi3addr is logical addr. We need physical disk addr. */
6041 if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
6042 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
6043 return -1; /* not abortable */
6044 }
6045
6046 /* send the reset */
6047 if (h->raid_offload_debug > 0)
6048 dev_info(&h->pdev->dev,
6049 "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
6050 psa[0], psa[1], psa[2], psa[3],
6051 psa[4], psa[5], psa[6], psa[7]);
6052 rc = hpsa_do_reset(h, dev, psa, HPSA_PHYS_TARGET_RESET, reply_queue);
6053 if (rc != 0) {
6054 dev_warn(&h->pdev->dev,
6055 "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
6056 psa[0], psa[1], psa[2], psa[3],
6057 psa[4], psa[5], psa[6], psa[7]);
6058 return rc; /* failed to reset */
6059 }
6060
6061 /* wait for device to recover */
6062 if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) {
6063 dev_warn(&h->pdev->dev,
6064 "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
6065 psa[0], psa[1], psa[2], psa[3],
6066 psa[4], psa[5], psa[6], psa[7]);
6067 return -1; /* failed to recover */
6068 }
6069
6070 /* device recovered */
6071 dev_info(&h->pdev->dev,
6072 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
6073 psa[0], psa[1], psa[2], psa[3],
6074 psa[4], psa[5], psa[6], psa[7]);
6075
6076 return rc; /* success */
6077 }
6078
6079 static int hpsa_send_abort_ioaccel2(struct ctlr_info *h,
6080 struct CommandList *abort, int reply_queue)
6081 {
6082 int rc = IO_OK;
6083 struct CommandList *c;
6084 __le32 taglower, tagupper;
6085 struct hpsa_scsi_dev_t *dev;
6086 struct io_accel2_cmd *c2;
6087
6088 dev = abort->scsi_cmd->device->hostdata;
6089 if (!dev)
6090 return -1;
6091
6092 if (!dev->offload_enabled && !dev->hba_ioaccel_enabled)
6093 return -1;
6094
6095 c = cmd_alloc(h);
6096 setup_ioaccel2_abort_cmd(c, h, abort, reply_queue);
6097 c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
6098 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
6099 hpsa_get_tag(h, abort, &taglower, &tagupper);
6100 dev_dbg(&h->pdev->dev,
6101 "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n",
6102 __func__, tagupper, taglower);
6103 /* no unmap needed here because no data xfer. */
6104
6105 dev_dbg(&h->pdev->dev,
6106 "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n",
6107 __func__, tagupper, taglower, c2->error_data.serv_response);
6108 switch (c2->error_data.serv_response) {
6109 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
6110 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
6111 rc = 0;
6112 break;
6113 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
6114 case IOACCEL2_SERV_RESPONSE_FAILURE:
6115 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
6116 rc = -1;
6117 break;
6118 default:
6119 dev_warn(&h->pdev->dev,
6120 "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n",
6121 __func__, tagupper, taglower,
6122 c2->error_data.serv_response);
6123 rc = -1;
6124 }
6125 cmd_free(h, c);
6126 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
6127 tagupper, taglower);
6128 return rc;
6129 }
6130
6131 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
6132 struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue)
6133 {
6134 /*
6135 * ioccelerator mode 2 commands should be aborted via the
6136 * accelerated path, since RAID path is unaware of these commands,
6137 * but not all underlying firmware can handle abort TMF.
6138 * Change abort to physical device reset when abort TMF is unsupported.
6139 */
6140 if (abort->cmd_type == CMD_IOACCEL2) {
6141 if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) ||
6142 dev->physical_device)
6143 return hpsa_send_abort_ioaccel2(h, abort,
6144 reply_queue);
6145 else
6146 return hpsa_send_reset_as_abort_ioaccel2(h,
6147 dev->scsi3addr,
6148 abort, reply_queue);
6149 }
6150 return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue);
6151 }
6152
6153 /* Find out which reply queue a command was meant to return on */
6154 static int hpsa_extract_reply_queue(struct ctlr_info *h,
6155 struct CommandList *c)
6156 {
6157 if (c->cmd_type == CMD_IOACCEL2)
6158 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue;
6159 return c->Header.ReplyQueue;
6160 }
6161
6162 /*
6163 * Limit concurrency of abort commands to prevent
6164 * over-subscription of commands
6165 */
6166 static inline int wait_for_available_abort_cmd(struct ctlr_info *h)
6167 {
6168 #define ABORT_CMD_WAIT_MSECS 5000
6169 return !wait_event_timeout(h->abort_cmd_wait_queue,
6170 atomic_dec_if_positive(&h->abort_cmds_available) >= 0,
6171 msecs_to_jiffies(ABORT_CMD_WAIT_MSECS));
6172 }
6173
6174 /* Send an abort for the specified command.
6175 * If the device and controller support it,
6176 * send a task abort request.
6177 */
6178 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
6179 {
6180
6181 int rc;
6182 struct ctlr_info *h;
6183 struct hpsa_scsi_dev_t *dev;
6184 struct CommandList *abort; /* pointer to command to be aborted */
6185 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
6186 char msg[256]; /* For debug messaging. */
6187 int ml = 0;
6188 __le32 tagupper, taglower;
6189 int refcount, reply_queue;
6190
6191 if (sc == NULL)
6192 return FAILED;
6193
6194 if (sc->device == NULL)
6195 return FAILED;
6196
6197 /* Find the controller of the command to be aborted */
6198 h = sdev_to_hba(sc->device);
6199 if (h == NULL)
6200 return FAILED;
6201
6202 /* Find the device of the command to be aborted */
6203 dev = sc->device->hostdata;
6204 if (!dev) {
6205 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
6206 msg);
6207 return FAILED;
6208 }
6209
6210 /* If controller locked up, we can guarantee command won't complete */
6211 if (lockup_detected(h)) {
6212 hpsa_show_dev_msg(KERN_WARNING, h, dev,
6213 "ABORT FAILED, lockup detected");
6214 return FAILED;
6215 }
6216
6217 /* This is a good time to check if controller lockup has occurred */
6218 if (detect_controller_lockup(h)) {
6219 hpsa_show_dev_msg(KERN_WARNING, h, dev,
6220 "ABORT FAILED, new lockup detected");
6221 return FAILED;
6222 }
6223
6224 /* Check that controller supports some kind of task abort */
6225 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
6226 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
6227 return FAILED;
6228
6229 memset(msg, 0, sizeof(msg));
6230 ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p",
6231 h->scsi_host->host_no, sc->device->channel,
6232 sc->device->id, sc->device->lun,
6233 "Aborting command", sc);
6234
6235 /* Get SCSI command to be aborted */
6236 abort = (struct CommandList *) sc->host_scribble;
6237 if (abort == NULL) {
6238 /* This can happen if the command already completed. */
6239 return SUCCESS;
6240 }
6241 refcount = atomic_inc_return(&abort->refcount);
6242 if (refcount == 1) { /* Command is done already. */
6243 cmd_free(h, abort);
6244 return SUCCESS;
6245 }
6246
6247 /* Don't bother trying the abort if we know it won't work. */
6248 if (abort->cmd_type != CMD_IOACCEL2 &&
6249 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) {
6250 cmd_free(h, abort);
6251 return FAILED;
6252 }
6253
6254 /*
6255 * Check that we're aborting the right command.
6256 * It's possible the CommandList already completed and got re-used.
6257 */
6258 if (abort->scsi_cmd != sc) {
6259 cmd_free(h, abort);
6260 return SUCCESS;
6261 }
6262
6263 abort->abort_pending = true;
6264 hpsa_get_tag(h, abort, &taglower, &tagupper);
6265 reply_queue = hpsa_extract_reply_queue(h, abort);
6266 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
6267 as = abort->scsi_cmd;
6268 if (as != NULL)
6269 ml += sprintf(msg+ml,
6270 "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ",
6271 as->cmd_len, as->cmnd[0], as->cmnd[1],
6272 as->serial_number);
6273 dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg);
6274 hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command");
6275
6276 /*
6277 * Command is in flight, or possibly already completed
6278 * by the firmware (but not to the scsi mid layer) but we can't
6279 * distinguish which. Send the abort down.
6280 */
6281 if (wait_for_available_abort_cmd(h)) {
6282 dev_warn(&h->pdev->dev,
6283 "%s FAILED, timeout waiting for an abort command to become available.\n",
6284 msg);
6285 cmd_free(h, abort);
6286 return FAILED;
6287 }
6288 rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue);
6289 atomic_inc(&h->abort_cmds_available);
6290 wake_up_all(&h->abort_cmd_wait_queue);
6291 if (rc != 0) {
6292 dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg);
6293 hpsa_show_dev_msg(KERN_WARNING, h, dev,
6294 "FAILED to abort command");
6295 cmd_free(h, abort);
6296 return FAILED;
6297 }
6298 dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg);
6299 wait_event(h->event_sync_wait_queue,
6300 abort->scsi_cmd != sc || lockup_detected(h));
6301 cmd_free(h, abort);
6302 return !lockup_detected(h) ? SUCCESS : FAILED;
6303 }
6304
6305 /*
6306 * For operations with an associated SCSI command, a command block is allocated
6307 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
6308 * block request tag as an index into a table of entries. cmd_tagged_free() is
6309 * the complement, although cmd_free() may be called instead.
6310 */
6311 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
6312 struct scsi_cmnd *scmd)
6313 {
6314 int idx = hpsa_get_cmd_index(scmd);
6315 struct CommandList *c = h->cmd_pool + idx;
6316
6317 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
6318 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
6319 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
6320 /* The index value comes from the block layer, so if it's out of
6321 * bounds, it's probably not our bug.
6322 */
6323 BUG();
6324 }
6325
6326 atomic_inc(&c->refcount);
6327 if (unlikely(!hpsa_is_cmd_idle(c))) {
6328 /*
6329 * We expect that the SCSI layer will hand us a unique tag
6330 * value. Thus, there should never be a collision here between
6331 * two requests...because if the selected command isn't idle
6332 * then someone is going to be very disappointed.
6333 */
6334 dev_err(&h->pdev->dev,
6335 "tag collision (tag=%d) in cmd_tagged_alloc().\n",
6336 idx);
6337 if (c->scsi_cmd != NULL)
6338 scsi_print_command(c->scsi_cmd);
6339 scsi_print_command(scmd);
6340 }
6341
6342 hpsa_cmd_partial_init(h, idx, c);
6343 return c;
6344 }
6345
6346 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
6347 {
6348 /*
6349 * Release our reference to the block. We don't need to do anything
6350 * else to free it, because it is accessed by index. (There's no point
6351 * in checking the result of the decrement, since we cannot guarantee
6352 * that there isn't a concurrent abort which is also accessing it.)
6353 */
6354 (void)atomic_dec(&c->refcount);
6355 }
6356
6357 /*
6358 * For operations that cannot sleep, a command block is allocated at init,
6359 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6360 * which ones are free or in use. Lock must be held when calling this.
6361 * cmd_free() is the complement.
6362 * This function never gives up and returns NULL. If it hangs,
6363 * another thread must call cmd_free() to free some tags.
6364 */
6365
6366 static struct CommandList *cmd_alloc(struct ctlr_info *h)
6367 {
6368 struct CommandList *c;
6369 int refcount, i;
6370 int offset = 0;
6371
6372 /*
6373 * There is some *extremely* small but non-zero chance that that
6374 * multiple threads could get in here, and one thread could
6375 * be scanning through the list of bits looking for a free
6376 * one, but the free ones are always behind him, and other
6377 * threads sneak in behind him and eat them before he can
6378 * get to them, so that while there is always a free one, a
6379 * very unlucky thread might be starved anyway, never able to
6380 * beat the other threads. In reality, this happens so
6381 * infrequently as to be indistinguishable from never.
6382 *
6383 * Note that we start allocating commands before the SCSI host structure
6384 * is initialized. Since the search starts at bit zero, this
6385 * all works, since we have at least one command structure available;
6386 * however, it means that the structures with the low indexes have to be
6387 * reserved for driver-initiated requests, while requests from the block
6388 * layer will use the higher indexes.
6389 */
6390
6391 for (;;) {
6392 i = find_next_zero_bit(h->cmd_pool_bits,
6393 HPSA_NRESERVED_CMDS,
6394 offset);
6395 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6396 offset = 0;
6397 continue;
6398 }
6399 c = h->cmd_pool + i;
6400 refcount = atomic_inc_return(&c->refcount);
6401 if (unlikely(refcount > 1)) {
6402 cmd_free(h, c); /* already in use */
6403 offset = (i + 1) % HPSA_NRESERVED_CMDS;
6404 continue;
6405 }
6406 set_bit(i & (BITS_PER_LONG - 1),
6407 h->cmd_pool_bits + (i / BITS_PER_LONG));
6408 break; /* it's ours now. */
6409 }
6410 hpsa_cmd_partial_init(h, i, c);
6411 return c;
6412 }
6413
6414 /*
6415 * This is the complementary operation to cmd_alloc(). Note, however, in some
6416 * corner cases it may also be used to free blocks allocated by
6417 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
6418 * the clear-bit is harmless.
6419 */
6420 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6421 {
6422 if (atomic_dec_and_test(&c->refcount)) {
6423 int i;
6424
6425 i = c - h->cmd_pool;
6426 clear_bit(i & (BITS_PER_LONG - 1),
6427 h->cmd_pool_bits + (i / BITS_PER_LONG));
6428 }
6429 }
6430
6431 #ifdef CONFIG_COMPAT
6432
6433 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
6434 void __user *arg)
6435 {
6436 IOCTL32_Command_struct __user *arg32 =
6437 (IOCTL32_Command_struct __user *) arg;
6438 IOCTL_Command_struct arg64;
6439 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
6440 int err;
6441 u32 cp;
6442
6443 memset(&arg64, 0, sizeof(arg64));
6444 err = 0;
6445 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6446 sizeof(arg64.LUN_info));
6447 err |= copy_from_user(&arg64.Request, &arg32->Request,
6448 sizeof(arg64.Request));
6449 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6450 sizeof(arg64.error_info));
6451 err |= get_user(arg64.buf_size, &arg32->buf_size);
6452 err |= get_user(cp, &arg32->buf);
6453 arg64.buf = compat_ptr(cp);
6454 err |= copy_to_user(p, &arg64, sizeof(arg64));
6455
6456 if (err)
6457 return -EFAULT;
6458
6459 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
6460 if (err)
6461 return err;
6462 err |= copy_in_user(&arg32->error_info, &p->error_info,
6463 sizeof(arg32->error_info));
6464 if (err)
6465 return -EFAULT;
6466 return err;
6467 }
6468
6469 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
6470 int cmd, void __user *arg)
6471 {
6472 BIG_IOCTL32_Command_struct __user *arg32 =
6473 (BIG_IOCTL32_Command_struct __user *) arg;
6474 BIG_IOCTL_Command_struct arg64;
6475 BIG_IOCTL_Command_struct __user *p =
6476 compat_alloc_user_space(sizeof(arg64));
6477 int err;
6478 u32 cp;
6479
6480 memset(&arg64, 0, sizeof(arg64));
6481 err = 0;
6482 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6483 sizeof(arg64.LUN_info));
6484 err |= copy_from_user(&arg64.Request, &arg32->Request,
6485 sizeof(arg64.Request));
6486 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6487 sizeof(arg64.error_info));
6488 err |= get_user(arg64.buf_size, &arg32->buf_size);
6489 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
6490 err |= get_user(cp, &arg32->buf);
6491 arg64.buf = compat_ptr(cp);
6492 err |= copy_to_user(p, &arg64, sizeof(arg64));
6493
6494 if (err)
6495 return -EFAULT;
6496
6497 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
6498 if (err)
6499 return err;
6500 err |= copy_in_user(&arg32->error_info, &p->error_info,
6501 sizeof(arg32->error_info));
6502 if (err)
6503 return -EFAULT;
6504 return err;
6505 }
6506
6507 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6508 {
6509 switch (cmd) {
6510 case CCISS_GETPCIINFO:
6511 case CCISS_GETINTINFO:
6512 case CCISS_SETINTINFO:
6513 case CCISS_GETNODENAME:
6514 case CCISS_SETNODENAME:
6515 case CCISS_GETHEARTBEAT:
6516 case CCISS_GETBUSTYPES:
6517 case CCISS_GETFIRMVER:
6518 case CCISS_GETDRIVVER:
6519 case CCISS_REVALIDVOLS:
6520 case CCISS_DEREGDISK:
6521 case CCISS_REGNEWDISK:
6522 case CCISS_REGNEWD:
6523 case CCISS_RESCANDISK:
6524 case CCISS_GETLUNINFO:
6525 return hpsa_ioctl(dev, cmd, arg);
6526
6527 case CCISS_PASSTHRU32:
6528 return hpsa_ioctl32_passthru(dev, cmd, arg);
6529 case CCISS_BIG_PASSTHRU32:
6530 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
6531
6532 default:
6533 return -ENOIOCTLCMD;
6534 }
6535 }
6536 #endif
6537
6538 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6539 {
6540 struct hpsa_pci_info pciinfo;
6541
6542 if (!argp)
6543 return -EINVAL;
6544 pciinfo.domain = pci_domain_nr(h->pdev->bus);
6545 pciinfo.bus = h->pdev->bus->number;
6546 pciinfo.dev_fn = h->pdev->devfn;
6547 pciinfo.board_id = h->board_id;
6548 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6549 return -EFAULT;
6550 return 0;
6551 }
6552
6553 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6554 {
6555 DriverVer_type DriverVer;
6556 unsigned char vmaj, vmin, vsubmin;
6557 int rc;
6558
6559 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6560 &vmaj, &vmin, &vsubmin);
6561 if (rc != 3) {
6562 dev_info(&h->pdev->dev, "driver version string '%s' "
6563 "unrecognized.", HPSA_DRIVER_VERSION);
6564 vmaj = 0;
6565 vmin = 0;
6566 vsubmin = 0;
6567 }
6568 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6569 if (!argp)
6570 return -EINVAL;
6571 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6572 return -EFAULT;
6573 return 0;
6574 }
6575
6576 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6577 {
6578 IOCTL_Command_struct iocommand;
6579 struct CommandList *c;
6580 char *buff = NULL;
6581 u64 temp64;
6582 int rc = 0;
6583
6584 if (!argp)
6585 return -EINVAL;
6586 if (!capable(CAP_SYS_RAWIO))
6587 return -EPERM;
6588 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6589 return -EFAULT;
6590 if ((iocommand.buf_size < 1) &&
6591 (iocommand.Request.Type.Direction != XFER_NONE)) {
6592 return -EINVAL;
6593 }
6594 if (iocommand.buf_size > 0) {
6595 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
6596 if (buff == NULL)
6597 return -ENOMEM;
6598 if (iocommand.Request.Type.Direction & XFER_WRITE) {
6599 /* Copy the data into the buffer we created */
6600 if (copy_from_user(buff, iocommand.buf,
6601 iocommand.buf_size)) {
6602 rc = -EFAULT;
6603 goto out_kfree;
6604 }
6605 } else {
6606 memset(buff, 0, iocommand.buf_size);
6607 }
6608 }
6609 c = cmd_alloc(h);
6610
6611 /* Fill in the command type */
6612 c->cmd_type = CMD_IOCTL_PEND;
6613 c->scsi_cmd = SCSI_CMD_BUSY;
6614 /* Fill in Command Header */
6615 c->Header.ReplyQueue = 0; /* unused in simple mode */
6616 if (iocommand.buf_size > 0) { /* buffer to fill */
6617 c->Header.SGList = 1;
6618 c->Header.SGTotal = cpu_to_le16(1);
6619 } else { /* no buffers to fill */
6620 c->Header.SGList = 0;
6621 c->Header.SGTotal = cpu_to_le16(0);
6622 }
6623 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
6624
6625 /* Fill in Request block */
6626 memcpy(&c->Request, &iocommand.Request,
6627 sizeof(c->Request));
6628
6629 /* Fill in the scatter gather information */
6630 if (iocommand.buf_size > 0) {
6631 temp64 = pci_map_single(h->pdev, buff,
6632 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
6633 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6634 c->SG[0].Addr = cpu_to_le64(0);
6635 c->SG[0].Len = cpu_to_le32(0);
6636 rc = -ENOMEM;
6637 goto out;
6638 }
6639 c->SG[0].Addr = cpu_to_le64(temp64);
6640 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
6641 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6642 }
6643 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6644 NO_TIMEOUT);
6645 if (iocommand.buf_size > 0)
6646 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
6647 check_ioctl_unit_attention(h, c);
6648 if (rc) {
6649 rc = -EIO;
6650 goto out;
6651 }
6652
6653 /* Copy the error information out */
6654 memcpy(&iocommand.error_info, c->err_info,
6655 sizeof(iocommand.error_info));
6656 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
6657 rc = -EFAULT;
6658 goto out;
6659 }
6660 if ((iocommand.Request.Type.Direction & XFER_READ) &&
6661 iocommand.buf_size > 0) {
6662 /* Copy the data out of the buffer we created */
6663 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6664 rc = -EFAULT;
6665 goto out;
6666 }
6667 }
6668 out:
6669 cmd_free(h, c);
6670 out_kfree:
6671 kfree(buff);
6672 return rc;
6673 }
6674
6675 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6676 {
6677 BIG_IOCTL_Command_struct *ioc;
6678 struct CommandList *c;
6679 unsigned char **buff = NULL;
6680 int *buff_size = NULL;
6681 u64 temp64;
6682 BYTE sg_used = 0;
6683 int status = 0;
6684 u32 left;
6685 u32 sz;
6686 BYTE __user *data_ptr;
6687
6688 if (!argp)
6689 return -EINVAL;
6690 if (!capable(CAP_SYS_RAWIO))
6691 return -EPERM;
6692 ioc = (BIG_IOCTL_Command_struct *)
6693 kmalloc(sizeof(*ioc), GFP_KERNEL);
6694 if (!ioc) {
6695 status = -ENOMEM;
6696 goto cleanup1;
6697 }
6698 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
6699 status = -EFAULT;
6700 goto cleanup1;
6701 }
6702 if ((ioc->buf_size < 1) &&
6703 (ioc->Request.Type.Direction != XFER_NONE)) {
6704 status = -EINVAL;
6705 goto cleanup1;
6706 }
6707 /* Check kmalloc limits using all SGs */
6708 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6709 status = -EINVAL;
6710 goto cleanup1;
6711 }
6712 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6713 status = -EINVAL;
6714 goto cleanup1;
6715 }
6716 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
6717 if (!buff) {
6718 status = -ENOMEM;
6719 goto cleanup1;
6720 }
6721 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
6722 if (!buff_size) {
6723 status = -ENOMEM;
6724 goto cleanup1;
6725 }
6726 left = ioc->buf_size;
6727 data_ptr = ioc->buf;
6728 while (left) {
6729 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6730 buff_size[sg_used] = sz;
6731 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6732 if (buff[sg_used] == NULL) {
6733 status = -ENOMEM;
6734 goto cleanup1;
6735 }
6736 if (ioc->Request.Type.Direction & XFER_WRITE) {
6737 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6738 status = -EFAULT;
6739 goto cleanup1;
6740 }
6741 } else
6742 memset(buff[sg_used], 0, sz);
6743 left -= sz;
6744 data_ptr += sz;
6745 sg_used++;
6746 }
6747 c = cmd_alloc(h);
6748
6749 c->cmd_type = CMD_IOCTL_PEND;
6750 c->scsi_cmd = SCSI_CMD_BUSY;
6751 c->Header.ReplyQueue = 0;
6752 c->Header.SGList = (u8) sg_used;
6753 c->Header.SGTotal = cpu_to_le16(sg_used);
6754 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6755 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6756 if (ioc->buf_size > 0) {
6757 int i;
6758 for (i = 0; i < sg_used; i++) {
6759 temp64 = pci_map_single(h->pdev, buff[i],
6760 buff_size[i], PCI_DMA_BIDIRECTIONAL);
6761 if (dma_mapping_error(&h->pdev->dev,
6762 (dma_addr_t) temp64)) {
6763 c->SG[i].Addr = cpu_to_le64(0);
6764 c->SG[i].Len = cpu_to_le32(0);
6765 hpsa_pci_unmap(h->pdev, c, i,
6766 PCI_DMA_BIDIRECTIONAL);
6767 status = -ENOMEM;
6768 goto cleanup0;
6769 }
6770 c->SG[i].Addr = cpu_to_le64(temp64);
6771 c->SG[i].Len = cpu_to_le32(buff_size[i]);
6772 c->SG[i].Ext = cpu_to_le32(0);
6773 }
6774 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6775 }
6776 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6777 NO_TIMEOUT);
6778 if (sg_used)
6779 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
6780 check_ioctl_unit_attention(h, c);
6781 if (status) {
6782 status = -EIO;
6783 goto cleanup0;
6784 }
6785
6786 /* Copy the error information out */
6787 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6788 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6789 status = -EFAULT;
6790 goto cleanup0;
6791 }
6792 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6793 int i;
6794
6795 /* Copy the data out of the buffer we created */
6796 BYTE __user *ptr = ioc->buf;
6797 for (i = 0; i < sg_used; i++) {
6798 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6799 status = -EFAULT;
6800 goto cleanup0;
6801 }
6802 ptr += buff_size[i];
6803 }
6804 }
6805 status = 0;
6806 cleanup0:
6807 cmd_free(h, c);
6808 cleanup1:
6809 if (buff) {
6810 int i;
6811
6812 for (i = 0; i < sg_used; i++)
6813 kfree(buff[i]);
6814 kfree(buff);
6815 }
6816 kfree(buff_size);
6817 kfree(ioc);
6818 return status;
6819 }
6820
6821 static void check_ioctl_unit_attention(struct ctlr_info *h,
6822 struct CommandList *c)
6823 {
6824 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6825 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6826 (void) check_for_unit_attention(h, c);
6827 }
6828
6829 /*
6830 * ioctl
6831 */
6832 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6833 {
6834 struct ctlr_info *h;
6835 void __user *argp = (void __user *)arg;
6836 int rc;
6837
6838 h = sdev_to_hba(dev);
6839
6840 switch (cmd) {
6841 case CCISS_DEREGDISK:
6842 case CCISS_REGNEWDISK:
6843 case CCISS_REGNEWD:
6844 hpsa_scan_start(h->scsi_host);
6845 return 0;
6846 case CCISS_GETPCIINFO:
6847 return hpsa_getpciinfo_ioctl(h, argp);
6848 case CCISS_GETDRIVVER:
6849 return hpsa_getdrivver_ioctl(h, argp);
6850 case CCISS_PASSTHRU:
6851 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6852 return -EAGAIN;
6853 rc = hpsa_passthru_ioctl(h, argp);
6854 atomic_inc(&h->passthru_cmds_avail);
6855 return rc;
6856 case CCISS_BIG_PASSTHRU:
6857 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6858 return -EAGAIN;
6859 rc = hpsa_big_passthru_ioctl(h, argp);
6860 atomic_inc(&h->passthru_cmds_avail);
6861 return rc;
6862 default:
6863 return -ENOTTY;
6864 }
6865 }
6866
6867 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
6868 u8 reset_type)
6869 {
6870 struct CommandList *c;
6871
6872 c = cmd_alloc(h);
6873
6874 /* fill_cmd can't fail here, no data buffer to map */
6875 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6876 RAID_CTLR_LUNID, TYPE_MSG);
6877 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6878 c->waiting = NULL;
6879 enqueue_cmd_and_start_io(h, c);
6880 /* Don't wait for completion, the reset won't complete. Don't free
6881 * the command either. This is the last command we will send before
6882 * re-initializing everything, so it doesn't matter and won't leak.
6883 */
6884 return;
6885 }
6886
6887 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6888 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6889 int cmd_type)
6890 {
6891 int pci_dir = XFER_NONE;
6892 u64 tag; /* for commands to be aborted */
6893
6894 c->cmd_type = CMD_IOCTL_PEND;
6895 c->scsi_cmd = SCSI_CMD_BUSY;
6896 c->Header.ReplyQueue = 0;
6897 if (buff != NULL && size > 0) {
6898 c->Header.SGList = 1;
6899 c->Header.SGTotal = cpu_to_le16(1);
6900 } else {
6901 c->Header.SGList = 0;
6902 c->Header.SGTotal = cpu_to_le16(0);
6903 }
6904 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6905
6906 if (cmd_type == TYPE_CMD) {
6907 switch (cmd) {
6908 case HPSA_INQUIRY:
6909 /* are we trying to read a vital product page */
6910 if (page_code & VPD_PAGE) {
6911 c->Request.CDB[1] = 0x01;
6912 c->Request.CDB[2] = (page_code & 0xff);
6913 }
6914 c->Request.CDBLen = 6;
6915 c->Request.type_attr_dir =
6916 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6917 c->Request.Timeout = 0;
6918 c->Request.CDB[0] = HPSA_INQUIRY;
6919 c->Request.CDB[4] = size & 0xFF;
6920 break;
6921 case HPSA_REPORT_LOG:
6922 case HPSA_REPORT_PHYS:
6923 /* Talking to controller so It's a physical command
6924 mode = 00 target = 0. Nothing to write.
6925 */
6926 c->Request.CDBLen = 12;
6927 c->Request.type_attr_dir =
6928 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6929 c->Request.Timeout = 0;
6930 c->Request.CDB[0] = cmd;
6931 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6932 c->Request.CDB[7] = (size >> 16) & 0xFF;
6933 c->Request.CDB[8] = (size >> 8) & 0xFF;
6934 c->Request.CDB[9] = size & 0xFF;
6935 break;
6936 case BMIC_SENSE_DIAG_OPTIONS:
6937 c->Request.CDBLen = 16;
6938 c->Request.type_attr_dir =
6939 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6940 c->Request.Timeout = 0;
6941 /* Spec says this should be BMIC_WRITE */
6942 c->Request.CDB[0] = BMIC_READ;
6943 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6944 break;
6945 case BMIC_SET_DIAG_OPTIONS:
6946 c->Request.CDBLen = 16;
6947 c->Request.type_attr_dir =
6948 TYPE_ATTR_DIR(cmd_type,
6949 ATTR_SIMPLE, XFER_WRITE);
6950 c->Request.Timeout = 0;
6951 c->Request.CDB[0] = BMIC_WRITE;
6952 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6953 break;
6954 case HPSA_CACHE_FLUSH:
6955 c->Request.CDBLen = 12;
6956 c->Request.type_attr_dir =
6957 TYPE_ATTR_DIR(cmd_type,
6958 ATTR_SIMPLE, XFER_WRITE);
6959 c->Request.Timeout = 0;
6960 c->Request.CDB[0] = BMIC_WRITE;
6961 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6962 c->Request.CDB[7] = (size >> 8) & 0xFF;
6963 c->Request.CDB[8] = size & 0xFF;
6964 break;
6965 case TEST_UNIT_READY:
6966 c->Request.CDBLen = 6;
6967 c->Request.type_attr_dir =
6968 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6969 c->Request.Timeout = 0;
6970 break;
6971 case HPSA_GET_RAID_MAP:
6972 c->Request.CDBLen = 12;
6973 c->Request.type_attr_dir =
6974 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6975 c->Request.Timeout = 0;
6976 c->Request.CDB[0] = HPSA_CISS_READ;
6977 c->Request.CDB[1] = cmd;
6978 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6979 c->Request.CDB[7] = (size >> 16) & 0xFF;
6980 c->Request.CDB[8] = (size >> 8) & 0xFF;
6981 c->Request.CDB[9] = size & 0xFF;
6982 break;
6983 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6984 c->Request.CDBLen = 10;
6985 c->Request.type_attr_dir =
6986 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6987 c->Request.Timeout = 0;
6988 c->Request.CDB[0] = BMIC_READ;
6989 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6990 c->Request.CDB[7] = (size >> 16) & 0xFF;
6991 c->Request.CDB[8] = (size >> 8) & 0xFF;
6992 break;
6993 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6994 c->Request.CDBLen = 10;
6995 c->Request.type_attr_dir =
6996 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6997 c->Request.Timeout = 0;
6998 c->Request.CDB[0] = BMIC_READ;
6999 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
7000 c->Request.CDB[7] = (size >> 16) & 0xFF;
7001 c->Request.CDB[8] = (size >> 8) & 0XFF;
7002 break;
7003 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
7004 c->Request.CDBLen = 10;
7005 c->Request.type_attr_dir =
7006 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
7007 c->Request.Timeout = 0;
7008 c->Request.CDB[0] = BMIC_READ;
7009 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
7010 c->Request.CDB[7] = (size >> 16) & 0xFF;
7011 c->Request.CDB[8] = (size >> 8) & 0XFF;
7012 break;
7013 case BMIC_SENSE_STORAGE_BOX_PARAMS:
7014 c->Request.CDBLen = 10;
7015 c->Request.type_attr_dir =
7016 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
7017 c->Request.Timeout = 0;
7018 c->Request.CDB[0] = BMIC_READ;
7019 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
7020 c->Request.CDB[7] = (size >> 16) & 0xFF;
7021 c->Request.CDB[8] = (size >> 8) & 0XFF;
7022 break;
7023 case BMIC_IDENTIFY_CONTROLLER:
7024 c->Request.CDBLen = 10;
7025 c->Request.type_attr_dir =
7026 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
7027 c->Request.Timeout = 0;
7028 c->Request.CDB[0] = BMIC_READ;
7029 c->Request.CDB[1] = 0;
7030 c->Request.CDB[2] = 0;
7031 c->Request.CDB[3] = 0;
7032 c->Request.CDB[4] = 0;
7033 c->Request.CDB[5] = 0;
7034 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
7035 c->Request.CDB[7] = (size >> 16) & 0xFF;
7036 c->Request.CDB[8] = (size >> 8) & 0XFF;
7037 c->Request.CDB[9] = 0;
7038 break;
7039 default:
7040 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
7041 BUG();
7042 return -1;
7043 }
7044 } else if (cmd_type == TYPE_MSG) {
7045 switch (cmd) {
7046
7047 case HPSA_PHYS_TARGET_RESET:
7048 c->Request.CDBLen = 16;
7049 c->Request.type_attr_dir =
7050 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
7051 c->Request.Timeout = 0; /* Don't time out */
7052 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7053 c->Request.CDB[0] = HPSA_RESET;
7054 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
7055 /* Physical target reset needs no control bytes 4-7*/
7056 c->Request.CDB[4] = 0x00;
7057 c->Request.CDB[5] = 0x00;
7058 c->Request.CDB[6] = 0x00;
7059 c->Request.CDB[7] = 0x00;
7060 break;
7061 case HPSA_DEVICE_RESET_MSG:
7062 c->Request.CDBLen = 16;
7063 c->Request.type_attr_dir =
7064 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
7065 c->Request.Timeout = 0; /* Don't time out */
7066 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7067 c->Request.CDB[0] = cmd;
7068 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
7069 /* If bytes 4-7 are zero, it means reset the */
7070 /* LunID device */
7071 c->Request.CDB[4] = 0x00;
7072 c->Request.CDB[5] = 0x00;
7073 c->Request.CDB[6] = 0x00;
7074 c->Request.CDB[7] = 0x00;
7075 break;
7076 case HPSA_ABORT_MSG:
7077 memcpy(&tag, buff, sizeof(tag));
7078 dev_dbg(&h->pdev->dev,
7079 "Abort Tag:0x%016llx using rqst Tag:0x%016llx",
7080 tag, c->Header.tag);
7081 c->Request.CDBLen = 16;
7082 c->Request.type_attr_dir =
7083 TYPE_ATTR_DIR(cmd_type,
7084 ATTR_SIMPLE, XFER_WRITE);
7085 c->Request.Timeout = 0; /* Don't time out */
7086 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
7087 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
7088 c->Request.CDB[2] = 0x00; /* reserved */
7089 c->Request.CDB[3] = 0x00; /* reserved */
7090 /* Tag to abort goes in CDB[4]-CDB[11] */
7091 memcpy(&c->Request.CDB[4], &tag, sizeof(tag));
7092 c->Request.CDB[12] = 0x00; /* reserved */
7093 c->Request.CDB[13] = 0x00; /* reserved */
7094 c->Request.CDB[14] = 0x00; /* reserved */
7095 c->Request.CDB[15] = 0x00; /* reserved */
7096 break;
7097 default:
7098 dev_warn(&h->pdev->dev, "unknown message type %d\n",
7099 cmd);
7100 BUG();
7101 }
7102 } else {
7103 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
7104 BUG();
7105 }
7106
7107 switch (GET_DIR(c->Request.type_attr_dir)) {
7108 case XFER_READ:
7109 pci_dir = PCI_DMA_FROMDEVICE;
7110 break;
7111 case XFER_WRITE:
7112 pci_dir = PCI_DMA_TODEVICE;
7113 break;
7114 case XFER_NONE:
7115 pci_dir = PCI_DMA_NONE;
7116 break;
7117 default:
7118 pci_dir = PCI_DMA_BIDIRECTIONAL;
7119 }
7120 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
7121 return -1;
7122 return 0;
7123 }
7124
7125 /*
7126 * Map (physical) PCI mem into (virtual) kernel space
7127 */
7128 static void __iomem *remap_pci_mem(ulong base, ulong size)
7129 {
7130 ulong page_base = ((ulong) base) & PAGE_MASK;
7131 ulong page_offs = ((ulong) base) - page_base;
7132 void __iomem *page_remapped = ioremap_nocache(page_base,
7133 page_offs + size);
7134
7135 return page_remapped ? (page_remapped + page_offs) : NULL;
7136 }
7137
7138 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
7139 {
7140 return h->access.command_completed(h, q);
7141 }
7142
7143 static inline bool interrupt_pending(struct ctlr_info *h)
7144 {
7145 return h->access.intr_pending(h);
7146 }
7147
7148 static inline long interrupt_not_for_us(struct ctlr_info *h)
7149 {
7150 return (h->access.intr_pending(h) == 0) ||
7151 (h->interrupts_enabled == 0);
7152 }
7153
7154 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
7155 u32 raw_tag)
7156 {
7157 if (unlikely(tag_index >= h->nr_cmds)) {
7158 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
7159 return 1;
7160 }
7161 return 0;
7162 }
7163
7164 static inline void finish_cmd(struct CommandList *c)
7165 {
7166 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
7167 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
7168 || c->cmd_type == CMD_IOACCEL2))
7169 complete_scsi_command(c);
7170 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
7171 complete(c->waiting);
7172 }
7173
7174 /* process completion of an indexed ("direct lookup") command */
7175 static inline void process_indexed_cmd(struct ctlr_info *h,
7176 u32 raw_tag)
7177 {
7178 u32 tag_index;
7179 struct CommandList *c;
7180
7181 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
7182 if (!bad_tag(h, tag_index, raw_tag)) {
7183 c = h->cmd_pool + tag_index;
7184 finish_cmd(c);
7185 }
7186 }
7187
7188 /* Some controllers, like p400, will give us one interrupt
7189 * after a soft reset, even if we turned interrupts off.
7190 * Only need to check for this in the hpsa_xxx_discard_completions
7191 * functions.
7192 */
7193 static int ignore_bogus_interrupt(struct ctlr_info *h)
7194 {
7195 if (likely(!reset_devices))
7196 return 0;
7197
7198 if (likely(h->interrupts_enabled))
7199 return 0;
7200
7201 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
7202 "(known firmware bug.) Ignoring.\n");
7203
7204 return 1;
7205 }
7206
7207 /*
7208 * Convert &h->q[x] (passed to interrupt handlers) back to h.
7209 * Relies on (h-q[x] == x) being true for x such that
7210 * 0 <= x < MAX_REPLY_QUEUES.
7211 */
7212 static struct ctlr_info *queue_to_hba(u8 *queue)
7213 {
7214 return container_of((queue - *queue), struct ctlr_info, q[0]);
7215 }
7216
7217 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
7218 {
7219 struct ctlr_info *h = queue_to_hba(queue);
7220 u8 q = *(u8 *) queue;
7221 u32 raw_tag;
7222
7223 if (ignore_bogus_interrupt(h))
7224 return IRQ_NONE;
7225
7226 if (interrupt_not_for_us(h))
7227 return IRQ_NONE;
7228 h->last_intr_timestamp = get_jiffies_64();
7229 while (interrupt_pending(h)) {
7230 raw_tag = get_next_completion(h, q);
7231 while (raw_tag != FIFO_EMPTY)
7232 raw_tag = next_command(h, q);
7233 }
7234 return IRQ_HANDLED;
7235 }
7236
7237 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
7238 {
7239 struct ctlr_info *h = queue_to_hba(queue);
7240 u32 raw_tag;
7241 u8 q = *(u8 *) queue;
7242
7243 if (ignore_bogus_interrupt(h))
7244 return IRQ_NONE;
7245
7246 h->last_intr_timestamp = get_jiffies_64();
7247 raw_tag = get_next_completion(h, q);
7248 while (raw_tag != FIFO_EMPTY)
7249 raw_tag = next_command(h, q);
7250 return IRQ_HANDLED;
7251 }
7252
7253 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
7254 {
7255 struct ctlr_info *h = queue_to_hba((u8 *) queue);
7256 u32 raw_tag;
7257 u8 q = *(u8 *) queue;
7258
7259 if (interrupt_not_for_us(h))
7260 return IRQ_NONE;
7261 h->last_intr_timestamp = get_jiffies_64();
7262 while (interrupt_pending(h)) {
7263 raw_tag = get_next_completion(h, q);
7264 while (raw_tag != FIFO_EMPTY) {
7265 process_indexed_cmd(h, raw_tag);
7266 raw_tag = next_command(h, q);
7267 }
7268 }
7269 return IRQ_HANDLED;
7270 }
7271
7272 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
7273 {
7274 struct ctlr_info *h = queue_to_hba(queue);
7275 u32 raw_tag;
7276 u8 q = *(u8 *) queue;
7277
7278 h->last_intr_timestamp = get_jiffies_64();
7279 raw_tag = get_next_completion(h, q);
7280 while (raw_tag != FIFO_EMPTY) {
7281 process_indexed_cmd(h, raw_tag);
7282 raw_tag = next_command(h, q);
7283 }
7284 return IRQ_HANDLED;
7285 }
7286
7287 /* Send a message CDB to the firmware. Careful, this only works
7288 * in simple mode, not performant mode due to the tag lookup.
7289 * We only ever use this immediately after a controller reset.
7290 */
7291 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
7292 unsigned char type)
7293 {
7294 struct Command {
7295 struct CommandListHeader CommandHeader;
7296 struct RequestBlock Request;
7297 struct ErrDescriptor ErrorDescriptor;
7298 };
7299 struct Command *cmd;
7300 static const size_t cmd_sz = sizeof(*cmd) +
7301 sizeof(cmd->ErrorDescriptor);
7302 dma_addr_t paddr64;
7303 __le32 paddr32;
7304 u32 tag;
7305 void __iomem *vaddr;
7306 int i, err;
7307
7308 vaddr = pci_ioremap_bar(pdev, 0);
7309 if (vaddr == NULL)
7310 return -ENOMEM;
7311
7312 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
7313 * CCISS commands, so they must be allocated from the lower 4GiB of
7314 * memory.
7315 */
7316 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
7317 if (err) {
7318 iounmap(vaddr);
7319 return err;
7320 }
7321
7322 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
7323 if (cmd == NULL) {
7324 iounmap(vaddr);
7325 return -ENOMEM;
7326 }
7327
7328 /* This must fit, because of the 32-bit consistent DMA mask. Also,
7329 * although there's no guarantee, we assume that the address is at
7330 * least 4-byte aligned (most likely, it's page-aligned).
7331 */
7332 paddr32 = cpu_to_le32(paddr64);
7333
7334 cmd->CommandHeader.ReplyQueue = 0;
7335 cmd->CommandHeader.SGList = 0;
7336 cmd->CommandHeader.SGTotal = cpu_to_le16(0);
7337 cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7338 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7339
7340 cmd->Request.CDBLen = 16;
7341 cmd->Request.type_attr_dir =
7342 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7343 cmd->Request.Timeout = 0; /* Don't time out */
7344 cmd->Request.CDB[0] = opcode;
7345 cmd->Request.CDB[1] = type;
7346 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
7347 cmd->ErrorDescriptor.Addr =
7348 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
7349 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7350
7351 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7352
7353 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7354 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
7355 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7356 break;
7357 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7358 }
7359
7360 iounmap(vaddr);
7361
7362 /* we leak the DMA buffer here ... no choice since the controller could
7363 * still complete the command.
7364 */
7365 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7366 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7367 opcode, type);
7368 return -ETIMEDOUT;
7369 }
7370
7371 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
7372
7373 if (tag & HPSA_ERROR_BIT) {
7374 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7375 opcode, type);
7376 return -EIO;
7377 }
7378
7379 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7380 opcode, type);
7381 return 0;
7382 }
7383
7384 #define hpsa_noop(p) hpsa_message(p, 3, 0)
7385
7386 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
7387 void __iomem *vaddr, u32 use_doorbell)
7388 {
7389
7390 if (use_doorbell) {
7391 /* For everything after the P600, the PCI power state method
7392 * of resetting the controller doesn't work, so we have this
7393 * other way using the doorbell register.
7394 */
7395 dev_info(&pdev->dev, "using doorbell to reset controller\n");
7396 writel(use_doorbell, vaddr + SA5_DOORBELL);
7397
7398 /* PMC hardware guys tell us we need a 10 second delay after
7399 * doorbell reset and before any attempt to talk to the board
7400 * at all to ensure that this actually works and doesn't fall
7401 * over in some weird corner cases.
7402 */
7403 msleep(10000);
7404 } else { /* Try to do it the PCI power state way */
7405
7406 /* Quoting from the Open CISS Specification: "The Power
7407 * Management Control/Status Register (CSR) controls the power
7408 * state of the device. The normal operating state is D0,
7409 * CSR=00h. The software off state is D3, CSR=03h. To reset
7410 * the controller, place the interface device in D3 then to D0,
7411 * this causes a secondary PCI reset which will reset the
7412 * controller." */
7413
7414 int rc = 0;
7415
7416 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
7417
7418 /* enter the D3hot power management state */
7419 rc = pci_set_power_state(pdev, PCI_D3hot);
7420 if (rc)
7421 return rc;
7422
7423 msleep(500);
7424
7425 /* enter the D0 power management state */
7426 rc = pci_set_power_state(pdev, PCI_D0);
7427 if (rc)
7428 return rc;
7429
7430 /*
7431 * The P600 requires a small delay when changing states.
7432 * Otherwise we may think the board did not reset and we bail.
7433 * This for kdump only and is particular to the P600.
7434 */
7435 msleep(500);
7436 }
7437 return 0;
7438 }
7439
7440 static void init_driver_version(char *driver_version, int len)
7441 {
7442 memset(driver_version, 0, len);
7443 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7444 }
7445
7446 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7447 {
7448 char *driver_version;
7449 int i, size = sizeof(cfgtable->driver_version);
7450
7451 driver_version = kmalloc(size, GFP_KERNEL);
7452 if (!driver_version)
7453 return -ENOMEM;
7454
7455 init_driver_version(driver_version, size);
7456 for (i = 0; i < size; i++)
7457 writeb(driver_version[i], &cfgtable->driver_version[i]);
7458 kfree(driver_version);
7459 return 0;
7460 }
7461
7462 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
7463 unsigned char *driver_ver)
7464 {
7465 int i;
7466
7467 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7468 driver_ver[i] = readb(&cfgtable->driver_version[i]);
7469 }
7470
7471 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7472 {
7473
7474 char *driver_ver, *old_driver_ver;
7475 int rc, size = sizeof(cfgtable->driver_version);
7476
7477 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
7478 if (!old_driver_ver)
7479 return -ENOMEM;
7480 driver_ver = old_driver_ver + size;
7481
7482 /* After a reset, the 32 bytes of "driver version" in the cfgtable
7483 * should have been changed, otherwise we know the reset failed.
7484 */
7485 init_driver_version(old_driver_ver, size);
7486 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7487 rc = !memcmp(driver_ver, old_driver_ver, size);
7488 kfree(old_driver_ver);
7489 return rc;
7490 }
7491 /* This does a hard reset of the controller using PCI power management
7492 * states or the using the doorbell register.
7493 */
7494 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
7495 {
7496 u64 cfg_offset;
7497 u32 cfg_base_addr;
7498 u64 cfg_base_addr_index;
7499 void __iomem *vaddr;
7500 unsigned long paddr;
7501 u32 misc_fw_support;
7502 int rc;
7503 struct CfgTable __iomem *cfgtable;
7504 u32 use_doorbell;
7505 u16 command_register;
7506
7507 /* For controllers as old as the P600, this is very nearly
7508 * the same thing as
7509 *
7510 * pci_save_state(pci_dev);
7511 * pci_set_power_state(pci_dev, PCI_D3hot);
7512 * pci_set_power_state(pci_dev, PCI_D0);
7513 * pci_restore_state(pci_dev);
7514 *
7515 * For controllers newer than the P600, the pci power state
7516 * method of resetting doesn't work so we have another way
7517 * using the doorbell register.
7518 */
7519
7520 if (!ctlr_is_resettable(board_id)) {
7521 dev_warn(&pdev->dev, "Controller not resettable\n");
7522 return -ENODEV;
7523 }
7524
7525 /* if controller is soft- but not hard resettable... */
7526 if (!ctlr_is_hard_resettable(board_id))
7527 return -ENOTSUPP; /* try soft reset later. */
7528
7529 /* Save the PCI command register */
7530 pci_read_config_word(pdev, 4, &command_register);
7531 pci_save_state(pdev);
7532
7533 /* find the first memory BAR, so we can find the cfg table */
7534 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
7535 if (rc)
7536 return rc;
7537 vaddr = remap_pci_mem(paddr, 0x250);
7538 if (!vaddr)
7539 return -ENOMEM;
7540
7541 /* find cfgtable in order to check if reset via doorbell is supported */
7542 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7543 &cfg_base_addr_index, &cfg_offset);
7544 if (rc)
7545 goto unmap_vaddr;
7546 cfgtable = remap_pci_mem(pci_resource_start(pdev,
7547 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
7548 if (!cfgtable) {
7549 rc = -ENOMEM;
7550 goto unmap_vaddr;
7551 }
7552 rc = write_driver_ver_to_cfgtable(cfgtable);
7553 if (rc)
7554 goto unmap_cfgtable;
7555
7556 /* If reset via doorbell register is supported, use that.
7557 * There are two such methods. Favor the newest method.
7558 */
7559 misc_fw_support = readl(&cfgtable->misc_fw_support);
7560 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7561 if (use_doorbell) {
7562 use_doorbell = DOORBELL_CTLR_RESET2;
7563 } else {
7564 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7565 if (use_doorbell) {
7566 dev_warn(&pdev->dev,
7567 "Soft reset not supported. Firmware update is required.\n");
7568 rc = -ENOTSUPP; /* try soft reset */
7569 goto unmap_cfgtable;
7570 }
7571 }
7572
7573 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7574 if (rc)
7575 goto unmap_cfgtable;
7576
7577 pci_restore_state(pdev);
7578 pci_write_config_word(pdev, 4, command_register);
7579
7580 /* Some devices (notably the HP Smart Array 5i Controller)
7581 need a little pause here */
7582 msleep(HPSA_POST_RESET_PAUSE_MSECS);
7583
7584 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7585 if (rc) {
7586 dev_warn(&pdev->dev,
7587 "Failed waiting for board to become ready after hard reset\n");
7588 goto unmap_cfgtable;
7589 }
7590
7591 rc = controller_reset_failed(vaddr);
7592 if (rc < 0)
7593 goto unmap_cfgtable;
7594 if (rc) {
7595 dev_warn(&pdev->dev, "Unable to successfully reset "
7596 "controller. Will try soft reset.\n");
7597 rc = -ENOTSUPP;
7598 } else {
7599 dev_info(&pdev->dev, "board ready after hard reset.\n");
7600 }
7601
7602 unmap_cfgtable:
7603 iounmap(cfgtable);
7604
7605 unmap_vaddr:
7606 iounmap(vaddr);
7607 return rc;
7608 }
7609
7610 /*
7611 * We cannot read the structure directly, for portability we must use
7612 * the io functions.
7613 * This is for debug only.
7614 */
7615 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7616 {
7617 #ifdef HPSA_DEBUG
7618 int i;
7619 char temp_name[17];
7620
7621 dev_info(dev, "Controller Configuration information\n");
7622 dev_info(dev, "------------------------------------\n");
7623 for (i = 0; i < 4; i++)
7624 temp_name[i] = readb(&(tb->Signature[i]));
7625 temp_name[4] = '\0';
7626 dev_info(dev, " Signature = %s\n", temp_name);
7627 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
7628 dev_info(dev, " Transport methods supported = 0x%x\n",
7629 readl(&(tb->TransportSupport)));
7630 dev_info(dev, " Transport methods active = 0x%x\n",
7631 readl(&(tb->TransportActive)));
7632 dev_info(dev, " Requested transport Method = 0x%x\n",
7633 readl(&(tb->HostWrite.TransportRequest)));
7634 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
7635 readl(&(tb->HostWrite.CoalIntDelay)));
7636 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
7637 readl(&(tb->HostWrite.CoalIntCount)));
7638 dev_info(dev, " Max outstanding commands = %d\n",
7639 readl(&(tb->CmdsOutMax)));
7640 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7641 for (i = 0; i < 16; i++)
7642 temp_name[i] = readb(&(tb->ServerName[i]));
7643 temp_name[16] = '\0';
7644 dev_info(dev, " Server Name = %s\n", temp_name);
7645 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
7646 readl(&(tb->HeartBeat)));
7647 #endif /* HPSA_DEBUG */
7648 }
7649
7650 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7651 {
7652 int i, offset, mem_type, bar_type;
7653
7654 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
7655 return 0;
7656 offset = 0;
7657 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7658 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7659 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7660 offset += 4;
7661 else {
7662 mem_type = pci_resource_flags(pdev, i) &
7663 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7664 switch (mem_type) {
7665 case PCI_BASE_ADDRESS_MEM_TYPE_32:
7666 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7667 offset += 4; /* 32 bit */
7668 break;
7669 case PCI_BASE_ADDRESS_MEM_TYPE_64:
7670 offset += 8;
7671 break;
7672 default: /* reserved in PCI 2.2 */
7673 dev_warn(&pdev->dev,
7674 "base address is invalid\n");
7675 return -1;
7676 break;
7677 }
7678 }
7679 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7680 return i + 1;
7681 }
7682 return -1;
7683 }
7684
7685 static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7686 {
7687 if (h->msix_vector) {
7688 if (h->pdev->msix_enabled)
7689 pci_disable_msix(h->pdev);
7690 h->msix_vector = 0;
7691 } else if (h->msi_vector) {
7692 if (h->pdev->msi_enabled)
7693 pci_disable_msi(h->pdev);
7694 h->msi_vector = 0;
7695 }
7696 }
7697
7698 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7699 * controllers that are capable. If not, we use legacy INTx mode.
7700 */
7701 static void hpsa_interrupt_mode(struct ctlr_info *h)
7702 {
7703 #ifdef CONFIG_PCI_MSI
7704 int err, i;
7705 struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
7706
7707 for (i = 0; i < MAX_REPLY_QUEUES; i++) {
7708 hpsa_msix_entries[i].vector = 0;
7709 hpsa_msix_entries[i].entry = i;
7710 }
7711
7712 /* Some boards advertise MSI but don't really support it */
7713 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
7714 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
7715 goto default_int_mode;
7716 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
7717 dev_info(&h->pdev->dev, "MSI-X capable controller\n");
7718 h->msix_vector = MAX_REPLY_QUEUES;
7719 if (h->msix_vector > num_online_cpus())
7720 h->msix_vector = num_online_cpus();
7721 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
7722 1, h->msix_vector);
7723 if (err < 0) {
7724 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
7725 h->msix_vector = 0;
7726 goto single_msi_mode;
7727 } else if (err < h->msix_vector) {
7728 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
7729 "available\n", err);
7730 }
7731 h->msix_vector = err;
7732 for (i = 0; i < h->msix_vector; i++)
7733 h->intr[i] = hpsa_msix_entries[i].vector;
7734 return;
7735 }
7736 single_msi_mode:
7737 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
7738 dev_info(&h->pdev->dev, "MSI capable controller\n");
7739 if (!pci_enable_msi(h->pdev))
7740 h->msi_vector = 1;
7741 else
7742 dev_warn(&h->pdev->dev, "MSI init failed\n");
7743 }
7744 default_int_mode:
7745 #endif /* CONFIG_PCI_MSI */
7746 /* if we get here we're going to use the default interrupt mode */
7747 h->intr[h->intr_mode] = h->pdev->irq;
7748 }
7749
7750 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
7751 {
7752 int i;
7753 u32 subsystem_vendor_id, subsystem_device_id;
7754
7755 subsystem_vendor_id = pdev->subsystem_vendor;
7756 subsystem_device_id = pdev->subsystem_device;
7757 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7758 subsystem_vendor_id;
7759
7760 for (i = 0; i < ARRAY_SIZE(products); i++)
7761 if (*board_id == products[i].board_id)
7762 return i;
7763
7764 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
7765 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
7766 !hpsa_allow_any) {
7767 dev_warn(&pdev->dev, "unrecognized board ID: "
7768 "0x%08x, ignoring.\n", *board_id);
7769 return -ENODEV;
7770 }
7771 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7772 }
7773
7774 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7775 unsigned long *memory_bar)
7776 {
7777 int i;
7778
7779 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7780 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7781 /* addressing mode bits already removed */
7782 *memory_bar = pci_resource_start(pdev, i);
7783 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7784 *memory_bar);
7785 return 0;
7786 }
7787 dev_warn(&pdev->dev, "no memory BAR found\n");
7788 return -ENODEV;
7789 }
7790
7791 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7792 int wait_for_ready)
7793 {
7794 int i, iterations;
7795 u32 scratchpad;
7796 if (wait_for_ready)
7797 iterations = HPSA_BOARD_READY_ITERATIONS;
7798 else
7799 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7800
7801 for (i = 0; i < iterations; i++) {
7802 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7803 if (wait_for_ready) {
7804 if (scratchpad == HPSA_FIRMWARE_READY)
7805 return 0;
7806 } else {
7807 if (scratchpad != HPSA_FIRMWARE_READY)
7808 return 0;
7809 }
7810 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7811 }
7812 dev_warn(&pdev->dev, "board not ready, timed out.\n");
7813 return -ENODEV;
7814 }
7815
7816 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7817 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7818 u64 *cfg_offset)
7819 {
7820 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7821 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7822 *cfg_base_addr &= (u32) 0x0000ffff;
7823 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7824 if (*cfg_base_addr_index == -1) {
7825 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7826 return -ENODEV;
7827 }
7828 return 0;
7829 }
7830
7831 static void hpsa_free_cfgtables(struct ctlr_info *h)
7832 {
7833 if (h->transtable) {
7834 iounmap(h->transtable);
7835 h->transtable = NULL;
7836 }
7837 if (h->cfgtable) {
7838 iounmap(h->cfgtable);
7839 h->cfgtable = NULL;
7840 }
7841 }
7842
7843 /* Find and map CISS config table and transfer table
7844 + * several items must be unmapped (freed) later
7845 + * */
7846 static int hpsa_find_cfgtables(struct ctlr_info *h)
7847 {
7848 u64 cfg_offset;
7849 u32 cfg_base_addr;
7850 u64 cfg_base_addr_index;
7851 u32 trans_offset;
7852 int rc;
7853
7854 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7855 &cfg_base_addr_index, &cfg_offset);
7856 if (rc)
7857 return rc;
7858 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7859 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7860 if (!h->cfgtable) {
7861 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7862 return -ENOMEM;
7863 }
7864 rc = write_driver_ver_to_cfgtable(h->cfgtable);
7865 if (rc)
7866 return rc;
7867 /* Find performant mode table. */
7868 trans_offset = readl(&h->cfgtable->TransMethodOffset);
7869 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7870 cfg_base_addr_index)+cfg_offset+trans_offset,
7871 sizeof(*h->transtable));
7872 if (!h->transtable) {
7873 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7874 hpsa_free_cfgtables(h);
7875 return -ENOMEM;
7876 }
7877 return 0;
7878 }
7879
7880 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7881 {
7882 #define MIN_MAX_COMMANDS 16
7883 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7884
7885 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7886
7887 /* Limit commands in memory limited kdump scenario. */
7888 if (reset_devices && h->max_commands > 32)
7889 h->max_commands = 32;
7890
7891 if (h->max_commands < MIN_MAX_COMMANDS) {
7892 dev_warn(&h->pdev->dev,
7893 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7894 h->max_commands,
7895 MIN_MAX_COMMANDS);
7896 h->max_commands = MIN_MAX_COMMANDS;
7897 }
7898 }
7899
7900 /* If the controller reports that the total max sg entries is greater than 512,
7901 * then we know that chained SG blocks work. (Original smart arrays did not
7902 * support chained SG blocks and would return zero for max sg entries.)
7903 */
7904 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7905 {
7906 return h->maxsgentries > 512;
7907 }
7908
7909 /* Interrogate the hardware for some limits:
7910 * max commands, max SG elements without chaining, and with chaining,
7911 * SG chain block size, etc.
7912 */
7913 static void hpsa_find_board_params(struct ctlr_info *h)
7914 {
7915 hpsa_get_max_perf_mode_cmds(h);
7916 h->nr_cmds = h->max_commands;
7917 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7918 h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7919 if (hpsa_supports_chained_sg_blocks(h)) {
7920 /* Limit in-command s/g elements to 32 save dma'able memory. */
7921 h->max_cmd_sg_entries = 32;
7922 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7923 h->maxsgentries--; /* save one for chain pointer */
7924 } else {
7925 /*
7926 * Original smart arrays supported at most 31 s/g entries
7927 * embedded inline in the command (trying to use more
7928 * would lock up the controller)
7929 */
7930 h->max_cmd_sg_entries = 31;
7931 h->maxsgentries = 31; /* default to traditional values */
7932 h->chainsize = 0;
7933 }
7934
7935 /* Find out what task management functions are supported and cache */
7936 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7937 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7938 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7939 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7940 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7941 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7942 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7943 }
7944
7945 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7946 {
7947 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7948 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7949 return false;
7950 }
7951 return true;
7952 }
7953
7954 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7955 {
7956 u32 driver_support;
7957
7958 driver_support = readl(&(h->cfgtable->driver_support));
7959 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7960 #ifdef CONFIG_X86
7961 driver_support |= ENABLE_SCSI_PREFETCH;
7962 #endif
7963 driver_support |= ENABLE_UNIT_ATTN;
7964 writel(driver_support, &(h->cfgtable->driver_support));
7965 }
7966
7967 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
7968 * in a prefetch beyond physical memory.
7969 */
7970 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7971 {
7972 u32 dma_prefetch;
7973
7974 if (h->board_id != 0x3225103C)
7975 return;
7976 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7977 dma_prefetch |= 0x8000;
7978 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7979 }
7980
7981 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7982 {
7983 int i;
7984 u32 doorbell_value;
7985 unsigned long flags;
7986 /* wait until the clear_event_notify bit 6 is cleared by controller. */
7987 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7988 spin_lock_irqsave(&h->lock, flags);
7989 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7990 spin_unlock_irqrestore(&h->lock, flags);
7991 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7992 goto done;
7993 /* delay and try again */
7994 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7995 }
7996 return -ENODEV;
7997 done:
7998 return 0;
7999 }
8000
8001 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
8002 {
8003 int i;
8004 u32 doorbell_value;
8005 unsigned long flags;
8006
8007 /* under certain very rare conditions, this can take awhile.
8008 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
8009 * as we enter this code.)
8010 */
8011 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
8012 if (h->remove_in_progress)
8013 goto done;
8014 spin_lock_irqsave(&h->lock, flags);
8015 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
8016 spin_unlock_irqrestore(&h->lock, flags);
8017 if (!(doorbell_value & CFGTBL_ChangeReq))
8018 goto done;
8019 /* delay and try again */
8020 msleep(MODE_CHANGE_WAIT_INTERVAL);
8021 }
8022 return -ENODEV;
8023 done:
8024 return 0;
8025 }
8026
8027 /* return -ENODEV or other reason on error, 0 on success */
8028 static int hpsa_enter_simple_mode(struct ctlr_info *h)
8029 {
8030 u32 trans_support;
8031
8032 trans_support = readl(&(h->cfgtable->TransportSupport));
8033 if (!(trans_support & SIMPLE_MODE))
8034 return -ENOTSUPP;
8035
8036 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
8037
8038 /* Update the field, and then ring the doorbell */
8039 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
8040 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
8041 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8042 if (hpsa_wait_for_mode_change_ack(h))
8043 goto error;
8044 print_cfg_table(&h->pdev->dev, h->cfgtable);
8045 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
8046 goto error;
8047 h->transMethod = CFGTBL_Trans_Simple;
8048 return 0;
8049 error:
8050 dev_err(&h->pdev->dev, "failed to enter simple mode\n");
8051 return -ENODEV;
8052 }
8053
8054 /* free items allocated or mapped by hpsa_pci_init */
8055 static void hpsa_free_pci_init(struct ctlr_info *h)
8056 {
8057 hpsa_free_cfgtables(h); /* pci_init 4 */
8058 iounmap(h->vaddr); /* pci_init 3 */
8059 h->vaddr = NULL;
8060 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
8061 /*
8062 * call pci_disable_device before pci_release_regions per
8063 * Documentation/PCI/pci.txt
8064 */
8065 pci_disable_device(h->pdev); /* pci_init 1 */
8066 pci_release_regions(h->pdev); /* pci_init 2 */
8067 }
8068
8069 /* several items must be freed later */
8070 static int hpsa_pci_init(struct ctlr_info *h)
8071 {
8072 int prod_index, err;
8073
8074 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
8075 if (prod_index < 0)
8076 return prod_index;
8077 h->product_name = products[prod_index].product_name;
8078 h->access = *(products[prod_index].access);
8079
8080 h->needs_abort_tags_swizzled =
8081 ctlr_needs_abort_tags_swizzled(h->board_id);
8082
8083 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
8084 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
8085
8086 err = pci_enable_device(h->pdev);
8087 if (err) {
8088 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
8089 pci_disable_device(h->pdev);
8090 return err;
8091 }
8092
8093 err = pci_request_regions(h->pdev, HPSA);
8094 if (err) {
8095 dev_err(&h->pdev->dev,
8096 "failed to obtain PCI resources\n");
8097 pci_disable_device(h->pdev);
8098 return err;
8099 }
8100
8101 pci_set_master(h->pdev);
8102
8103 hpsa_interrupt_mode(h);
8104 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
8105 if (err)
8106 goto clean2; /* intmode+region, pci */
8107 h->vaddr = remap_pci_mem(h->paddr, 0x250);
8108 if (!h->vaddr) {
8109 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
8110 err = -ENOMEM;
8111 goto clean2; /* intmode+region, pci */
8112 }
8113 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
8114 if (err)
8115 goto clean3; /* vaddr, intmode+region, pci */
8116 err = hpsa_find_cfgtables(h);
8117 if (err)
8118 goto clean3; /* vaddr, intmode+region, pci */
8119 hpsa_find_board_params(h);
8120
8121 if (!hpsa_CISS_signature_present(h)) {
8122 err = -ENODEV;
8123 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
8124 }
8125 hpsa_set_driver_support_bits(h);
8126 hpsa_p600_dma_prefetch_quirk(h);
8127 err = hpsa_enter_simple_mode(h);
8128 if (err)
8129 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
8130 return 0;
8131
8132 clean4: /* cfgtables, vaddr, intmode+region, pci */
8133 hpsa_free_cfgtables(h);
8134 clean3: /* vaddr, intmode+region, pci */
8135 iounmap(h->vaddr);
8136 h->vaddr = NULL;
8137 clean2: /* intmode+region, pci */
8138 hpsa_disable_interrupt_mode(h);
8139 /*
8140 * call pci_disable_device before pci_release_regions per
8141 * Documentation/PCI/pci.txt
8142 */
8143 pci_disable_device(h->pdev);
8144 pci_release_regions(h->pdev);
8145 return err;
8146 }
8147
8148 static void hpsa_hba_inquiry(struct ctlr_info *h)
8149 {
8150 int rc;
8151
8152 #define HBA_INQUIRY_BYTE_COUNT 64
8153 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
8154 if (!h->hba_inquiry_data)
8155 return;
8156 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
8157 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
8158 if (rc != 0) {
8159 kfree(h->hba_inquiry_data);
8160 h->hba_inquiry_data = NULL;
8161 }
8162 }
8163
8164 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
8165 {
8166 int rc, i;
8167 void __iomem *vaddr;
8168
8169 if (!reset_devices)
8170 return 0;
8171
8172 /* kdump kernel is loading, we don't know in which state is
8173 * the pci interface. The dev->enable_cnt is equal zero
8174 * so we call enable+disable, wait a while and switch it on.
8175 */
8176 rc = pci_enable_device(pdev);
8177 if (rc) {
8178 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
8179 return -ENODEV;
8180 }
8181 pci_disable_device(pdev);
8182 msleep(260); /* a randomly chosen number */
8183 rc = pci_enable_device(pdev);
8184 if (rc) {
8185 dev_warn(&pdev->dev, "failed to enable device.\n");
8186 return -ENODEV;
8187 }
8188
8189 pci_set_master(pdev);
8190
8191 vaddr = pci_ioremap_bar(pdev, 0);
8192 if (vaddr == NULL) {
8193 rc = -ENOMEM;
8194 goto out_disable;
8195 }
8196 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
8197 iounmap(vaddr);
8198
8199 /* Reset the controller with a PCI power-cycle or via doorbell */
8200 rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
8201
8202 /* -ENOTSUPP here means we cannot reset the controller
8203 * but it's already (and still) up and running in
8204 * "performant mode". Or, it might be 640x, which can't reset
8205 * due to concerns about shared bbwc between 6402/6404 pair.
8206 */
8207 if (rc)
8208 goto out_disable;
8209
8210 /* Now try to get the controller to respond to a no-op */
8211 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
8212 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
8213 if (hpsa_noop(pdev) == 0)
8214 break;
8215 else
8216 dev_warn(&pdev->dev, "no-op failed%s\n",
8217 (i < 11 ? "; re-trying" : ""));
8218 }
8219
8220 out_disable:
8221
8222 pci_disable_device(pdev);
8223 return rc;
8224 }
8225
8226 static void hpsa_free_cmd_pool(struct ctlr_info *h)
8227 {
8228 kfree(h->cmd_pool_bits);
8229 h->cmd_pool_bits = NULL;
8230 if (h->cmd_pool) {
8231 pci_free_consistent(h->pdev,
8232 h->nr_cmds * sizeof(struct CommandList),
8233 h->cmd_pool,
8234 h->cmd_pool_dhandle);
8235 h->cmd_pool = NULL;
8236 h->cmd_pool_dhandle = 0;
8237 }
8238 if (h->errinfo_pool) {
8239 pci_free_consistent(h->pdev,
8240 h->nr_cmds * sizeof(struct ErrorInfo),
8241 h->errinfo_pool,
8242 h->errinfo_pool_dhandle);
8243 h->errinfo_pool = NULL;
8244 h->errinfo_pool_dhandle = 0;
8245 }
8246 }
8247
8248 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
8249 {
8250 h->cmd_pool_bits = kzalloc(
8251 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
8252 sizeof(unsigned long), GFP_KERNEL);
8253 h->cmd_pool = pci_alloc_consistent(h->pdev,
8254 h->nr_cmds * sizeof(*h->cmd_pool),
8255 &(h->cmd_pool_dhandle));
8256 h->errinfo_pool = pci_alloc_consistent(h->pdev,
8257 h->nr_cmds * sizeof(*h->errinfo_pool),
8258 &(h->errinfo_pool_dhandle));
8259 if ((h->cmd_pool_bits == NULL)
8260 || (h->cmd_pool == NULL)
8261 || (h->errinfo_pool == NULL)) {
8262 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
8263 goto clean_up;
8264 }
8265 hpsa_preinitialize_commands(h);
8266 return 0;
8267 clean_up:
8268 hpsa_free_cmd_pool(h);
8269 return -ENOMEM;
8270 }
8271
8272 static void hpsa_irq_affinity_hints(struct ctlr_info *h)
8273 {
8274 int i, cpu;
8275
8276 cpu = cpumask_first(cpu_online_mask);
8277 for (i = 0; i < h->msix_vector; i++) {
8278 irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
8279 cpu = cpumask_next(cpu, cpu_online_mask);
8280 }
8281 }
8282
8283 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
8284 static void hpsa_free_irqs(struct ctlr_info *h)
8285 {
8286 int i;
8287
8288 if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
8289 /* Single reply queue, only one irq to free */
8290 i = h->intr_mode;
8291 irq_set_affinity_hint(h->intr[i], NULL);
8292 free_irq(h->intr[i], &h->q[i]);
8293 h->q[i] = 0;
8294 return;
8295 }
8296
8297 for (i = 0; i < h->msix_vector; i++) {
8298 irq_set_affinity_hint(h->intr[i], NULL);
8299 free_irq(h->intr[i], &h->q[i]);
8300 h->q[i] = 0;
8301 }
8302 for (; i < MAX_REPLY_QUEUES; i++)
8303 h->q[i] = 0;
8304 }
8305
8306 /* returns 0 on success; cleans up and returns -Enn on error */
8307 static int hpsa_request_irqs(struct ctlr_info *h,
8308 irqreturn_t (*msixhandler)(int, void *),
8309 irqreturn_t (*intxhandler)(int, void *))
8310 {
8311 int rc, i;
8312
8313 /*
8314 * initialize h->q[x] = x so that interrupt handlers know which
8315 * queue to process.
8316 */
8317 for (i = 0; i < MAX_REPLY_QUEUES; i++)
8318 h->q[i] = (u8) i;
8319
8320 if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
8321 /* If performant mode and MSI-X, use multiple reply queues */
8322 for (i = 0; i < h->msix_vector; i++) {
8323 sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8324 rc = request_irq(h->intr[i], msixhandler,
8325 0, h->intrname[i],
8326 &h->q[i]);
8327 if (rc) {
8328 int j;
8329
8330 dev_err(&h->pdev->dev,
8331 "failed to get irq %d for %s\n",
8332 h->intr[i], h->devname);
8333 for (j = 0; j < i; j++) {
8334 free_irq(h->intr[j], &h->q[j]);
8335 h->q[j] = 0;
8336 }
8337 for (; j < MAX_REPLY_QUEUES; j++)
8338 h->q[j] = 0;
8339 return rc;
8340 }
8341 }
8342 hpsa_irq_affinity_hints(h);
8343 } else {
8344 /* Use single reply pool */
8345 if (h->msix_vector > 0 || h->msi_vector) {
8346 if (h->msix_vector)
8347 sprintf(h->intrname[h->intr_mode],
8348 "%s-msix", h->devname);
8349 else
8350 sprintf(h->intrname[h->intr_mode],
8351 "%s-msi", h->devname);
8352 rc = request_irq(h->intr[h->intr_mode],
8353 msixhandler, 0,
8354 h->intrname[h->intr_mode],
8355 &h->q[h->intr_mode]);
8356 } else {
8357 sprintf(h->intrname[h->intr_mode],
8358 "%s-intx", h->devname);
8359 rc = request_irq(h->intr[h->intr_mode],
8360 intxhandler, IRQF_SHARED,
8361 h->intrname[h->intr_mode],
8362 &h->q[h->intr_mode]);
8363 }
8364 irq_set_affinity_hint(h->intr[h->intr_mode], NULL);
8365 }
8366 if (rc) {
8367 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
8368 h->intr[h->intr_mode], h->devname);
8369 hpsa_free_irqs(h);
8370 return -ENODEV;
8371 }
8372 return 0;
8373 }
8374
8375 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
8376 {
8377 int rc;
8378 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
8379
8380 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
8381 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
8382 if (rc) {
8383 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
8384 return rc;
8385 }
8386
8387 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
8388 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
8389 if (rc) {
8390 dev_warn(&h->pdev->dev, "Board failed to become ready "
8391 "after soft reset.\n");
8392 return rc;
8393 }
8394
8395 return 0;
8396 }
8397
8398 static void hpsa_free_reply_queues(struct ctlr_info *h)
8399 {
8400 int i;
8401
8402 for (i = 0; i < h->nreply_queues; i++) {
8403 if (!h->reply_queue[i].head)
8404 continue;
8405 pci_free_consistent(h->pdev,
8406 h->reply_queue_size,
8407 h->reply_queue[i].head,
8408 h->reply_queue[i].busaddr);
8409 h->reply_queue[i].head = NULL;
8410 h->reply_queue[i].busaddr = 0;
8411 }
8412 h->reply_queue_size = 0;
8413 }
8414
8415 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
8416 {
8417 hpsa_free_performant_mode(h); /* init_one 7 */
8418 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8419 hpsa_free_cmd_pool(h); /* init_one 5 */
8420 hpsa_free_irqs(h); /* init_one 4 */
8421 scsi_host_put(h->scsi_host); /* init_one 3 */
8422 h->scsi_host = NULL; /* init_one 3 */
8423 hpsa_free_pci_init(h); /* init_one 2_5 */
8424 free_percpu(h->lockup_detected); /* init_one 2 */
8425 h->lockup_detected = NULL; /* init_one 2 */
8426 if (h->resubmit_wq) {
8427 destroy_workqueue(h->resubmit_wq); /* init_one 1 */
8428 h->resubmit_wq = NULL;
8429 }
8430 if (h->rescan_ctlr_wq) {
8431 destroy_workqueue(h->rescan_ctlr_wq);
8432 h->rescan_ctlr_wq = NULL;
8433 }
8434 kfree(h); /* init_one 1 */
8435 }
8436
8437 /* Called when controller lockup detected. */
8438 static void fail_all_outstanding_cmds(struct ctlr_info *h)
8439 {
8440 int i, refcount;
8441 struct CommandList *c;
8442 int failcount = 0;
8443
8444 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
8445 for (i = 0; i < h->nr_cmds; i++) {
8446 c = h->cmd_pool + i;
8447 refcount = atomic_inc_return(&c->refcount);
8448 if (refcount > 1) {
8449 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
8450 finish_cmd(c);
8451 atomic_dec(&h->commands_outstanding);
8452 failcount++;
8453 }
8454 cmd_free(h, c);
8455 }
8456 dev_warn(&h->pdev->dev,
8457 "failed %d commands in fail_all\n", failcount);
8458 }
8459
8460 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8461 {
8462 int cpu;
8463
8464 for_each_online_cpu(cpu) {
8465 u32 *lockup_detected;
8466 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8467 *lockup_detected = value;
8468 }
8469 wmb(); /* be sure the per-cpu variables are out to memory */
8470 }
8471
8472 static void controller_lockup_detected(struct ctlr_info *h)
8473 {
8474 unsigned long flags;
8475 u32 lockup_detected;
8476
8477 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8478 spin_lock_irqsave(&h->lock, flags);
8479 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8480 if (!lockup_detected) {
8481 /* no heartbeat, but controller gave us a zero. */
8482 dev_warn(&h->pdev->dev,
8483 "lockup detected after %d but scratchpad register is zero\n",
8484 h->heartbeat_sample_interval / HZ);
8485 lockup_detected = 0xffffffff;
8486 }
8487 set_lockup_detected_for_all_cpus(h, lockup_detected);
8488 spin_unlock_irqrestore(&h->lock, flags);
8489 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
8490 lockup_detected, h->heartbeat_sample_interval / HZ);
8491 pci_disable_device(h->pdev);
8492 fail_all_outstanding_cmds(h);
8493 }
8494
8495 static int detect_controller_lockup(struct ctlr_info *h)
8496 {
8497 u64 now;
8498 u32 heartbeat;
8499 unsigned long flags;
8500
8501 now = get_jiffies_64();
8502 /* If we've received an interrupt recently, we're ok. */
8503 if (time_after64(h->last_intr_timestamp +
8504 (h->heartbeat_sample_interval), now))
8505 return false;
8506
8507 /*
8508 * If we've already checked the heartbeat recently, we're ok.
8509 * This could happen if someone sends us a signal. We
8510 * otherwise don't care about signals in this thread.
8511 */
8512 if (time_after64(h->last_heartbeat_timestamp +
8513 (h->heartbeat_sample_interval), now))
8514 return false;
8515
8516 /* If heartbeat has not changed since we last looked, we're not ok. */
8517 spin_lock_irqsave(&h->lock, flags);
8518 heartbeat = readl(&h->cfgtable->HeartBeat);
8519 spin_unlock_irqrestore(&h->lock, flags);
8520 if (h->last_heartbeat == heartbeat) {
8521 controller_lockup_detected(h);
8522 return true;
8523 }
8524
8525 /* We're ok. */
8526 h->last_heartbeat = heartbeat;
8527 h->last_heartbeat_timestamp = now;
8528 return false;
8529 }
8530
8531 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
8532 {
8533 int i;
8534 char *event_type;
8535
8536 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8537 return;
8538
8539 /* Ask the controller to clear the events we're handling. */
8540 if ((h->transMethod & (CFGTBL_Trans_io_accel1
8541 | CFGTBL_Trans_io_accel2)) &&
8542 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
8543 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
8544
8545 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
8546 event_type = "state change";
8547 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
8548 event_type = "configuration change";
8549 /* Stop sending new RAID offload reqs via the IO accelerator */
8550 scsi_block_requests(h->scsi_host);
8551 for (i = 0; i < h->ndevices; i++) {
8552 h->dev[i]->offload_enabled = 0;
8553 h->dev[i]->offload_to_be_enabled = 0;
8554 }
8555 hpsa_drain_accel_commands(h);
8556 /* Set 'accelerator path config change' bit */
8557 dev_warn(&h->pdev->dev,
8558 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
8559 h->events, event_type);
8560 writel(h->events, &(h->cfgtable->clear_event_notify));
8561 /* Set the "clear event notify field update" bit 6 */
8562 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8563 /* Wait until ctlr clears 'clear event notify field', bit 6 */
8564 hpsa_wait_for_clear_event_notify_ack(h);
8565 scsi_unblock_requests(h->scsi_host);
8566 } else {
8567 /* Acknowledge controller notification events. */
8568 writel(h->events, &(h->cfgtable->clear_event_notify));
8569 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8570 hpsa_wait_for_clear_event_notify_ack(h);
8571 #if 0
8572 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8573 hpsa_wait_for_mode_change_ack(h);
8574 #endif
8575 }
8576 return;
8577 }
8578
8579 /* Check a register on the controller to see if there are configuration
8580 * changes (added/changed/removed logical drives, etc.) which mean that
8581 * we should rescan the controller for devices.
8582 * Also check flag for driver-initiated rescan.
8583 */
8584 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
8585 {
8586 if (h->drv_req_rescan) {
8587 h->drv_req_rescan = 0;
8588 return 1;
8589 }
8590
8591 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8592 return 0;
8593
8594 h->events = readl(&(h->cfgtable->event_notify));
8595 return h->events & RESCAN_REQUIRED_EVENT_BITS;
8596 }
8597
8598 /*
8599 * Check if any of the offline devices have become ready
8600 */
8601 static int hpsa_offline_devices_ready(struct ctlr_info *h)
8602 {
8603 unsigned long flags;
8604 struct offline_device_entry *d;
8605 struct list_head *this, *tmp;
8606
8607 spin_lock_irqsave(&h->offline_device_lock, flags);
8608 list_for_each_safe(this, tmp, &h->offline_device_list) {
8609 d = list_entry(this, struct offline_device_entry,
8610 offline_list);
8611 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8612 if (!hpsa_volume_offline(h, d->scsi3addr)) {
8613 spin_lock_irqsave(&h->offline_device_lock, flags);
8614 list_del(&d->offline_list);
8615 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8616 return 1;
8617 }
8618 spin_lock_irqsave(&h->offline_device_lock, flags);
8619 }
8620 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8621 return 0;
8622 }
8623
8624 static int hpsa_luns_changed(struct ctlr_info *h)
8625 {
8626 int rc = 1; /* assume there are changes */
8627 struct ReportLUNdata *logdev = NULL;
8628
8629 /* if we can't find out if lun data has changed,
8630 * assume that it has.
8631 */
8632
8633 if (!h->lastlogicals)
8634 goto out;
8635
8636 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
8637 if (!logdev) {
8638 dev_warn(&h->pdev->dev,
8639 "Out of memory, can't track lun changes.\n");
8640 goto out;
8641 }
8642 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
8643 dev_warn(&h->pdev->dev,
8644 "report luns failed, can't track lun changes.\n");
8645 goto out;
8646 }
8647 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
8648 dev_info(&h->pdev->dev,
8649 "Lun changes detected.\n");
8650 memcpy(h->lastlogicals, logdev, sizeof(*logdev));
8651 goto out;
8652 } else
8653 rc = 0; /* no changes detected. */
8654 out:
8655 kfree(logdev);
8656 return rc;
8657 }
8658
8659 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8660 {
8661 unsigned long flags;
8662 struct ctlr_info *h = container_of(to_delayed_work(work),
8663 struct ctlr_info, rescan_ctlr_work);
8664
8665
8666 if (h->remove_in_progress)
8667 return;
8668
8669 if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
8670 scsi_host_get(h->scsi_host);
8671 hpsa_ack_ctlr_events(h);
8672 hpsa_scan_start(h->scsi_host);
8673 scsi_host_put(h->scsi_host);
8674 } else if (h->discovery_polling) {
8675 hpsa_disable_rld_caching(h);
8676 if (hpsa_luns_changed(h)) {
8677 struct Scsi_Host *sh = NULL;
8678
8679 dev_info(&h->pdev->dev,
8680 "driver discovery polling rescan.\n");
8681 sh = scsi_host_get(h->scsi_host);
8682 if (sh != NULL) {
8683 hpsa_scan_start(sh);
8684 scsi_host_put(sh);
8685 }
8686 }
8687 }
8688 spin_lock_irqsave(&h->lock, flags);
8689 if (!h->remove_in_progress)
8690 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8691 h->heartbeat_sample_interval);
8692 spin_unlock_irqrestore(&h->lock, flags);
8693 }
8694
8695 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
8696 {
8697 unsigned long flags;
8698 struct ctlr_info *h = container_of(to_delayed_work(work),
8699 struct ctlr_info, monitor_ctlr_work);
8700
8701 detect_controller_lockup(h);
8702 if (lockup_detected(h))
8703 return;
8704
8705 spin_lock_irqsave(&h->lock, flags);
8706 if (!h->remove_in_progress)
8707 schedule_delayed_work(&h->monitor_ctlr_work,
8708 h->heartbeat_sample_interval);
8709 spin_unlock_irqrestore(&h->lock, flags);
8710 }
8711
8712 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
8713 char *name)
8714 {
8715 struct workqueue_struct *wq = NULL;
8716
8717 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
8718 if (!wq)
8719 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
8720
8721 return wq;
8722 }
8723
8724 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8725 {
8726 int dac, rc;
8727 struct ctlr_info *h;
8728 int try_soft_reset = 0;
8729 unsigned long flags;
8730 u32 board_id;
8731
8732 if (number_of_controllers == 0)
8733 printk(KERN_INFO DRIVER_NAME "\n");
8734
8735 rc = hpsa_lookup_board_id(pdev, &board_id);
8736 if (rc < 0) {
8737 dev_warn(&pdev->dev, "Board ID not found\n");
8738 return rc;
8739 }
8740
8741 rc = hpsa_init_reset_devices(pdev, board_id);
8742 if (rc) {
8743 if (rc != -ENOTSUPP)
8744 return rc;
8745 /* If the reset fails in a particular way (it has no way to do
8746 * a proper hard reset, so returns -ENOTSUPP) we can try to do
8747 * a soft reset once we get the controller configured up to the
8748 * point that it can accept a command.
8749 */
8750 try_soft_reset = 1;
8751 rc = 0;
8752 }
8753
8754 reinit_after_soft_reset:
8755
8756 /* Command structures must be aligned on a 32-byte boundary because
8757 * the 5 lower bits of the address are used by the hardware. and by
8758 * the driver. See comments in hpsa.h for more info.
8759 */
8760 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8761 h = kzalloc(sizeof(*h), GFP_KERNEL);
8762 if (!h) {
8763 dev_err(&pdev->dev, "Failed to allocate controller head\n");
8764 return -ENOMEM;
8765 }
8766
8767 h->pdev = pdev;
8768
8769 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8770 INIT_LIST_HEAD(&h->offline_device_list);
8771 spin_lock_init(&h->lock);
8772 spin_lock_init(&h->offline_device_lock);
8773 spin_lock_init(&h->scan_lock);
8774 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8775 atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS);
8776
8777 /* Allocate and clear per-cpu variable lockup_detected */
8778 h->lockup_detected = alloc_percpu(u32);
8779 if (!h->lockup_detected) {
8780 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8781 rc = -ENOMEM;
8782 goto clean1; /* aer/h */
8783 }
8784 set_lockup_detected_for_all_cpus(h, 0);
8785
8786 rc = hpsa_pci_init(h);
8787 if (rc)
8788 goto clean2; /* lu, aer/h */
8789
8790 /* relies on h-> settings made by hpsa_pci_init, including
8791 * interrupt_mode h->intr */
8792 rc = hpsa_scsi_host_alloc(h);
8793 if (rc)
8794 goto clean2_5; /* pci, lu, aer/h */
8795
8796 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8797 h->ctlr = number_of_controllers;
8798 number_of_controllers++;
8799
8800 /* configure PCI DMA stuff */
8801 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
8802 if (rc == 0) {
8803 dac = 1;
8804 } else {
8805 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
8806 if (rc == 0) {
8807 dac = 0;
8808 } else {
8809 dev_err(&pdev->dev, "no suitable DMA available\n");
8810 goto clean3; /* shost, pci, lu, aer/h */
8811 }
8812 }
8813
8814 /* make sure the board interrupts are off */
8815 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8816
8817 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8818 if (rc)
8819 goto clean3; /* shost, pci, lu, aer/h */
8820 rc = hpsa_alloc_cmd_pool(h);
8821 if (rc)
8822 goto clean4; /* irq, shost, pci, lu, aer/h */
8823 rc = hpsa_alloc_sg_chain_blocks(h);
8824 if (rc)
8825 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */
8826 init_waitqueue_head(&h->scan_wait_queue);
8827 init_waitqueue_head(&h->abort_cmd_wait_queue);
8828 init_waitqueue_head(&h->event_sync_wait_queue);
8829 mutex_init(&h->reset_mutex);
8830 h->scan_finished = 1; /* no scan currently in progress */
8831 h->scan_waiting = 0;
8832
8833 pci_set_drvdata(pdev, h);
8834 h->ndevices = 0;
8835
8836 spin_lock_init(&h->devlock);
8837 rc = hpsa_put_ctlr_into_performant_mode(h);
8838 if (rc)
8839 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8840
8841 /* create the resubmit workqueue */
8842 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8843 if (!h->rescan_ctlr_wq) {
8844 rc = -ENOMEM;
8845 goto clean7;
8846 }
8847
8848 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8849 if (!h->resubmit_wq) {
8850 rc = -ENOMEM;
8851 goto clean7; /* aer/h */
8852 }
8853
8854 /*
8855 * At this point, the controller is ready to take commands.
8856 * Now, if reset_devices and the hard reset didn't work, try
8857 * the soft reset and see if that works.
8858 */
8859 if (try_soft_reset) {
8860
8861 /* This is kind of gross. We may or may not get a completion
8862 * from the soft reset command, and if we do, then the value
8863 * from the fifo may or may not be valid. So, we wait 10 secs
8864 * after the reset throwing away any completions we get during
8865 * that time. Unregister the interrupt handler and register
8866 * fake ones to scoop up any residual completions.
8867 */
8868 spin_lock_irqsave(&h->lock, flags);
8869 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8870 spin_unlock_irqrestore(&h->lock, flags);
8871 hpsa_free_irqs(h);
8872 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8873 hpsa_intx_discard_completions);
8874 if (rc) {
8875 dev_warn(&h->pdev->dev,
8876 "Failed to request_irq after soft reset.\n");
8877 /*
8878 * cannot goto clean7 or free_irqs will be called
8879 * again. Instead, do its work
8880 */
8881 hpsa_free_performant_mode(h); /* clean7 */
8882 hpsa_free_sg_chain_blocks(h); /* clean6 */
8883 hpsa_free_cmd_pool(h); /* clean5 */
8884 /*
8885 * skip hpsa_free_irqs(h) clean4 since that
8886 * was just called before request_irqs failed
8887 */
8888 goto clean3;
8889 }
8890
8891 rc = hpsa_kdump_soft_reset(h);
8892 if (rc)
8893 /* Neither hard nor soft reset worked, we're hosed. */
8894 goto clean7;
8895
8896 dev_info(&h->pdev->dev, "Board READY.\n");
8897 dev_info(&h->pdev->dev,
8898 "Waiting for stale completions to drain.\n");
8899 h->access.set_intr_mask(h, HPSA_INTR_ON);
8900 msleep(10000);
8901 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8902
8903 rc = controller_reset_failed(h->cfgtable);
8904 if (rc)
8905 dev_info(&h->pdev->dev,
8906 "Soft reset appears to have failed.\n");
8907
8908 /* since the controller's reset, we have to go back and re-init
8909 * everything. Easiest to just forget what we've done and do it
8910 * all over again.
8911 */
8912 hpsa_undo_allocations_after_kdump_soft_reset(h);
8913 try_soft_reset = 0;
8914 if (rc)
8915 /* don't goto clean, we already unallocated */
8916 return -ENODEV;
8917
8918 goto reinit_after_soft_reset;
8919 }
8920
8921 /* Enable Accelerated IO path at driver layer */
8922 h->acciopath_status = 1;
8923 /* Disable discovery polling.*/
8924 h->discovery_polling = 0;
8925
8926
8927 /* Turn the interrupts on so we can service requests */
8928 h->access.set_intr_mask(h, HPSA_INTR_ON);
8929
8930 hpsa_hba_inquiry(h);
8931
8932 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
8933 if (!h->lastlogicals)
8934 dev_info(&h->pdev->dev,
8935 "Can't track change to report lun data\n");
8936
8937 /* hook into SCSI subsystem */
8938 rc = hpsa_scsi_add_host(h);
8939 if (rc)
8940 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8941
8942 /* Monitor the controller for firmware lockups */
8943 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8944 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8945 schedule_delayed_work(&h->monitor_ctlr_work,
8946 h->heartbeat_sample_interval);
8947 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8948 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8949 h->heartbeat_sample_interval);
8950 return 0;
8951
8952 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8953 hpsa_free_performant_mode(h);
8954 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8955 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8956 hpsa_free_sg_chain_blocks(h);
8957 clean5: /* cmd, irq, shost, pci, lu, aer/h */
8958 hpsa_free_cmd_pool(h);
8959 clean4: /* irq, shost, pci, lu, aer/h */
8960 hpsa_free_irqs(h);
8961 clean3: /* shost, pci, lu, aer/h */
8962 scsi_host_put(h->scsi_host);
8963 h->scsi_host = NULL;
8964 clean2_5: /* pci, lu, aer/h */
8965 hpsa_free_pci_init(h);
8966 clean2: /* lu, aer/h */
8967 if (h->lockup_detected) {
8968 free_percpu(h->lockup_detected);
8969 h->lockup_detected = NULL;
8970 }
8971 clean1: /* wq/aer/h */
8972 if (h->resubmit_wq) {
8973 destroy_workqueue(h->resubmit_wq);
8974 h->resubmit_wq = NULL;
8975 }
8976 if (h->rescan_ctlr_wq) {
8977 destroy_workqueue(h->rescan_ctlr_wq);
8978 h->rescan_ctlr_wq = NULL;
8979 }
8980 kfree(h);
8981 return rc;
8982 }
8983
8984 static void hpsa_flush_cache(struct ctlr_info *h)
8985 {
8986 char *flush_buf;
8987 struct CommandList *c;
8988 int rc;
8989
8990 if (unlikely(lockup_detected(h)))
8991 return;
8992 flush_buf = kzalloc(4, GFP_KERNEL);
8993 if (!flush_buf)
8994 return;
8995
8996 c = cmd_alloc(h);
8997
8998 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8999 RAID_CTLR_LUNID, TYPE_CMD)) {
9000 goto out;
9001 }
9002 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
9003 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT);
9004 if (rc)
9005 goto out;
9006 if (c->err_info->CommandStatus != 0)
9007 out:
9008 dev_warn(&h->pdev->dev,
9009 "error flushing cache on controller\n");
9010 cmd_free(h, c);
9011 kfree(flush_buf);
9012 }
9013
9014 /* Make controller gather fresh report lun data each time we
9015 * send down a report luns request
9016 */
9017 static void hpsa_disable_rld_caching(struct ctlr_info *h)
9018 {
9019 u32 *options;
9020 struct CommandList *c;
9021 int rc;
9022
9023 /* Don't bother trying to set diag options if locked up */
9024 if (unlikely(h->lockup_detected))
9025 return;
9026
9027 options = kzalloc(sizeof(*options), GFP_KERNEL);
9028 if (!options) {
9029 dev_err(&h->pdev->dev,
9030 "Error: failed to disable rld caching, during alloc.\n");
9031 return;
9032 }
9033
9034 c = cmd_alloc(h);
9035
9036 /* first, get the current diag options settings */
9037 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
9038 RAID_CTLR_LUNID, TYPE_CMD))
9039 goto errout;
9040
9041 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
9042 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
9043 if ((rc != 0) || (c->err_info->CommandStatus != 0))
9044 goto errout;
9045
9046 /* Now, set the bit for disabling the RLD caching */
9047 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
9048
9049 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
9050 RAID_CTLR_LUNID, TYPE_CMD))
9051 goto errout;
9052
9053 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
9054 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT);
9055 if ((rc != 0) || (c->err_info->CommandStatus != 0))
9056 goto errout;
9057
9058 /* Now verify that it got set: */
9059 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
9060 RAID_CTLR_LUNID, TYPE_CMD))
9061 goto errout;
9062
9063 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
9064 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
9065 if ((rc != 0) || (c->err_info->CommandStatus != 0))
9066 goto errout;
9067
9068 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
9069 goto out;
9070
9071 errout:
9072 dev_err(&h->pdev->dev,
9073 "Error: failed to disable report lun data caching.\n");
9074 out:
9075 cmd_free(h, c);
9076 kfree(options);
9077 }
9078
9079 static void hpsa_shutdown(struct pci_dev *pdev)
9080 {
9081 struct ctlr_info *h;
9082
9083 h = pci_get_drvdata(pdev);
9084 /* Turn board interrupts off and send the flush cache command
9085 * sendcmd will turn off interrupt, and send the flush...
9086 * To write all data in the battery backed cache to disks
9087 */
9088 hpsa_flush_cache(h);
9089 h->access.set_intr_mask(h, HPSA_INTR_OFF);
9090 hpsa_free_irqs(h); /* init_one 4 */
9091 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
9092 }
9093
9094 static void hpsa_free_device_info(struct ctlr_info *h)
9095 {
9096 int i;
9097
9098 for (i = 0; i < h->ndevices; i++) {
9099 kfree(h->dev[i]);
9100 h->dev[i] = NULL;
9101 }
9102 }
9103
9104 static void hpsa_remove_one(struct pci_dev *pdev)
9105 {
9106 struct ctlr_info *h;
9107 unsigned long flags;
9108
9109 if (pci_get_drvdata(pdev) == NULL) {
9110 dev_err(&pdev->dev, "unable to remove device\n");
9111 return;
9112 }
9113 h = pci_get_drvdata(pdev);
9114
9115 /* Get rid of any controller monitoring work items */
9116 spin_lock_irqsave(&h->lock, flags);
9117 h->remove_in_progress = 1;
9118 spin_unlock_irqrestore(&h->lock, flags);
9119 cancel_delayed_work_sync(&h->monitor_ctlr_work);
9120 cancel_delayed_work_sync(&h->rescan_ctlr_work);
9121 destroy_workqueue(h->rescan_ctlr_wq);
9122 destroy_workqueue(h->resubmit_wq);
9123
9124 hpsa_delete_sas_host(h);
9125
9126 /*
9127 * Call before disabling interrupts.
9128 * scsi_remove_host can trigger I/O operations especially
9129 * when multipath is enabled. There can be SYNCHRONIZE CACHE
9130 * operations which cannot complete and will hang the system.
9131 */
9132 if (h->scsi_host)
9133 scsi_remove_host(h->scsi_host); /* init_one 8 */
9134 /* includes hpsa_free_irqs - init_one 4 */
9135 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
9136 hpsa_shutdown(pdev);
9137
9138 hpsa_free_device_info(h); /* scan */
9139
9140 kfree(h->hba_inquiry_data); /* init_one 10 */
9141 h->hba_inquiry_data = NULL; /* init_one 10 */
9142 hpsa_free_ioaccel2_sg_chain_blocks(h);
9143 hpsa_free_performant_mode(h); /* init_one 7 */
9144 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
9145 hpsa_free_cmd_pool(h); /* init_one 5 */
9146 kfree(h->lastlogicals);
9147
9148 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
9149
9150 scsi_host_put(h->scsi_host); /* init_one 3 */
9151 h->scsi_host = NULL; /* init_one 3 */
9152
9153 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
9154 hpsa_free_pci_init(h); /* init_one 2.5 */
9155
9156 free_percpu(h->lockup_detected); /* init_one 2 */
9157 h->lockup_detected = NULL; /* init_one 2 */
9158 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */
9159
9160 kfree(h); /* init_one 1 */
9161 }
9162
9163 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
9164 __attribute__((unused)) pm_message_t state)
9165 {
9166 return -ENOSYS;
9167 }
9168
9169 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
9170 {
9171 return -ENOSYS;
9172 }
9173
9174 static struct pci_driver hpsa_pci_driver = {
9175 .name = HPSA,
9176 .probe = hpsa_init_one,
9177 .remove = hpsa_remove_one,
9178 .id_table = hpsa_pci_device_id, /* id_table */
9179 .shutdown = hpsa_shutdown,
9180 .suspend = hpsa_suspend,
9181 .resume = hpsa_resume,
9182 };
9183
9184 /* Fill in bucket_map[], given nsgs (the max number of
9185 * scatter gather elements supported) and bucket[],
9186 * which is an array of 8 integers. The bucket[] array
9187 * contains 8 different DMA transfer sizes (in 16
9188 * byte increments) which the controller uses to fetch
9189 * commands. This function fills in bucket_map[], which
9190 * maps a given number of scatter gather elements to one of
9191 * the 8 DMA transfer sizes. The point of it is to allow the
9192 * controller to only do as much DMA as needed to fetch the
9193 * command, with the DMA transfer size encoded in the lower
9194 * bits of the command address.
9195 */
9196 static void calc_bucket_map(int bucket[], int num_buckets,
9197 int nsgs, int min_blocks, u32 *bucket_map)
9198 {
9199 int i, j, b, size;
9200
9201 /* Note, bucket_map must have nsgs+1 entries. */
9202 for (i = 0; i <= nsgs; i++) {
9203 /* Compute size of a command with i SG entries */
9204 size = i + min_blocks;
9205 b = num_buckets; /* Assume the biggest bucket */
9206 /* Find the bucket that is just big enough */
9207 for (j = 0; j < num_buckets; j++) {
9208 if (bucket[j] >= size) {
9209 b = j;
9210 break;
9211 }
9212 }
9213 /* for a command with i SG entries, use bucket b. */
9214 bucket_map[i] = b;
9215 }
9216 }
9217
9218 /*
9219 * return -ENODEV on err, 0 on success (or no action)
9220 * allocates numerous items that must be freed later
9221 */
9222 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
9223 {
9224 int i;
9225 unsigned long register_value;
9226 unsigned long transMethod = CFGTBL_Trans_Performant |
9227 (trans_support & CFGTBL_Trans_use_short_tags) |
9228 CFGTBL_Trans_enable_directed_msix |
9229 (trans_support & (CFGTBL_Trans_io_accel1 |
9230 CFGTBL_Trans_io_accel2));
9231 struct access_method access = SA5_performant_access;
9232
9233 /* This is a bit complicated. There are 8 registers on
9234 * the controller which we write to to tell it 8 different
9235 * sizes of commands which there may be. It's a way of
9236 * reducing the DMA done to fetch each command. Encoded into
9237 * each command's tag are 3 bits which communicate to the controller
9238 * which of the eight sizes that command fits within. The size of
9239 * each command depends on how many scatter gather entries there are.
9240 * Each SG entry requires 16 bytes. The eight registers are programmed
9241 * with the number of 16-byte blocks a command of that size requires.
9242 * The smallest command possible requires 5 such 16 byte blocks.
9243 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
9244 * blocks. Note, this only extends to the SG entries contained
9245 * within the command block, and does not extend to chained blocks
9246 * of SG elements. bft[] contains the eight values we write to
9247 * the registers. They are not evenly distributed, but have more
9248 * sizes for small commands, and fewer sizes for larger commands.
9249 */
9250 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
9251 #define MIN_IOACCEL2_BFT_ENTRY 5
9252 #define HPSA_IOACCEL2_HEADER_SZ 4
9253 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9254 13, 14, 15, 16, 17, 18, 19,
9255 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9256 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9257 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9258 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9259 16 * MIN_IOACCEL2_BFT_ENTRY);
9260 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
9261 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
9262 /* 5 = 1 s/g entry or 4k
9263 * 6 = 2 s/g entry or 8k
9264 * 8 = 4 s/g entry or 16k
9265 * 10 = 6 s/g entry or 24k
9266 */
9267
9268 /* If the controller supports either ioaccel method then
9269 * we can also use the RAID stack submit path that does not
9270 * perform the superfluous readl() after each command submission.
9271 */
9272 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9273 access = SA5_performant_access_no_read;
9274
9275 /* Controller spec: zero out this buffer. */
9276 for (i = 0; i < h->nreply_queues; i++)
9277 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
9278
9279 bft[7] = SG_ENTRIES_IN_CMD + 4;
9280 calc_bucket_map(bft, ARRAY_SIZE(bft),
9281 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
9282 for (i = 0; i < 8; i++)
9283 writel(bft[i], &h->transtable->BlockFetch[i]);
9284
9285 /* size of controller ring buffer */
9286 writel(h->max_commands, &h->transtable->RepQSize);
9287 writel(h->nreply_queues, &h->transtable->RepQCount);
9288 writel(0, &h->transtable->RepQCtrAddrLow32);
9289 writel(0, &h->transtable->RepQCtrAddrHigh32);
9290
9291 for (i = 0; i < h->nreply_queues; i++) {
9292 writel(0, &h->transtable->RepQAddr[i].upper);
9293 writel(h->reply_queue[i].busaddr,
9294 &h->transtable->RepQAddr[i].lower);
9295 }
9296
9297 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9298 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9299 /*
9300 * enable outbound interrupt coalescing in accelerator mode;
9301 */
9302 if (trans_support & CFGTBL_Trans_io_accel1) {
9303 access = SA5_ioaccel_mode1_access;
9304 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9305 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9306 } else {
9307 if (trans_support & CFGTBL_Trans_io_accel2) {
9308 access = SA5_ioaccel_mode2_access;
9309 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9310 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9311 }
9312 }
9313 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9314 if (hpsa_wait_for_mode_change_ack(h)) {
9315 dev_err(&h->pdev->dev,
9316 "performant mode problem - doorbell timeout\n");
9317 return -ENODEV;
9318 }
9319 register_value = readl(&(h->cfgtable->TransportActive));
9320 if (!(register_value & CFGTBL_Trans_Performant)) {
9321 dev_err(&h->pdev->dev,
9322 "performant mode problem - transport not active\n");
9323 return -ENODEV;
9324 }
9325 /* Change the access methods to the performant access methods */
9326 h->access = access;
9327 h->transMethod = transMethod;
9328
9329 if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9330 (trans_support & CFGTBL_Trans_io_accel2)))
9331 return 0;
9332
9333 if (trans_support & CFGTBL_Trans_io_accel1) {
9334 /* Set up I/O accelerator mode */
9335 for (i = 0; i < h->nreply_queues; i++) {
9336 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9337 h->reply_queue[i].current_entry =
9338 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9339 }
9340 bft[7] = h->ioaccel_maxsg + 8;
9341 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9342 h->ioaccel1_blockFetchTable);
9343
9344 /* initialize all reply queue entries to unused */
9345 for (i = 0; i < h->nreply_queues; i++)
9346 memset(h->reply_queue[i].head,
9347 (u8) IOACCEL_MODE1_REPLY_UNUSED,
9348 h->reply_queue_size);
9349
9350 /* set all the constant fields in the accelerator command
9351 * frames once at init time to save CPU cycles later.
9352 */
9353 for (i = 0; i < h->nr_cmds; i++) {
9354 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9355
9356 cp->function = IOACCEL1_FUNCTION_SCSIIO;
9357 cp->err_info = (u32) (h->errinfo_pool_dhandle +
9358 (i * sizeof(struct ErrorInfo)));
9359 cp->err_info_len = sizeof(struct ErrorInfo);
9360 cp->sgl_offset = IOACCEL1_SGLOFFSET;
9361 cp->host_context_flags =
9362 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9363 cp->timeout_sec = 0;
9364 cp->ReplyQueue = 0;
9365 cp->tag =
9366 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
9367 cp->host_addr =
9368 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9369 (i * sizeof(struct io_accel1_cmd)));
9370 }
9371 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9372 u64 cfg_offset, cfg_base_addr_index;
9373 u32 bft2_offset, cfg_base_addr;
9374 int rc;
9375
9376 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9377 &cfg_base_addr_index, &cfg_offset);
9378 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9379 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9380 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9381 4, h->ioaccel2_blockFetchTable);
9382 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9383 BUILD_BUG_ON(offsetof(struct CfgTable,
9384 io_accel_request_size_offset) != 0xb8);
9385 h->ioaccel2_bft2_regs =
9386 remap_pci_mem(pci_resource_start(h->pdev,
9387 cfg_base_addr_index) +
9388 cfg_offset + bft2_offset,
9389 ARRAY_SIZE(bft2) *
9390 sizeof(*h->ioaccel2_bft2_regs));
9391 for (i = 0; i < ARRAY_SIZE(bft2); i++)
9392 writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9393 }
9394 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9395 if (hpsa_wait_for_mode_change_ack(h)) {
9396 dev_err(&h->pdev->dev,
9397 "performant mode problem - enabling ioaccel mode\n");
9398 return -ENODEV;
9399 }
9400 return 0;
9401 }
9402
9403 /* Free ioaccel1 mode command blocks and block fetch table */
9404 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9405 {
9406 if (h->ioaccel_cmd_pool) {
9407 pci_free_consistent(h->pdev,
9408 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9409 h->ioaccel_cmd_pool,
9410 h->ioaccel_cmd_pool_dhandle);
9411 h->ioaccel_cmd_pool = NULL;
9412 h->ioaccel_cmd_pool_dhandle = 0;
9413 }
9414 kfree(h->ioaccel1_blockFetchTable);
9415 h->ioaccel1_blockFetchTable = NULL;
9416 }
9417
9418 /* Allocate ioaccel1 mode command blocks and block fetch table */
9419 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9420 {
9421 h->ioaccel_maxsg =
9422 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9423 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9424 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9425
9426 /* Command structures must be aligned on a 128-byte boundary
9427 * because the 7 lower bits of the address are used by the
9428 * hardware.
9429 */
9430 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9431 IOACCEL1_COMMANDLIST_ALIGNMENT);
9432 h->ioaccel_cmd_pool =
9433 pci_alloc_consistent(h->pdev,
9434 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9435 &(h->ioaccel_cmd_pool_dhandle));
9436
9437 h->ioaccel1_blockFetchTable =
9438 kmalloc(((h->ioaccel_maxsg + 1) *
9439 sizeof(u32)), GFP_KERNEL);
9440
9441 if ((h->ioaccel_cmd_pool == NULL) ||
9442 (h->ioaccel1_blockFetchTable == NULL))
9443 goto clean_up;
9444
9445 memset(h->ioaccel_cmd_pool, 0,
9446 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9447 return 0;
9448
9449 clean_up:
9450 hpsa_free_ioaccel1_cmd_and_bft(h);
9451 return -ENOMEM;
9452 }
9453
9454 /* Free ioaccel2 mode command blocks and block fetch table */
9455 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9456 {
9457 hpsa_free_ioaccel2_sg_chain_blocks(h);
9458
9459 if (h->ioaccel2_cmd_pool) {
9460 pci_free_consistent(h->pdev,
9461 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9462 h->ioaccel2_cmd_pool,
9463 h->ioaccel2_cmd_pool_dhandle);
9464 h->ioaccel2_cmd_pool = NULL;
9465 h->ioaccel2_cmd_pool_dhandle = 0;
9466 }
9467 kfree(h->ioaccel2_blockFetchTable);
9468 h->ioaccel2_blockFetchTable = NULL;
9469 }
9470
9471 /* Allocate ioaccel2 mode command blocks and block fetch table */
9472 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9473 {
9474 int rc;
9475
9476 /* Allocate ioaccel2 mode command blocks and block fetch table */
9477
9478 h->ioaccel_maxsg =
9479 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9480 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9481 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9482
9483 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9484 IOACCEL2_COMMANDLIST_ALIGNMENT);
9485 h->ioaccel2_cmd_pool =
9486 pci_alloc_consistent(h->pdev,
9487 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9488 &(h->ioaccel2_cmd_pool_dhandle));
9489
9490 h->ioaccel2_blockFetchTable =
9491 kmalloc(((h->ioaccel_maxsg + 1) *
9492 sizeof(u32)), GFP_KERNEL);
9493
9494 if ((h->ioaccel2_cmd_pool == NULL) ||
9495 (h->ioaccel2_blockFetchTable == NULL)) {
9496 rc = -ENOMEM;
9497 goto clean_up;
9498 }
9499
9500 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9501 if (rc)
9502 goto clean_up;
9503
9504 memset(h->ioaccel2_cmd_pool, 0,
9505 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9506 return 0;
9507
9508 clean_up:
9509 hpsa_free_ioaccel2_cmd_and_bft(h);
9510 return rc;
9511 }
9512
9513 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9514 static void hpsa_free_performant_mode(struct ctlr_info *h)
9515 {
9516 kfree(h->blockFetchTable);
9517 h->blockFetchTable = NULL;
9518 hpsa_free_reply_queues(h);
9519 hpsa_free_ioaccel1_cmd_and_bft(h);
9520 hpsa_free_ioaccel2_cmd_and_bft(h);
9521 }
9522
9523 /* return -ENODEV on error, 0 on success (or no action)
9524 * allocates numerous items that must be freed later
9525 */
9526 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
9527 {
9528 u32 trans_support;
9529 unsigned long transMethod = CFGTBL_Trans_Performant |
9530 CFGTBL_Trans_use_short_tags;
9531 int i, rc;
9532
9533 if (hpsa_simple_mode)
9534 return 0;
9535
9536 trans_support = readl(&(h->cfgtable->TransportSupport));
9537 if (!(trans_support & PERFORMANT_MODE))
9538 return 0;
9539
9540 /* Check for I/O accelerator mode support */
9541 if (trans_support & CFGTBL_Trans_io_accel1) {
9542 transMethod |= CFGTBL_Trans_io_accel1 |
9543 CFGTBL_Trans_enable_directed_msix;
9544 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9545 if (rc)
9546 return rc;
9547 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9548 transMethod |= CFGTBL_Trans_io_accel2 |
9549 CFGTBL_Trans_enable_directed_msix;
9550 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9551 if (rc)
9552 return rc;
9553 }
9554
9555 h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
9556 hpsa_get_max_perf_mode_cmds(h);
9557 /* Performant mode ring buffer and supporting data structures */
9558 h->reply_queue_size = h->max_commands * sizeof(u64);
9559
9560 for (i = 0; i < h->nreply_queues; i++) {
9561 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
9562 h->reply_queue_size,
9563 &(h->reply_queue[i].busaddr));
9564 if (!h->reply_queue[i].head) {
9565 rc = -ENOMEM;
9566 goto clean1; /* rq, ioaccel */
9567 }
9568 h->reply_queue[i].size = h->max_commands;
9569 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
9570 h->reply_queue[i].current_entry = 0;
9571 }
9572
9573 /* Need a block fetch table for performant mode */
9574 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
9575 sizeof(u32)), GFP_KERNEL);
9576 if (!h->blockFetchTable) {
9577 rc = -ENOMEM;
9578 goto clean1; /* rq, ioaccel */
9579 }
9580
9581 rc = hpsa_enter_performant_mode(h, trans_support);
9582 if (rc)
9583 goto clean2; /* bft, rq, ioaccel */
9584 return 0;
9585
9586 clean2: /* bft, rq, ioaccel */
9587 kfree(h->blockFetchTable);
9588 h->blockFetchTable = NULL;
9589 clean1: /* rq, ioaccel */
9590 hpsa_free_reply_queues(h);
9591 hpsa_free_ioaccel1_cmd_and_bft(h);
9592 hpsa_free_ioaccel2_cmd_and_bft(h);
9593 return rc;
9594 }
9595
9596 static int is_accelerated_cmd(struct CommandList *c)
9597 {
9598 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
9599 }
9600
9601 static void hpsa_drain_accel_commands(struct ctlr_info *h)
9602 {
9603 struct CommandList *c = NULL;
9604 int i, accel_cmds_out;
9605 int refcount;
9606
9607 do { /* wait for all outstanding ioaccel commands to drain out */
9608 accel_cmds_out = 0;
9609 for (i = 0; i < h->nr_cmds; i++) {
9610 c = h->cmd_pool + i;
9611 refcount = atomic_inc_return(&c->refcount);
9612 if (refcount > 1) /* Command is allocated */
9613 accel_cmds_out += is_accelerated_cmd(c);
9614 cmd_free(h, c);
9615 }
9616 if (accel_cmds_out <= 0)
9617 break;
9618 msleep(100);
9619 } while (1);
9620 }
9621
9622 static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9623 struct hpsa_sas_port *hpsa_sas_port)
9624 {
9625 struct hpsa_sas_phy *hpsa_sas_phy;
9626 struct sas_phy *phy;
9627
9628 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9629 if (!hpsa_sas_phy)
9630 return NULL;
9631
9632 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9633 hpsa_sas_port->next_phy_index);
9634 if (!phy) {
9635 kfree(hpsa_sas_phy);
9636 return NULL;
9637 }
9638
9639 hpsa_sas_port->next_phy_index++;
9640 hpsa_sas_phy->phy = phy;
9641 hpsa_sas_phy->parent_port = hpsa_sas_port;
9642
9643 return hpsa_sas_phy;
9644 }
9645
9646 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9647 {
9648 struct sas_phy *phy = hpsa_sas_phy->phy;
9649
9650 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9651 if (hpsa_sas_phy->added_to_port)
9652 list_del(&hpsa_sas_phy->phy_list_entry);
9653 sas_phy_delete(phy);
9654 kfree(hpsa_sas_phy);
9655 }
9656
9657 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9658 {
9659 int rc;
9660 struct hpsa_sas_port *hpsa_sas_port;
9661 struct sas_phy *phy;
9662 struct sas_identify *identify;
9663
9664 hpsa_sas_port = hpsa_sas_phy->parent_port;
9665 phy = hpsa_sas_phy->phy;
9666
9667 identify = &phy->identify;
9668 memset(identify, 0, sizeof(*identify));
9669 identify->sas_address = hpsa_sas_port->sas_address;
9670 identify->device_type = SAS_END_DEVICE;
9671 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9672 identify->target_port_protocols = SAS_PROTOCOL_STP;
9673 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9674 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9675 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9676 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9677 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9678
9679 rc = sas_phy_add(hpsa_sas_phy->phy);
9680 if (rc)
9681 return rc;
9682
9683 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9684 list_add_tail(&hpsa_sas_phy->phy_list_entry,
9685 &hpsa_sas_port->phy_list_head);
9686 hpsa_sas_phy->added_to_port = true;
9687
9688 return 0;
9689 }
9690
9691 static int
9692 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9693 struct sas_rphy *rphy)
9694 {
9695 struct sas_identify *identify;
9696
9697 identify = &rphy->identify;
9698 identify->sas_address = hpsa_sas_port->sas_address;
9699 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9700 identify->target_port_protocols = SAS_PROTOCOL_STP;
9701
9702 return sas_rphy_add(rphy);
9703 }
9704
9705 static struct hpsa_sas_port
9706 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9707 u64 sas_address)
9708 {
9709 int rc;
9710 struct hpsa_sas_port *hpsa_sas_port;
9711 struct sas_port *port;
9712
9713 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9714 if (!hpsa_sas_port)
9715 return NULL;
9716
9717 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9718 hpsa_sas_port->parent_node = hpsa_sas_node;
9719
9720 port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9721 if (!port)
9722 goto free_hpsa_port;
9723
9724 rc = sas_port_add(port);
9725 if (rc)
9726 goto free_sas_port;
9727
9728 hpsa_sas_port->port = port;
9729 hpsa_sas_port->sas_address = sas_address;
9730 list_add_tail(&hpsa_sas_port->port_list_entry,
9731 &hpsa_sas_node->port_list_head);
9732
9733 return hpsa_sas_port;
9734
9735 free_sas_port:
9736 sas_port_free(port);
9737 free_hpsa_port:
9738 kfree(hpsa_sas_port);
9739
9740 return NULL;
9741 }
9742
9743 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9744 {
9745 struct hpsa_sas_phy *hpsa_sas_phy;
9746 struct hpsa_sas_phy *next;
9747
9748 list_for_each_entry_safe(hpsa_sas_phy, next,
9749 &hpsa_sas_port->phy_list_head, phy_list_entry)
9750 hpsa_free_sas_phy(hpsa_sas_phy);
9751
9752 sas_port_delete(hpsa_sas_port->port);
9753 list_del(&hpsa_sas_port->port_list_entry);
9754 kfree(hpsa_sas_port);
9755 }
9756
9757 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9758 {
9759 struct hpsa_sas_node *hpsa_sas_node;
9760
9761 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9762 if (hpsa_sas_node) {
9763 hpsa_sas_node->parent_dev = parent_dev;
9764 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9765 }
9766
9767 return hpsa_sas_node;
9768 }
9769
9770 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9771 {
9772 struct hpsa_sas_port *hpsa_sas_port;
9773 struct hpsa_sas_port *next;
9774
9775 if (!hpsa_sas_node)
9776 return;
9777
9778 list_for_each_entry_safe(hpsa_sas_port, next,
9779 &hpsa_sas_node->port_list_head, port_list_entry)
9780 hpsa_free_sas_port(hpsa_sas_port);
9781
9782 kfree(hpsa_sas_node);
9783 }
9784
9785 static struct hpsa_scsi_dev_t
9786 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9787 struct sas_rphy *rphy)
9788 {
9789 int i;
9790 struct hpsa_scsi_dev_t *device;
9791
9792 for (i = 0; i < h->ndevices; i++) {
9793 device = h->dev[i];
9794 if (!device->sas_port)
9795 continue;
9796 if (device->sas_port->rphy == rphy)
9797 return device;
9798 }
9799
9800 return NULL;
9801 }
9802
9803 static int hpsa_add_sas_host(struct ctlr_info *h)
9804 {
9805 int rc;
9806 struct device *parent_dev;
9807 struct hpsa_sas_node *hpsa_sas_node;
9808 struct hpsa_sas_port *hpsa_sas_port;
9809 struct hpsa_sas_phy *hpsa_sas_phy;
9810
9811 parent_dev = &h->scsi_host->shost_gendev;
9812
9813 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9814 if (!hpsa_sas_node)
9815 return -ENOMEM;
9816
9817 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9818 if (!hpsa_sas_port) {
9819 rc = -ENODEV;
9820 goto free_sas_node;
9821 }
9822
9823 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9824 if (!hpsa_sas_phy) {
9825 rc = -ENODEV;
9826 goto free_sas_port;
9827 }
9828
9829 rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9830 if (rc)
9831 goto free_sas_phy;
9832
9833 h->sas_host = hpsa_sas_node;
9834
9835 return 0;
9836
9837 free_sas_phy:
9838 hpsa_free_sas_phy(hpsa_sas_phy);
9839 free_sas_port:
9840 hpsa_free_sas_port(hpsa_sas_port);
9841 free_sas_node:
9842 hpsa_free_sas_node(hpsa_sas_node);
9843
9844 return rc;
9845 }
9846
9847 static void hpsa_delete_sas_host(struct ctlr_info *h)
9848 {
9849 hpsa_free_sas_node(h->sas_host);
9850 }
9851
9852 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9853 struct hpsa_scsi_dev_t *device)
9854 {
9855 int rc;
9856 struct hpsa_sas_port *hpsa_sas_port;
9857 struct sas_rphy *rphy;
9858
9859 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9860 if (!hpsa_sas_port)
9861 return -ENOMEM;
9862
9863 rphy = sas_end_device_alloc(hpsa_sas_port->port);
9864 if (!rphy) {
9865 rc = -ENODEV;
9866 goto free_sas_port;
9867 }
9868
9869 hpsa_sas_port->rphy = rphy;
9870 device->sas_port = hpsa_sas_port;
9871
9872 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9873 if (rc)
9874 goto free_sas_port;
9875
9876 return 0;
9877
9878 free_sas_port:
9879 hpsa_free_sas_port(hpsa_sas_port);
9880 device->sas_port = NULL;
9881
9882 return rc;
9883 }
9884
9885 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9886 {
9887 if (device->sas_port) {
9888 hpsa_free_sas_port(device->sas_port);
9889 device->sas_port = NULL;
9890 }
9891 }
9892
9893 static int
9894 hpsa_sas_get_linkerrors(struct sas_phy *phy)
9895 {
9896 return 0;
9897 }
9898
9899 static int
9900 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9901 {
9902 *identifier = 0;
9903 return 0;
9904 }
9905
9906 static int
9907 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9908 {
9909 return -ENXIO;
9910 }
9911
9912 static int
9913 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9914 {
9915 return 0;
9916 }
9917
9918 static int
9919 hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9920 {
9921 return 0;
9922 }
9923
9924 static int
9925 hpsa_sas_phy_setup(struct sas_phy *phy)
9926 {
9927 return 0;
9928 }
9929
9930 static void
9931 hpsa_sas_phy_release(struct sas_phy *phy)
9932 {
9933 }
9934
9935 static int
9936 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9937 {
9938 return -EINVAL;
9939 }
9940
9941 /* SMP = Serial Management Protocol */
9942 static int
9943 hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,
9944 struct request *req)
9945 {
9946 return -EINVAL;
9947 }
9948
9949 static struct sas_function_template hpsa_sas_transport_functions = {
9950 .get_linkerrors = hpsa_sas_get_linkerrors,
9951 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9952 .get_bay_identifier = hpsa_sas_get_bay_identifier,
9953 .phy_reset = hpsa_sas_phy_reset,
9954 .phy_enable = hpsa_sas_phy_enable,
9955 .phy_setup = hpsa_sas_phy_setup,
9956 .phy_release = hpsa_sas_phy_release,
9957 .set_phy_speed = hpsa_sas_phy_speed,
9958 .smp_handler = hpsa_sas_smp_handler,
9959 };
9960
9961 /*
9962 * This is it. Register the PCI driver information for the cards we control
9963 * the OS will call our registered routines when it finds one of our cards.
9964 */
9965 static int __init hpsa_init(void)
9966 {
9967 int rc;
9968
9969 hpsa_sas_transport_template =
9970 sas_attach_transport(&hpsa_sas_transport_functions);
9971 if (!hpsa_sas_transport_template)
9972 return -ENODEV;
9973
9974 rc = pci_register_driver(&hpsa_pci_driver);
9975
9976 if (rc)
9977 sas_release_transport(hpsa_sas_transport_template);
9978
9979 return rc;
9980 }
9981
9982 static void __exit hpsa_cleanup(void)
9983 {
9984 pci_unregister_driver(&hpsa_pci_driver);
9985 sas_release_transport(hpsa_sas_transport_template);
9986 }
9987
9988 static void __attribute__((unused)) verify_offsets(void)
9989 {
9990 #define VERIFY_OFFSET(member, offset) \
9991 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9992
9993 VERIFY_OFFSET(structure_size, 0);
9994 VERIFY_OFFSET(volume_blk_size, 4);
9995 VERIFY_OFFSET(volume_blk_cnt, 8);
9996 VERIFY_OFFSET(phys_blk_shift, 16);
9997 VERIFY_OFFSET(parity_rotation_shift, 17);
9998 VERIFY_OFFSET(strip_size, 18);
9999 VERIFY_OFFSET(disk_starting_blk, 20);
10000 VERIFY_OFFSET(disk_blk_cnt, 28);
10001 VERIFY_OFFSET(data_disks_per_row, 36);
10002 VERIFY_OFFSET(metadata_disks_per_row, 38);
10003 VERIFY_OFFSET(row_cnt, 40);
10004 VERIFY_OFFSET(layout_map_count, 42);
10005 VERIFY_OFFSET(flags, 44);
10006 VERIFY_OFFSET(dekindex, 46);
10007 /* VERIFY_OFFSET(reserved, 48 */
10008 VERIFY_OFFSET(data, 64);
10009
10010 #undef VERIFY_OFFSET
10011
10012 #define VERIFY_OFFSET(member, offset) \
10013 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
10014
10015 VERIFY_OFFSET(IU_type, 0);
10016 VERIFY_OFFSET(direction, 1);
10017 VERIFY_OFFSET(reply_queue, 2);
10018 /* VERIFY_OFFSET(reserved1, 3); */
10019 VERIFY_OFFSET(scsi_nexus, 4);
10020 VERIFY_OFFSET(Tag, 8);
10021 VERIFY_OFFSET(cdb, 16);
10022 VERIFY_OFFSET(cciss_lun, 32);
10023 VERIFY_OFFSET(data_len, 40);
10024 VERIFY_OFFSET(cmd_priority_task_attr, 44);
10025 VERIFY_OFFSET(sg_count, 45);
10026 /* VERIFY_OFFSET(reserved3 */
10027 VERIFY_OFFSET(err_ptr, 48);
10028 VERIFY_OFFSET(err_len, 56);
10029 /* VERIFY_OFFSET(reserved4 */
10030 VERIFY_OFFSET(sg, 64);
10031
10032 #undef VERIFY_OFFSET
10033
10034 #define VERIFY_OFFSET(member, offset) \
10035 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
10036
10037 VERIFY_OFFSET(dev_handle, 0x00);
10038 VERIFY_OFFSET(reserved1, 0x02);
10039 VERIFY_OFFSET(function, 0x03);
10040 VERIFY_OFFSET(reserved2, 0x04);
10041 VERIFY_OFFSET(err_info, 0x0C);
10042 VERIFY_OFFSET(reserved3, 0x10);
10043 VERIFY_OFFSET(err_info_len, 0x12);
10044 VERIFY_OFFSET(reserved4, 0x13);
10045 VERIFY_OFFSET(sgl_offset, 0x14);
10046 VERIFY_OFFSET(reserved5, 0x15);
10047 VERIFY_OFFSET(transfer_len, 0x1C);
10048 VERIFY_OFFSET(reserved6, 0x20);
10049 VERIFY_OFFSET(io_flags, 0x24);
10050 VERIFY_OFFSET(reserved7, 0x26);
10051 VERIFY_OFFSET(LUN, 0x34);
10052 VERIFY_OFFSET(control, 0x3C);
10053 VERIFY_OFFSET(CDB, 0x40);
10054 VERIFY_OFFSET(reserved8, 0x50);
10055 VERIFY_OFFSET(host_context_flags, 0x60);
10056 VERIFY_OFFSET(timeout_sec, 0x62);
10057 VERIFY_OFFSET(ReplyQueue, 0x64);
10058 VERIFY_OFFSET(reserved9, 0x65);
10059 VERIFY_OFFSET(tag, 0x68);
10060 VERIFY_OFFSET(host_addr, 0x70);
10061 VERIFY_OFFSET(CISS_LUN, 0x78);
10062 VERIFY_OFFSET(SG, 0x78 + 8);
10063 #undef VERIFY_OFFSET
10064 }
10065
10066 module_init(hpsa_init);
10067 module_exit(hpsa_cleanup);
Linux with added FPC-III support