arch/mips/loongson2ef/common/pci.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
   4  * Author: Fuxin Zhang, zhangfx@lemote.com
   5  */
   6 #include <linux/pci.h>
   7
   8 #include <pci.h>
   9 #include <loongson.h>
  10
  11 static struct resource loongson_pci_mem_resource = {
  12         .name   = "pci memory space",
  13         .start  = LOONGSON_PCI_MEM_START,
  14         .end    = LOONGSON_PCI_MEM_END,
  15         .flags  = IORESOURCE_MEM,
  16 };
  17
  18 static struct resource loongson_pci_io_resource = {
  19         .name   = "pci io space",
  20         .start  = LOONGSON_PCI_IO_START,
  21         .end    = IO_SPACE_LIMIT,
  22         .flags  = IORESOURCE_IO,
  23 };
  24
  25 static struct pci_controller  loongson_pci_controller = {
  26         .pci_ops        = &loongson_pci_ops,
  27         .io_resource    = &loongson_pci_io_resource,
  28         .mem_resource   = &loongson_pci_mem_resource,
  29         .mem_offset     = 0x00000000UL,
  30         .io_offset      = 0x00000000UL,
  31 };
  32
  33 static void __init setup_pcimap(void)
  34 {
  35         /*
  36          * local to PCI mapping for CPU accessing PCI space
  37          * CPU address space [256M,448M] is window for accessing pci space
  38          * we set pcimap_lo[0,1,2] to map it to pci space[0M,64M], [320M,448M]
  39          *
  40          * pcimap: PCI_MAP2  PCI_Mem_Lo2 PCI_Mem_Lo1 PCI_Mem_Lo0
  41          *           [<2G]   [384M,448M] [320M,384M] [0M,64M]
  42          */
  43         LOONGSON_PCIMAP = LOONGSON_PCIMAP_PCIMAP_2 |
  44                 LOONGSON_PCIMAP_WIN(2, LOONGSON_PCILO2_BASE) |
  45                 LOONGSON_PCIMAP_WIN(1, LOONGSON_PCILO1_BASE) |
  46                 LOONGSON_PCIMAP_WIN(0, 0);
  47
  48         /*
  49          * PCI-DMA to local mapping: [2G,2G+256M] -> [0M,256M]
  50          */
  51         LOONGSON_PCIBASE0 = 0x80000000ul;   /* base: 2G -> mmap: 0M */
  52         /* size: 256M, burst transmission, pre-fetch enable, 64bit */
  53         LOONGSON_PCI_HIT0_SEL_L = 0xc000000cul;
  54         LOONGSON_PCI_HIT0_SEL_H = 0xfffffffful;
  55         LOONGSON_PCI_HIT1_SEL_L = 0x00000006ul; /* set this BAR as invalid */
  56         LOONGSON_PCI_HIT1_SEL_H = 0x00000000ul;
  57         LOONGSON_PCI_HIT2_SEL_L = 0x00000006ul; /* set this BAR as invalid */
  58         LOONGSON_PCI_HIT2_SEL_H = 0x00000000ul;
  59
  60         /* avoid deadlock of PCI reading/writing lock operation */
  61         LOONGSON_PCI_ISR4C = 0xd2000001ul;
  62
  63         /* can not change gnt to break pci transfer when device's gnt not
  64         deassert for some broken device */
  65         LOONGSON_PXARB_CFG = 0x00fe0105ul;
  66
  67 #ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG
  68         /*
  69          * set cpu addr window2 to map CPU address space to PCI address space
  70          */
  71         LOONGSON_ADDRWIN_CPUTOPCI(ADDRWIN_WIN2, LOONGSON_CPU_MEM_SRC,
  72                 LOONGSON_PCI_MEM_DST, MMAP_CPUTOPCI_SIZE);
  73 #endif
  74 }
  75
  76 extern int sbx00_acpi_init(void);
  77
  78 static int __init pcibios_init(void)
  79 {
  80         setup_pcimap();
  81
  82         loongson_pci_controller.io_map_base = mips_io_port_base;
  83         register_pci_controller(&loongson_pci_controller);
  84
  85
  86         return 0;
  87 }
  88
  89 arch_initcall(pcibios_init);