vt: vt_ioctl: fix VT_DISALLOCATE freeing in-use virtual console
[linux/fpc-iii.git] / drivers / gpu / drm / i915 / intel_atomic.c
blobb04952bacf77c01896ffdd910eed3d692e538d10
1 /*
2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 /**
25 * DOC: atomic modeset support
27 * The functions here implement the state management and hardware programming
28 * dispatch required by the atomic modeset infrastructure.
29 * See intel_atomic_plane.c for the plane-specific atomic functionality.
32 #include <drm/drmP.h>
33 #include <drm/drm_atomic.h>
34 #include <drm/drm_atomic_helper.h>
35 #include <drm/drm_plane_helper.h>
36 #include "intel_drv.h"
38 /**
39 * intel_digital_connector_atomic_get_property - hook for connector->atomic_get_property.
40 * @connector: Connector to get the property for.
41 * @state: Connector state to retrieve the property from.
42 * @property: Property to retrieve.
43 * @val: Return value for the property.
45 * Returns the atomic property value for a digital connector.
47 int intel_digital_connector_atomic_get_property(struct drm_connector *connector,
48 const struct drm_connector_state *state,
49 struct drm_property *property,
50 uint64_t *val)
52 struct drm_device *dev = connector->dev;
53 struct drm_i915_private *dev_priv = to_i915(dev);
54 struct intel_digital_connector_state *intel_conn_state =
55 to_intel_digital_connector_state(state);
57 if (property == dev_priv->force_audio_property)
58 *val = intel_conn_state->force_audio;
59 else if (property == dev_priv->broadcast_rgb_property)
60 *val = intel_conn_state->broadcast_rgb;
61 else {
62 DRM_DEBUG_ATOMIC("Unknown property [PROP:%d:%s]\n",
63 property->base.id, property->name);
64 return -EINVAL;
67 return 0;
70 /**
71 * intel_digital_connector_atomic_set_property - hook for connector->atomic_set_property.
72 * @connector: Connector to set the property for.
73 * @state: Connector state to set the property on.
74 * @property: Property to set.
75 * @val: New value for the property.
77 * Sets the atomic property value for a digital connector.
79 int intel_digital_connector_atomic_set_property(struct drm_connector *connector,
80 struct drm_connector_state *state,
81 struct drm_property *property,
82 uint64_t val)
84 struct drm_device *dev = connector->dev;
85 struct drm_i915_private *dev_priv = to_i915(dev);
86 struct intel_digital_connector_state *intel_conn_state =
87 to_intel_digital_connector_state(state);
89 if (property == dev_priv->force_audio_property) {
90 intel_conn_state->force_audio = val;
91 return 0;
94 if (property == dev_priv->broadcast_rgb_property) {
95 intel_conn_state->broadcast_rgb = val;
96 return 0;
99 DRM_DEBUG_ATOMIC("Unknown property [PROP:%d:%s]\n",
100 property->base.id, property->name);
101 return -EINVAL;
104 int intel_digital_connector_atomic_check(struct drm_connector *conn,
105 struct drm_connector_state *new_state)
107 struct intel_digital_connector_state *new_conn_state =
108 to_intel_digital_connector_state(new_state);
109 struct drm_connector_state *old_state =
110 drm_atomic_get_old_connector_state(new_state->state, conn);
111 struct intel_digital_connector_state *old_conn_state =
112 to_intel_digital_connector_state(old_state);
113 struct drm_crtc_state *crtc_state;
115 intel_hdcp_atomic_check(conn, old_state, new_state);
117 if (!new_state->crtc)
118 return 0;
120 crtc_state = drm_atomic_get_new_crtc_state(new_state->state, new_state->crtc);
123 * These properties are handled by fastset, and might not end
124 * up in a modeset.
126 if (new_conn_state->force_audio != old_conn_state->force_audio ||
127 new_conn_state->broadcast_rgb != old_conn_state->broadcast_rgb ||
128 new_conn_state->base.picture_aspect_ratio != old_conn_state->base.picture_aspect_ratio ||
129 new_conn_state->base.content_type != old_conn_state->base.content_type ||
130 new_conn_state->base.scaling_mode != old_conn_state->base.scaling_mode)
131 crtc_state->mode_changed = true;
133 return 0;
137 * intel_digital_connector_duplicate_state - duplicate connector state
138 * @connector: digital connector
140 * Allocates and returns a copy of the connector state (both common and
141 * digital connector specific) for the specified connector.
143 * Returns: The newly allocated connector state, or NULL on failure.
145 struct drm_connector_state *
146 intel_digital_connector_duplicate_state(struct drm_connector *connector)
148 struct intel_digital_connector_state *state;
150 state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
151 if (!state)
152 return NULL;
154 __drm_atomic_helper_connector_duplicate_state(connector, &state->base);
155 return &state->base;
159 * intel_crtc_duplicate_state - duplicate crtc state
160 * @crtc: drm crtc
162 * Allocates and returns a copy of the crtc state (both common and
163 * Intel-specific) for the specified crtc.
165 * Returns: The newly allocated crtc state, or NULL on failure.
167 struct drm_crtc_state *
168 intel_crtc_duplicate_state(struct drm_crtc *crtc)
170 struct intel_crtc_state *crtc_state;
172 crtc_state = kmemdup(crtc->state, sizeof(*crtc_state), GFP_KERNEL);
173 if (!crtc_state)
174 return NULL;
176 __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->base);
178 crtc_state->update_pipe = false;
179 crtc_state->disable_lp_wm = false;
180 crtc_state->disable_cxsr = false;
181 crtc_state->update_wm_pre = false;
182 crtc_state->update_wm_post = false;
183 crtc_state->fb_changed = false;
184 crtc_state->fifo_changed = false;
185 crtc_state->wm.need_postvbl_update = false;
186 crtc_state->fb_bits = 0;
188 return &crtc_state->base;
192 * intel_crtc_destroy_state - destroy crtc state
193 * @crtc: drm crtc
194 * @state: the state to destroy
196 * Destroys the crtc state (both common and Intel-specific) for the
197 * specified crtc.
199 void
200 intel_crtc_destroy_state(struct drm_crtc *crtc,
201 struct drm_crtc_state *state)
203 drm_atomic_helper_crtc_destroy_state(crtc, state);
207 * intel_atomic_setup_scalers() - setup scalers for crtc per staged requests
208 * @dev_priv: i915 device
209 * @intel_crtc: intel crtc
210 * @crtc_state: incoming crtc_state to validate and setup scalers
212 * This function sets up scalers based on staged scaling requests for
213 * a @crtc and its planes. It is called from crtc level check path. If request
214 * is a supportable request, it attaches scalers to requested planes and crtc.
216 * This function takes into account the current scaler(s) in use by any planes
217 * not being part of this atomic state
219 * Returns:
220 * 0 - scalers were setup succesfully
221 * error code - otherwise
223 int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
224 struct intel_crtc *intel_crtc,
225 struct intel_crtc_state *crtc_state)
227 struct drm_plane *plane = NULL;
228 struct intel_plane *intel_plane;
229 struct intel_plane_state *plane_state = NULL;
230 struct intel_crtc_scaler_state *scaler_state =
231 &crtc_state->scaler_state;
232 struct drm_atomic_state *drm_state = crtc_state->base.state;
233 struct intel_atomic_state *intel_state = to_intel_atomic_state(drm_state);
234 int num_scalers_need;
235 int i, j;
237 num_scalers_need = hweight32(scaler_state->scaler_users);
240 * High level flow:
241 * - staged scaler requests are already in scaler_state->scaler_users
242 * - check whether staged scaling requests can be supported
243 * - add planes using scalers that aren't in current transaction
244 * - assign scalers to requested users
245 * - as part of plane commit, scalers will be committed
246 * (i.e., either attached or detached) to respective planes in hw
247 * - as part of crtc_commit, scaler will be either attached or detached
248 * to crtc in hw
251 /* fail if required scalers > available scalers */
252 if (num_scalers_need > intel_crtc->num_scalers){
253 DRM_DEBUG_KMS("Too many scaling requests %d > %d\n",
254 num_scalers_need, intel_crtc->num_scalers);
255 return -EINVAL;
258 /* walkthrough scaler_users bits and start assigning scalers */
259 for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) {
260 int *scaler_id;
261 const char *name;
262 int idx;
264 /* skip if scaler not required */
265 if (!(scaler_state->scaler_users & (1 << i)))
266 continue;
268 if (i == SKL_CRTC_INDEX) {
269 name = "CRTC";
270 idx = intel_crtc->base.base.id;
272 /* panel fitter case: assign as a crtc scaler */
273 scaler_id = &scaler_state->scaler_id;
274 } else {
275 name = "PLANE";
277 /* plane scaler case: assign as a plane scaler */
278 /* find the plane that set the bit as scaler_user */
279 plane = drm_state->planes[i].ptr;
282 * to enable/disable hq mode, add planes that are using scaler
283 * into this transaction
285 if (!plane) {
286 struct drm_plane_state *state;
287 plane = drm_plane_from_index(&dev_priv->drm, i);
288 state = drm_atomic_get_plane_state(drm_state, plane);
289 if (IS_ERR(state)) {
290 DRM_DEBUG_KMS("Failed to add [PLANE:%d] to drm_state\n",
291 plane->base.id);
292 return PTR_ERR(state);
296 * the plane is added after plane checks are run,
297 * but since this plane is unchanged just do the
298 * minimum required validation.
300 crtc_state->base.planes_changed = true;
303 intel_plane = to_intel_plane(plane);
304 idx = plane->base.id;
306 /* plane on different crtc cannot be a scaler user of this crtc */
307 if (WARN_ON(intel_plane->pipe != intel_crtc->pipe)) {
308 continue;
311 plane_state = intel_atomic_get_new_plane_state(intel_state,
312 intel_plane);
313 scaler_id = &plane_state->scaler_id;
316 if (*scaler_id < 0) {
317 /* find a free scaler */
318 for (j = 0; j < intel_crtc->num_scalers; j++) {
319 if (!scaler_state->scalers[j].in_use) {
320 scaler_state->scalers[j].in_use = 1;
321 *scaler_id = j;
322 DRM_DEBUG_KMS("Attached scaler id %u.%u to %s:%d\n",
323 intel_crtc->pipe, *scaler_id, name, idx);
324 break;
329 if (WARN_ON(*scaler_id < 0)) {
330 DRM_DEBUG_KMS("Cannot find scaler for %s:%d\n", name, idx);
331 continue;
334 /* set scaler mode */
335 if ((INTEL_GEN(dev_priv) >= 9) &&
336 plane_state && plane_state->base.fb &&
337 plane_state->base.fb->format->format ==
338 DRM_FORMAT_NV12) {
339 if (INTEL_GEN(dev_priv) == 9 &&
340 !IS_GEMINILAKE(dev_priv) &&
341 !IS_SKYLAKE(dev_priv))
342 scaler_state->scalers[*scaler_id].mode =
343 SKL_PS_SCALER_MODE_NV12;
344 else
345 scaler_state->scalers[*scaler_id].mode =
346 PS_SCALER_MODE_PLANAR;
347 } else if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) {
349 * when only 1 scaler is in use on either pipe A or B,
350 * scaler 0 operates in high quality (HQ) mode.
351 * In this case use scaler 0 to take advantage of HQ mode
353 *scaler_id = 0;
354 scaler_state->scalers[0].in_use = 1;
355 scaler_state->scalers[0].mode = PS_SCALER_MODE_HQ;
356 scaler_state->scalers[1].in_use = 0;
357 } else {
358 scaler_state->scalers[*scaler_id].mode = PS_SCALER_MODE_DYN;
362 return 0;
365 struct drm_atomic_state *
366 intel_atomic_state_alloc(struct drm_device *dev)
368 struct intel_atomic_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
370 if (!state || drm_atomic_state_init(dev, &state->base) < 0) {
371 kfree(state);
372 return NULL;
375 return &state->base;
378 void intel_atomic_state_clear(struct drm_atomic_state *s)
380 struct intel_atomic_state *state = to_intel_atomic_state(s);
381 drm_atomic_state_default_clear(&state->base);
382 state->dpll_set = state->modeset = false;