vt: vt_ioctl: fix VT_DISALLOCATE freeing in-use virtual console
[linux/fpc-iii.git] / drivers / i2c / busses / i2c-bcm2835.c
blob4d19254f78c8a233920da9e25e0c64355bfc1d4f
1 /*
2 * BCM2835 master mode driver
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/clk.h>
15 #include <linux/completion.h>
16 #include <linux/err.h>
17 #include <linux/i2c.h>
18 #include <linux/interrupt.h>
19 #include <linux/io.h>
20 #include <linux/module.h>
21 #include <linux/platform_device.h>
22 #include <linux/slab.h>
24 #define BCM2835_I2C_C 0x0
25 #define BCM2835_I2C_S 0x4
26 #define BCM2835_I2C_DLEN 0x8
27 #define BCM2835_I2C_A 0xc
28 #define BCM2835_I2C_FIFO 0x10
29 #define BCM2835_I2C_DIV 0x14
30 #define BCM2835_I2C_DEL 0x18
31 #define BCM2835_I2C_CLKT 0x1c
33 #define BCM2835_I2C_C_READ BIT(0)
34 #define BCM2835_I2C_C_CLEAR BIT(4) /* bits 4 and 5 both clear */
35 #define BCM2835_I2C_C_ST BIT(7)
36 #define BCM2835_I2C_C_INTD BIT(8)
37 #define BCM2835_I2C_C_INTT BIT(9)
38 #define BCM2835_I2C_C_INTR BIT(10)
39 #define BCM2835_I2C_C_I2CEN BIT(15)
41 #define BCM2835_I2C_S_TA BIT(0)
42 #define BCM2835_I2C_S_DONE BIT(1)
43 #define BCM2835_I2C_S_TXW BIT(2)
44 #define BCM2835_I2C_S_RXR BIT(3)
45 #define BCM2835_I2C_S_TXD BIT(4)
46 #define BCM2835_I2C_S_RXD BIT(5)
47 #define BCM2835_I2C_S_TXE BIT(6)
48 #define BCM2835_I2C_S_RXF BIT(7)
49 #define BCM2835_I2C_S_ERR BIT(8)
50 #define BCM2835_I2C_S_CLKT BIT(9)
51 #define BCM2835_I2C_S_LEN BIT(10) /* Fake bit for SW error reporting */
53 #define BCM2835_I2C_FEDL_SHIFT 16
54 #define BCM2835_I2C_REDL_SHIFT 0
56 #define BCM2835_I2C_CDIV_MIN 0x0002
57 #define BCM2835_I2C_CDIV_MAX 0xFFFE
59 struct bcm2835_i2c_dev {
60 struct device *dev;
61 void __iomem *regs;
62 struct clk *clk;
63 int irq;
64 u32 bus_clk_rate;
65 struct i2c_adapter adapter;
66 struct completion completion;
67 struct i2c_msg *curr_msg;
68 int num_msgs;
69 u32 msg_err;
70 u8 *msg_buf;
71 size_t msg_buf_remaining;
74 static inline void bcm2835_i2c_writel(struct bcm2835_i2c_dev *i2c_dev,
75 u32 reg, u32 val)
77 writel(val, i2c_dev->regs + reg);
80 static inline u32 bcm2835_i2c_readl(struct bcm2835_i2c_dev *i2c_dev, u32 reg)
82 return readl(i2c_dev->regs + reg);
85 static int bcm2835_i2c_set_divider(struct bcm2835_i2c_dev *i2c_dev)
87 u32 divider, redl, fedl;
89 divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk),
90 i2c_dev->bus_clk_rate);
92 * Per the datasheet, the register is always interpreted as an even
93 * number, by rounding down. In other words, the LSB is ignored. So,
94 * if the LSB is set, increment the divider to avoid any issue.
96 if (divider & 1)
97 divider++;
98 if ((divider < BCM2835_I2C_CDIV_MIN) ||
99 (divider > BCM2835_I2C_CDIV_MAX)) {
100 dev_err_ratelimited(i2c_dev->dev, "Invalid clock-frequency\n");
101 return -EINVAL;
104 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DIV, divider);
107 * Number of core clocks to wait after falling edge before
108 * outputting the next data bit. Note that both FEDL and REDL
109 * can't be greater than CDIV/2.
111 fedl = max(divider / 16, 1u);
114 * Number of core clocks to wait after rising edge before
115 * sampling the next incoming data bit.
117 redl = max(divider / 4, 1u);
119 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DEL,
120 (fedl << BCM2835_I2C_FEDL_SHIFT) |
121 (redl << BCM2835_I2C_REDL_SHIFT));
122 return 0;
125 static void bcm2835_fill_txfifo(struct bcm2835_i2c_dev *i2c_dev)
127 u32 val;
129 while (i2c_dev->msg_buf_remaining) {
130 val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
131 if (!(val & BCM2835_I2C_S_TXD))
132 break;
133 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_FIFO,
134 *i2c_dev->msg_buf);
135 i2c_dev->msg_buf++;
136 i2c_dev->msg_buf_remaining--;
140 static void bcm2835_drain_rxfifo(struct bcm2835_i2c_dev *i2c_dev)
142 u32 val;
144 while (i2c_dev->msg_buf_remaining) {
145 val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
146 if (!(val & BCM2835_I2C_S_RXD))
147 break;
148 *i2c_dev->msg_buf = bcm2835_i2c_readl(i2c_dev,
149 BCM2835_I2C_FIFO);
150 i2c_dev->msg_buf++;
151 i2c_dev->msg_buf_remaining--;
156 * Repeated Start Condition (Sr)
157 * The BCM2835 ARM Peripherals datasheet mentions a way to trigger a Sr when it
158 * talks about reading from a slave with 10 bit address. This is achieved by
159 * issuing a write, poll the I2CS.TA flag and wait for it to be set, and then
160 * issue a read.
161 * A comment in https://github.com/raspberrypi/linux/issues/254 shows how the
162 * firmware actually does it using polling and says that it's a workaround for
163 * a problem in the state machine.
164 * It turns out that it is possible to use the TXW interrupt to know when the
165 * transfer is active, provided the FIFO has not been prefilled.
168 static void bcm2835_i2c_start_transfer(struct bcm2835_i2c_dev *i2c_dev)
170 u32 c = BCM2835_I2C_C_ST | BCM2835_I2C_C_I2CEN;
171 struct i2c_msg *msg = i2c_dev->curr_msg;
172 bool last_msg = (i2c_dev->num_msgs == 1);
174 if (!i2c_dev->num_msgs)
175 return;
177 i2c_dev->num_msgs--;
178 i2c_dev->msg_buf = msg->buf;
179 i2c_dev->msg_buf_remaining = msg->len;
181 if (msg->flags & I2C_M_RD)
182 c |= BCM2835_I2C_C_READ | BCM2835_I2C_C_INTR;
183 else
184 c |= BCM2835_I2C_C_INTT;
186 if (last_msg)
187 c |= BCM2835_I2C_C_INTD;
189 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_A, msg->addr);
190 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DLEN, msg->len);
191 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, c);
194 static void bcm2835_i2c_finish_transfer(struct bcm2835_i2c_dev *i2c_dev)
196 i2c_dev->curr_msg = NULL;
197 i2c_dev->num_msgs = 0;
199 i2c_dev->msg_buf = NULL;
200 i2c_dev->msg_buf_remaining = 0;
204 * Note about I2C_C_CLEAR on error:
205 * The I2C_C_CLEAR on errors will take some time to resolve -- if you were in
206 * non-idle state and I2C_C_READ, it sets an abort_rx flag and runs through
207 * the state machine to send a NACK and a STOP. Since we're setting CLEAR
208 * without I2CEN, that NACK will be hanging around queued up for next time
209 * we start the engine.
212 static irqreturn_t bcm2835_i2c_isr(int this_irq, void *data)
214 struct bcm2835_i2c_dev *i2c_dev = data;
215 u32 val, err;
217 val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
219 err = val & (BCM2835_I2C_S_CLKT | BCM2835_I2C_S_ERR);
220 if (err) {
221 i2c_dev->msg_err = err;
222 goto complete;
225 if (val & BCM2835_I2C_S_DONE) {
226 if (!i2c_dev->curr_msg) {
227 dev_err(i2c_dev->dev, "Got unexpected interrupt (from firmware?)\n");
228 } else if (i2c_dev->curr_msg->flags & I2C_M_RD) {
229 bcm2835_drain_rxfifo(i2c_dev);
230 val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
233 if ((val & BCM2835_I2C_S_RXD) || i2c_dev->msg_buf_remaining)
234 i2c_dev->msg_err = BCM2835_I2C_S_LEN;
235 else
236 i2c_dev->msg_err = 0;
237 goto complete;
240 if (val & BCM2835_I2C_S_TXW) {
241 if (!i2c_dev->msg_buf_remaining) {
242 i2c_dev->msg_err = val | BCM2835_I2C_S_LEN;
243 goto complete;
246 bcm2835_fill_txfifo(i2c_dev);
248 if (i2c_dev->num_msgs && !i2c_dev->msg_buf_remaining) {
249 i2c_dev->curr_msg++;
250 bcm2835_i2c_start_transfer(i2c_dev);
253 return IRQ_HANDLED;
256 if (val & BCM2835_I2C_S_RXR) {
257 if (!i2c_dev->msg_buf_remaining) {
258 i2c_dev->msg_err = val | BCM2835_I2C_S_LEN;
259 goto complete;
262 bcm2835_drain_rxfifo(i2c_dev);
263 return IRQ_HANDLED;
266 return IRQ_NONE;
268 complete:
269 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR);
270 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_S, BCM2835_I2C_S_CLKT |
271 BCM2835_I2C_S_ERR | BCM2835_I2C_S_DONE);
272 complete(&i2c_dev->completion);
274 return IRQ_HANDLED;
277 static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
278 int num)
280 struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
281 unsigned long time_left;
282 int i, ret;
284 for (i = 0; i < (num - 1); i++)
285 if (msgs[i].flags & I2C_M_RD) {
286 dev_warn_once(i2c_dev->dev,
287 "only one read message supported, has to be last\n");
288 return -EOPNOTSUPP;
291 ret = bcm2835_i2c_set_divider(i2c_dev);
292 if (ret)
293 return ret;
295 i2c_dev->curr_msg = msgs;
296 i2c_dev->num_msgs = num;
297 reinit_completion(&i2c_dev->completion);
299 bcm2835_i2c_start_transfer(i2c_dev);
301 time_left = wait_for_completion_timeout(&i2c_dev->completion,
302 adap->timeout);
304 bcm2835_i2c_finish_transfer(i2c_dev);
306 if (!time_left) {
307 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C,
308 BCM2835_I2C_C_CLEAR);
309 dev_err(i2c_dev->dev, "i2c transfer timed out\n");
310 return -ETIMEDOUT;
313 if (!i2c_dev->msg_err)
314 return num;
316 dev_dbg(i2c_dev->dev, "i2c transfer failed: %x\n", i2c_dev->msg_err);
318 if (i2c_dev->msg_err & BCM2835_I2C_S_ERR)
319 return -EREMOTEIO;
321 return -EIO;
324 static u32 bcm2835_i2c_func(struct i2c_adapter *adap)
326 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
329 static const struct i2c_algorithm bcm2835_i2c_algo = {
330 .master_xfer = bcm2835_i2c_xfer,
331 .functionality = bcm2835_i2c_func,
335 * This HW was reported to have problems with clock stretching:
336 * http://www.advamation.com/knowhow/raspberrypi/rpi-i2c-bug.html
337 * https://www.raspberrypi.org/forums/viewtopic.php?p=146272
339 static const struct i2c_adapter_quirks bcm2835_i2c_quirks = {
340 .flags = I2C_AQ_NO_CLK_STRETCH,
343 static int bcm2835_i2c_probe(struct platform_device *pdev)
345 struct bcm2835_i2c_dev *i2c_dev;
346 struct resource *mem, *irq;
347 int ret;
348 struct i2c_adapter *adap;
350 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
351 if (!i2c_dev)
352 return -ENOMEM;
353 platform_set_drvdata(pdev, i2c_dev);
354 i2c_dev->dev = &pdev->dev;
355 init_completion(&i2c_dev->completion);
357 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
358 i2c_dev->regs = devm_ioremap_resource(&pdev->dev, mem);
359 if (IS_ERR(i2c_dev->regs))
360 return PTR_ERR(i2c_dev->regs);
362 i2c_dev->clk = devm_clk_get(&pdev->dev, NULL);
363 if (IS_ERR(i2c_dev->clk)) {
364 if (PTR_ERR(i2c_dev->clk) != -EPROBE_DEFER)
365 dev_err(&pdev->dev, "Could not get clock\n");
366 return PTR_ERR(i2c_dev->clk);
369 ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
370 &i2c_dev->bus_clk_rate);
371 if (ret < 0) {
372 dev_warn(&pdev->dev,
373 "Could not read clock-frequency property\n");
374 i2c_dev->bus_clk_rate = 100000;
377 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
378 if (!irq) {
379 dev_err(&pdev->dev, "No IRQ resource\n");
380 return -ENODEV;
382 i2c_dev->irq = irq->start;
384 ret = request_irq(i2c_dev->irq, bcm2835_i2c_isr, IRQF_SHARED,
385 dev_name(&pdev->dev), i2c_dev);
386 if (ret) {
387 dev_err(&pdev->dev, "Could not request IRQ\n");
388 return -ENODEV;
391 adap = &i2c_dev->adapter;
392 i2c_set_adapdata(adap, i2c_dev);
393 adap->owner = THIS_MODULE;
394 adap->class = I2C_CLASS_DEPRECATED;
395 strlcpy(adap->name, "bcm2835 I2C adapter", sizeof(adap->name));
396 adap->algo = &bcm2835_i2c_algo;
397 adap->dev.parent = &pdev->dev;
398 adap->dev.of_node = pdev->dev.of_node;
399 adap->quirks = &bcm2835_i2c_quirks;
401 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, 0);
403 ret = i2c_add_adapter(adap);
404 if (ret)
405 free_irq(i2c_dev->irq, i2c_dev);
407 return ret;
410 static int bcm2835_i2c_remove(struct platform_device *pdev)
412 struct bcm2835_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
414 free_irq(i2c_dev->irq, i2c_dev);
415 i2c_del_adapter(&i2c_dev->adapter);
417 return 0;
420 static const struct of_device_id bcm2835_i2c_of_match[] = {
421 { .compatible = "brcm,bcm2835-i2c" },
424 MODULE_DEVICE_TABLE(of, bcm2835_i2c_of_match);
426 static struct platform_driver bcm2835_i2c_driver = {
427 .probe = bcm2835_i2c_probe,
428 .remove = bcm2835_i2c_remove,
429 .driver = {
430 .name = "i2c-bcm2835",
431 .of_match_table = bcm2835_i2c_of_match,
434 module_platform_driver(bcm2835_i2c_driver);
436 MODULE_AUTHOR("Stephen Warren <swarren@wwwdotorg.org>");
437 MODULE_DESCRIPTION("BCM2835 I2C bus adapter");
438 MODULE_LICENSE("GPL v2");
439 MODULE_ALIAS("platform:i2c-bcm2835");