drivers/i2c/busses/i2c-xlr.c

   1 /*
   2  * Copyright 2011, Netlogic Microsystems Inc.
   3  * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
   4  *
   5  * This file is licensed under the terms of the GNU General Public
   6  * License version 2.  This program is licensed "as is" without any
   7  * warranty of any kind, whether express or implied.
   8  */
   9
  10 #include <linux/err.h>
  11 #include <linux/kernel.h>
  12 #include <linux/module.h>
  13 #include <linux/slab.h>
  14 #include <linux/ioport.h>
  15 #include <linux/delay.h>
  16 #include <linux/errno.h>
  17 #include <linux/i2c.h>
  18 #include <linux/io.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/of_device.h>
  21 #include <linux/clk.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/wait.h>
  24
  25 /* XLR I2C REGISTERS */
  26 #define XLR_I2C_CFG             0x00
  27 #define XLR_I2C_CLKDIV          0x01
  28 #define XLR_I2C_DEVADDR         0x02
  29 #define XLR_I2C_ADDR            0x03
  30 #define XLR_I2C_DATAOUT         0x04
  31 #define XLR_I2C_DATAIN          0x05
  32 #define XLR_I2C_STATUS          0x06
  33 #define XLR_I2C_STARTXFR        0x07
  34 #define XLR_I2C_BYTECNT         0x08
  35 #define XLR_I2C_HDSTATIM        0x09
  36
  37 /* Sigma Designs additional registers */
  38 #define XLR_I2C_INT_EN          0x09
  39 #define XLR_I2C_INT_STAT        0x0a
  40
  41 /* XLR I2C REGISTERS FLAGS */
  42 #define XLR_I2C_BUS_BUSY        0x01
  43 #define XLR_I2C_SDOEMPTY        0x02
  44 #define XLR_I2C_RXRDY           0x04
  45 #define XLR_I2C_ACK_ERR         0x08
  46 #define XLR_I2C_ARB_STARTERR    0x30
  47
  48 /* Register Values */
  49 #define XLR_I2C_CFG_ADDR        0xF8
  50 #define XLR_I2C_CFG_NOADDR      0xFA
  51 #define XLR_I2C_STARTXFR_ND     0x02    /* No Data */
  52 #define XLR_I2C_STARTXFR_RD     0x01    /* Read */
  53 #define XLR_I2C_STARTXFR_WR     0x00    /* Write */
  54
  55 #define XLR_I2C_TIMEOUT         10      /* timeout per byte in msec */
  56
  57 /*
  58  * On XLR/XLS, we need to use __raw_ IO to read the I2C registers
  59  * because they are in the big-endian MMIO area on the SoC.
  60  *
  61  * The readl/writel implementation on XLR/XLS byteswaps, because
  62  * those are for its little-endian PCI space (see arch/mips/Kconfig).
  63  */
  64 static inline void xlr_i2c_wreg(u32 __iomem *base, unsigned int reg, u32 val)
  65 {
  66         __raw_writel(val, base + reg);
  67 }
  68
  69 static inline u32 xlr_i2c_rdreg(u32 __iomem *base, unsigned int reg)
  70 {
  71         return __raw_readl(base + reg);
  72 }
  73
  74 #define XLR_I2C_FLAG_IRQ        1
  75
  76 struct xlr_i2c_config {
  77         u32 flags;              /* optional feature support */
  78         u32 status_busy;        /* value of STATUS[0] when busy */
  79         u32 cfg_extra;          /* extra CFG bits to set */
  80 };
  81
  82 struct xlr_i2c_private {
  83         struct i2c_adapter adap;
  84         u32 __iomem *iobase;
  85         int irq;
  86         int pos;
  87         struct i2c_msg *msg;
  88         const struct xlr_i2c_config *cfg;
  89         wait_queue_head_t wait;
  90         struct clk *clk;
  91 };
  92
  93 static int xlr_i2c_busy(struct xlr_i2c_private *priv, u32 status)
  94 {
  95         return (status & XLR_I2C_BUS_BUSY) == priv->cfg->status_busy;
  96 }
  97
  98 static int xlr_i2c_idle(struct xlr_i2c_private *priv)
  99 {
 100         return !xlr_i2c_busy(priv, xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS));
 101 }
 102
 103 static int xlr_i2c_wait(struct xlr_i2c_private *priv, unsigned long timeout)
 104 {
 105         int status;
 106         int t;
 107
 108         t = wait_event_timeout(priv->wait, xlr_i2c_idle(priv),
 109                                 msecs_to_jiffies(timeout));
 110         if (!t)
 111                 return -ETIMEDOUT;
 112
 113         status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS);
 114
 115         return status & XLR_I2C_ACK_ERR ? -EIO : 0;
 116 }
 117
 118 static void xlr_i2c_tx_irq(struct xlr_i2c_private *priv, u32 status)
 119 {
 120         struct i2c_msg *msg = priv->msg;
 121
 122         if (status & XLR_I2C_SDOEMPTY)
 123                 xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOUT,
 124                                 msg->buf[priv->pos++]);
 125 }
 126
 127 static void xlr_i2c_rx_irq(struct xlr_i2c_private *priv, u32 status)
 128 {
 129         struct i2c_msg *msg = priv->msg;
 130
 131         if (status & XLR_I2C_RXRDY)
 132                 msg->buf[priv->pos++] =
 133                         xlr_i2c_rdreg(priv->iobase, XLR_I2C_DATAIN);
 134 }
 135
 136 static irqreturn_t xlr_i2c_irq(int irq, void *dev_id)
 137 {
 138         struct xlr_i2c_private *priv = dev_id;
 139         struct i2c_msg *msg = priv->msg;
 140         u32 int_stat, status;
 141
 142         int_stat = xlr_i2c_rdreg(priv->iobase, XLR_I2C_INT_STAT);
 143         if (!int_stat)
 144                 return IRQ_NONE;
 145
 146         xlr_i2c_wreg(priv->iobase, XLR_I2C_INT_STAT, int_stat);
 147
 148         if (!msg)
 149                 return IRQ_HANDLED;
 150
 151         status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS);
 152
 153         if (priv->pos < msg->len) {
 154                 if (msg->flags & I2C_M_RD)
 155                         xlr_i2c_rx_irq(priv, status);
 156                 else
 157                         xlr_i2c_tx_irq(priv, status);
 158         }
 159
 160         if (!xlr_i2c_busy(priv, status))
 161                 wake_up(&priv->wait);
 162
 163         return IRQ_HANDLED;
 164 }
 165
 166 static int xlr_i2c_tx(struct xlr_i2c_private *priv,  u16 len,
 167         u8 *buf, u16 addr)
 168 {
 169         struct i2c_adapter *adap = &priv->adap;
 170         unsigned long timeout, stoptime, checktime;
 171         u32 i2c_status;
 172         int pos, timedout;
 173         u8 offset;
 174         u32 xfer;
 175
 176         offset = buf[0];
 177         xlr_i2c_wreg(priv->iobase, XLR_I2C_ADDR, offset);
 178         xlr_i2c_wreg(priv->iobase, XLR_I2C_DEVADDR, addr);
 179         xlr_i2c_wreg(priv->iobase, XLR_I2C_CFG,
 180                         XLR_I2C_CFG_ADDR | priv->cfg->cfg_extra);
 181
 182         timeout = msecs_to_jiffies(XLR_I2C_TIMEOUT);
 183         stoptime = jiffies + timeout;
 184         timedout = 0;
 185
 186         if (len == 1) {
 187                 xlr_i2c_wreg(priv->iobase, XLR_I2C_BYTECNT, len - 1);
 188                 xfer = XLR_I2C_STARTXFR_ND;
 189                 pos = 1;
 190         } else {
 191                 xlr_i2c_wreg(priv->iobase, XLR_I2C_BYTECNT, len - 2);
 192                 xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOUT, buf[1]);
 193                 xfer = XLR_I2C_STARTXFR_WR;
 194                 pos = 2;
 195         }
 196
 197         priv->pos = pos;
 198
 199 retry:
 200         /* retry can only happen on the first byte */
 201         xlr_i2c_wreg(priv->iobase, XLR_I2C_STARTXFR, xfer);
 202
 203         if (priv->irq > 0)
 204                 return xlr_i2c_wait(priv, XLR_I2C_TIMEOUT * len);
 205
 206         while (!timedout) {
 207                 checktime = jiffies;
 208                 i2c_status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS);
 209
 210                 if ((i2c_status & XLR_I2C_SDOEMPTY) && pos < len) {
 211                         xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOUT, buf[pos++]);
 212
 213                         /* reset timeout on successful xmit */
 214                         stoptime = jiffies + timeout;
 215                 }
 216                 timedout = time_after(checktime, stoptime);
 217
 218                 if (i2c_status & XLR_I2C_ARB_STARTERR) {
 219                         if (timedout)
 220                                 break;
 221                         goto retry;
 222                 }
 223
 224                 if (i2c_status & XLR_I2C_ACK_ERR)
 225                         return -EIO;
 226
 227                 if (!xlr_i2c_busy(priv, i2c_status) && pos >= len)
 228                         return 0;
 229         }
 230         dev_err(&adap->dev, "I2C transmit timeout\n");
 231         return -ETIMEDOUT;
 232 }
 233
 234 static int xlr_i2c_rx(struct xlr_i2c_private *priv, u16 len, u8 *buf, u16 addr)
 235 {
 236         struct i2c_adapter *adap = &priv->adap;
 237         u32 i2c_status;
 238         unsigned long timeout, stoptime, checktime;
 239         int nbytes, timedout;
 240
 241         xlr_i2c_wreg(priv->iobase, XLR_I2C_CFG,
 242                         XLR_I2C_CFG_NOADDR | priv->cfg->cfg_extra);
 243         xlr_i2c_wreg(priv->iobase, XLR_I2C_BYTECNT, len - 1);
 244         xlr_i2c_wreg(priv->iobase, XLR_I2C_DEVADDR, addr);
 245
 246         priv->pos = 0;
 247
 248         timeout = msecs_to_jiffies(XLR_I2C_TIMEOUT);
 249         stoptime = jiffies + timeout;
 250         timedout = 0;
 251         nbytes = 0;
 252 retry:
 253         xlr_i2c_wreg(priv->iobase, XLR_I2C_STARTXFR, XLR_I2C_STARTXFR_RD);
 254
 255         if (priv->irq > 0)
 256                 return xlr_i2c_wait(priv, XLR_I2C_TIMEOUT * len);
 257
 258         while (!timedout) {
 259                 checktime = jiffies;
 260                 i2c_status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS);
 261                 if (i2c_status & XLR_I2C_RXRDY) {
 262                         if (nbytes >= len)
 263                                 return -EIO;    /* should not happen */
 264
 265                         buf[nbytes++] =
 266                                 xlr_i2c_rdreg(priv->iobase, XLR_I2C_DATAIN);
 267
 268                         /* reset timeout on successful read */
 269                         stoptime = jiffies + timeout;
 270                 }
 271
 272                 timedout = time_after(checktime, stoptime);
 273                 if (i2c_status & XLR_I2C_ARB_STARTERR) {
 274                         if (timedout)
 275                                 break;
 276                         goto retry;
 277                 }
 278
 279                 if (i2c_status & XLR_I2C_ACK_ERR)
 280                         return -EIO;
 281
 282                 if (!xlr_i2c_busy(priv, i2c_status))
 283                         return 0;
 284         }
 285
 286         dev_err(&adap->dev, "I2C receive timeout\n");
 287         return -ETIMEDOUT;
 288 }
 289
 290 static int xlr_i2c_xfer(struct i2c_adapter *adap,
 291         struct i2c_msg *msgs, int num)
 292 {
 293         struct i2c_msg *msg;
 294         int i;
 295         int ret = 0;
 296         struct xlr_i2c_private *priv = i2c_get_adapdata(adap);
 297
 298         ret = clk_enable(priv->clk);
 299         if (ret)
 300                 return ret;
 301
 302         if (priv->irq)
 303                 xlr_i2c_wreg(priv->iobase, XLR_I2C_INT_EN, 0xf);
 304
 305
 306         for (i = 0; ret == 0 && i < num; i++) {
 307                 msg = &msgs[i];
 308                 priv->msg = msg;
 309                 if (msg->flags & I2C_M_RD)
 310                         ret = xlr_i2c_rx(priv, msg->len, &msg->buf[0],
 311                                         msg->addr);
 312                 else
 313                         ret = xlr_i2c_tx(priv, msg->len, &msg->buf[0],
 314                                         msg->addr);
 315         }
 316
 317         if (priv->irq)
 318                 xlr_i2c_wreg(priv->iobase, XLR_I2C_INT_EN, 0);
 319
 320         clk_disable(priv->clk);
 321         priv->msg = NULL;
 322
 323         return (ret != 0) ? ret : num;
 324 }
 325
 326 static u32 xlr_func(struct i2c_adapter *adap)
 327 {
 328         /* Emulate SMBUS over I2C */
 329         return (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK) | I2C_FUNC_I2C;
 330 }
 331
 332 static const struct i2c_algorithm xlr_i2c_algo = {
 333         .master_xfer    = xlr_i2c_xfer,
 334         .functionality  = xlr_func,
 335 };
 336
 337 static const struct i2c_adapter_quirks xlr_i2c_quirks = {
 338         .flags = I2C_AQ_NO_ZERO_LEN,
 339 };
 340
 341 static const struct xlr_i2c_config xlr_i2c_config_default = {
 342         .status_busy    = XLR_I2C_BUS_BUSY,
 343         .cfg_extra      = 0,
 344 };
 345
 346 static const struct xlr_i2c_config xlr_i2c_config_tangox = {
 347         .flags          = XLR_I2C_FLAG_IRQ,
 348         .status_busy    = 0,
 349         .cfg_extra      = 1 << 8,
 350 };
 351
 352 static const struct of_device_id xlr_i2c_dt_ids[] = {
 353         {
 354                 .compatible     = "sigma,smp8642-i2c",
 355                 .data           = &xlr_i2c_config_tangox,
 356         },
 357         { }
 358 };
 359 MODULE_DEVICE_TABLE(of, xlr_i2c_dt_ids);
 360
 361 static int xlr_i2c_probe(struct platform_device *pdev)
 362 {
 363         const struct of_device_id *match;
 364         struct xlr_i2c_private  *priv;
 365         struct resource *res;
 366         struct clk *clk;
 367         unsigned long clk_rate;
 368         unsigned long clk_div;
 369         u32 busfreq;
 370         int irq;
 371         int ret;
 372
 373         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
 374         if (!priv)
 375                 return -ENOMEM;
 376
 377         match = of_match_device(xlr_i2c_dt_ids, &pdev->dev);
 378         if (match)
 379                 priv->cfg = match->data;
 380         else
 381                 priv->cfg = &xlr_i2c_config_default;
 382
 383         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 384         priv->iobase = devm_ioremap_resource(&pdev->dev, res);
 385         if (IS_ERR(priv->iobase))
 386                 return PTR_ERR(priv->iobase);
 387
 388         irq = platform_get_irq(pdev, 0);
 389
 390         if (irq > 0 && (priv->cfg->flags & XLR_I2C_FLAG_IRQ)) {
 391                 priv->irq = irq;
 392
 393                 xlr_i2c_wreg(priv->iobase, XLR_I2C_INT_EN, 0);
 394                 xlr_i2c_wreg(priv->iobase, XLR_I2C_INT_STAT, 0xf);
 395
 396                 ret = devm_request_irq(&pdev->dev, priv->irq, xlr_i2c_irq,
 397                                         IRQF_SHARED, dev_name(&pdev->dev),
 398                                         priv);
 399                 if (ret)
 400                         return ret;
 401
 402                 init_waitqueue_head(&priv->wait);
 403         }
 404
 405         if (of_property_read_u32(pdev->dev.of_node, "clock-frequency",
 406                                  &busfreq))
 407                 busfreq = 100000;
 408
 409         clk = devm_clk_get(&pdev->dev, NULL);
 410         if (!IS_ERR(clk)) {
 411                 ret = clk_prepare_enable(clk);
 412                 if (ret)
 413                         return ret;
 414
 415                 clk_rate = clk_get_rate(clk);
 416                 clk_div = DIV_ROUND_UP(clk_rate, 2 * busfreq);
 417                 xlr_i2c_wreg(priv->iobase, XLR_I2C_CLKDIV, clk_div);
 418
 419                 clk_disable(clk);
 420                 priv->clk = clk;
 421         }
 422
 423         priv->adap.dev.parent = &pdev->dev;
 424         priv->adap.dev.of_node  = pdev->dev.of_node;
 425         priv->adap.owner        = THIS_MODULE;
 426         priv->adap.algo_data    = priv;
 427         priv->adap.algo         = &xlr_i2c_algo;
 428         priv->adap.quirks       = &xlr_i2c_quirks;
 429         priv->adap.nr           = pdev->id;
 430         priv->adap.class        = I2C_CLASS_HWMON;
 431         snprintf(priv->adap.name, sizeof(priv->adap.name), "xlr-i2c");
 432
 433         i2c_set_adapdata(&priv->adap, priv);
 434         ret = i2c_add_numbered_adapter(&priv->adap);
 435         if (ret < 0)
 436                 return ret;
 437
 438         platform_set_drvdata(pdev, priv);
 439         dev_info(&priv->adap.dev, "Added I2C Bus.\n");
 440         return 0;
 441 }
 442
 443 static int xlr_i2c_remove(struct platform_device *pdev)
 444 {
 445         struct xlr_i2c_private *priv;
 446
 447         priv = platform_get_drvdata(pdev);
 448         i2c_del_adapter(&priv->adap);
 449         clk_unprepare(priv->clk);
 450
 451         return 0;
 452 }
 453
 454 static struct platform_driver xlr_i2c_driver = {
 455         .probe  = xlr_i2c_probe,
 456         .remove = xlr_i2c_remove,
 457         .driver = {
 458                 .name   = "xlr-i2cbus",
 459                 .of_match_table = xlr_i2c_dt_ids,
 460         },
 461 };
 462
 463 module_platform_driver(xlr_i2c_driver);
 464
 465 MODULE_AUTHOR("Ganesan Ramalingam <ganesanr@netlogicmicro.com>");
 466 MODULE_DESCRIPTION("XLR/XLS SoC I2C Controller driver");
 467 MODULE_LICENSE("GPL v2");
 468 MODULE_ALIAS("platform:xlr-i2cbus");