arch/powerpc/kernel/setup_32.c

   1 /*
   2  * Common prep/pmac/chrp boot and setup code.
   3  */
   4
   5 #include <linux/module.h>
   6 #include <linux/string.h>
   7 #include <linux/sched.h>
   8 #include <linux/init.h>
   9 #include <linux/kernel.h>
  10 #include <linux/reboot.h>
  11 #include <linux/delay.h>
  12 #include <linux/initrd.h>
  13 #include <linux/tty.h>
  14 #include <linux/bootmem.h>
  15 #include <linux/seq_file.h>
  16 #include <linux/root_dev.h>
  17 #include <linux/cpu.h>
  18 #include <linux/console.h>
  19 #include <linux/memblock.h>
  20
  21 #include <asm/io.h>
  22 #include <asm/prom.h>
  23 #include <asm/processor.h>
  24 #include <asm/pgtable.h>
  25 #include <asm/setup.h>
  26 #include <asm/smp.h>
  27 #include <asm/elf.h>
  28 #include <asm/cputable.h>
  29 #include <asm/bootx.h>
  30 #include <asm/btext.h>
  31 #include <asm/machdep.h>
  32 #include <asm/uaccess.h>
  33 #include <asm/pmac_feature.h>
  34 #include <asm/sections.h>
  35 #include <asm/nvram.h>
  36 #include <asm/xmon.h>
  37 #include <asm/time.h>
  38 #include <asm/serial.h>
  39 #include <asm/udbg.h>
  40 #include <asm/mmu_context.h>
  41 #include <asm/epapr_hcalls.h>
  42
  43 #define DBG(fmt...)
  44
  45 extern void bootx_init(unsigned long r4, unsigned long phys);
  46
  47 int boot_cpuid_phys;
  48 EXPORT_SYMBOL_GPL(boot_cpuid_phys);
  49
  50 int smp_hw_index[NR_CPUS];
  51
  52 unsigned long ISA_DMA_THRESHOLD;
  53 unsigned int DMA_MODE_READ;
  54 unsigned int DMA_MODE_WRITE;
  55
  56 #ifdef CONFIG_VGA_CONSOLE
  57 unsigned long vgacon_remap_base;
  58 EXPORT_SYMBOL(vgacon_remap_base);
  59 #endif
  60
  61 /*
  62  * These are used in binfmt_elf.c to put aux entries on the stack
  63  * for each elf executable being started.
  64  */
  65 int dcache_bsize;
  66 int icache_bsize;
  67 int ucache_bsize;
  68
  69 /*
  70  * We're called here very early in the boot.  We determine the machine
  71  * type and call the appropriate low-level setup functions.
  72  *  -- Cort <cort@fsmlabs.com>
  73  *
  74  * Note that the kernel may be running at an address which is different
  75  * from the address that it was linked at, so we must use RELOC/PTRRELOC
  76  * to access static data (including strings).  -- paulus
  77  */
  78 notrace unsigned long __init early_init(unsigned long dt_ptr)
  79 {
  80         unsigned long offset = reloc_offset();
  81         struct cpu_spec *spec;
  82
  83         /* First zero the BSS -- use memset_io, some platforms don't have
  84          * caches on yet */
  85         memset_io((void __iomem *)PTRRELOC(&__bss_start), 0,
  86                         __bss_stop - __bss_start);
  87
  88         /*
  89          * Identify the CPU type and fix up code sections
  90          * that depend on which cpu we have.
  91          */
  92         spec = identify_cpu(offset, mfspr(SPRN_PVR));
  93
  94         do_feature_fixups(spec->cpu_features,
  95                           PTRRELOC(&__start___ftr_fixup),
  96                           PTRRELOC(&__stop___ftr_fixup));
  97
  98         do_feature_fixups(spec->mmu_features,
  99                           PTRRELOC(&__start___mmu_ftr_fixup),
 100                           PTRRELOC(&__stop___mmu_ftr_fixup));
 101
 102         do_lwsync_fixups(spec->cpu_features,
 103                          PTRRELOC(&__start___lwsync_fixup),
 104                          PTRRELOC(&__stop___lwsync_fixup));
 105
 106         do_final_fixups();
 107
 108         return KERNELBASE + offset;
 109 }
 110
 111
 112 /*
 113  * Find out what kind of machine we're on and save any data we need
 114  * from the early boot process (devtree is copied on pmac by prom_init()).
 115  * This is called very early on the boot process, after a minimal
 116  * MMU environment has been set up but before MMU_init is called.
 117  */
 118 notrace void __init machine_init(u64 dt_ptr)
 119 {
 120         lockdep_init();
 121
 122         /* Enable early debugging if any specified (see udbg.h) */
 123         udbg_early_init();
 124
 125         /* Do some early initialization based on the flat device tree */
 126         early_init_devtree(__va(dt_ptr));
 127
 128         epapr_paravirt_early_init();
 129
 130         early_init_mmu();
 131
 132         probe_machine();
 133
 134         setup_kdump_trampoline();
 135
 136 #ifdef CONFIG_6xx
 137         if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
 138             cpu_has_feature(CPU_FTR_CAN_NAP))
 139                 ppc_md.power_save = ppc6xx_idle;
 140 #endif
 141
 142 #ifdef CONFIG_E500
 143         if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
 144             cpu_has_feature(CPU_FTR_CAN_NAP))
 145                 ppc_md.power_save = e500_idle;
 146 #endif
 147         if (ppc_md.progress)
 148                 ppc_md.progress("id mach(): done", 0x200);
 149 }
 150
 151 /* Checks "l2cr=xxxx" command-line option */
 152 int __init ppc_setup_l2cr(char *str)
 153 {
 154         if (cpu_has_feature(CPU_FTR_L2CR)) {
 155                 unsigned long val = simple_strtoul(str, NULL, 0);
 156                 printk(KERN_INFO "l2cr set to %lx\n", val);
 157                 _set_L2CR(0);           /* force invalidate by disable cache */
 158                 _set_L2CR(val);         /* and enable it */
 159         }
 160         return 1;
 161 }
 162 __setup("l2cr=", ppc_setup_l2cr);
 163
 164 /* Checks "l3cr=xxxx" command-line option */
 165 int __init ppc_setup_l3cr(char *str)
 166 {
 167         if (cpu_has_feature(CPU_FTR_L3CR)) {
 168                 unsigned long val = simple_strtoul(str, NULL, 0);
 169                 printk(KERN_INFO "l3cr set to %lx\n", val);
 170                 _set_L3CR(val);         /* and enable it */
 171         }
 172         return 1;
 173 }
 174 __setup("l3cr=", ppc_setup_l3cr);
 175
 176 #ifdef CONFIG_GENERIC_NVRAM
 177
 178 /* Generic nvram hooks used by drivers/char/gen_nvram.c */
 179 unsigned char nvram_read_byte(int addr)
 180 {
 181         if (ppc_md.nvram_read_val)
 182                 return ppc_md.nvram_read_val(addr);
 183         return 0xff;
 184 }
 185 EXPORT_SYMBOL(nvram_read_byte);
 186
 187 void nvram_write_byte(unsigned char val, int addr)
 188 {
 189         if (ppc_md.nvram_write_val)
 190                 ppc_md.nvram_write_val(addr, val);
 191 }
 192 EXPORT_SYMBOL(nvram_write_byte);
 193
 194 ssize_t nvram_get_size(void)
 195 {
 196         if (ppc_md.nvram_size)
 197                 return ppc_md.nvram_size();
 198         return -1;
 199 }
 200 EXPORT_SYMBOL(nvram_get_size);
 201
 202 void nvram_sync(void)
 203 {
 204         if (ppc_md.nvram_sync)
 205                 ppc_md.nvram_sync();
 206 }
 207 EXPORT_SYMBOL(nvram_sync);
 208
 209 #endif /* CONFIG_NVRAM */
 210
 211 int __init ppc_init(void)
 212 {
 213         /* clear the progress line */
 214         if (ppc_md.progress)
 215                 ppc_md.progress("             ", 0xffff);
 216
 217         /* call platform init */
 218         if (ppc_md.init != NULL) {
 219                 ppc_md.init();
 220         }
 221         return 0;
 222 }
 223
 224 arch_initcall(ppc_init);
 225
 226 static void __init irqstack_early_init(void)
 227 {
 228         unsigned int i;
 229
 230         /* interrupt stacks must be in lowmem, we get that for free on ppc32
 231          * as the memblock is limited to lowmem by default */
 232         for_each_possible_cpu(i) {
 233                 softirq_ctx[i] = (struct thread_info *)
 234                         __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
 235                 hardirq_ctx[i] = (struct thread_info *)
 236                         __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
 237         }
 238 }
 239
 240 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
 241 static void __init exc_lvl_early_init(void)
 242 {
 243         unsigned int i, hw_cpu;
 244
 245         /* interrupt stacks must be in lowmem, we get that for free on ppc32
 246          * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */
 247         for_each_possible_cpu(i) {
 248 #ifdef CONFIG_SMP
 249                 hw_cpu = get_hard_smp_processor_id(i);
 250 #else
 251                 hw_cpu = 0;
 252 #endif
 253
 254                 critirq_ctx[hw_cpu] = (struct thread_info *)
 255                         __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
 256 #ifdef CONFIG_BOOKE
 257                 dbgirq_ctx[hw_cpu] = (struct thread_info *)
 258                         __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
 259                 mcheckirq_ctx[hw_cpu] = (struct thread_info *)
 260                         __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
 261 #endif
 262         }
 263 }
 264 #else
 265 #define exc_lvl_early_init()
 266 #endif
 267
 268 /* Warning, IO base is not yet inited */
 269 void __init setup_arch(char **cmdline_p)
 270 {
 271         *cmdline_p = cmd_line;
 272
 273         /* so udelay does something sensible, assume <= 1000 bogomips */
 274         loops_per_jiffy = 500000000 / HZ;
 275
 276         unflatten_device_tree();
 277         check_for_initrd();
 278
 279         if (ppc_md.init_early)
 280                 ppc_md.init_early();
 281
 282         find_legacy_serial_ports();
 283
 284         smp_setup_cpu_maps();
 285
 286         /* Register early console */
 287         register_early_udbg_console();
 288
 289         xmon_setup();
 290
 291         /*
 292          * Set cache line size based on type of cpu as a default.
 293          * Systems with OF can look in the properties on the cpu node(s)
 294          * for a possibly more accurate value.
 295          */
 296         dcache_bsize = cur_cpu_spec->dcache_bsize;
 297         icache_bsize = cur_cpu_spec->icache_bsize;
 298         ucache_bsize = 0;
 299         if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE))
 300                 ucache_bsize = icache_bsize = dcache_bsize;
 301
 302         if (ppc_md.panic)
 303                 setup_panic();
 304
 305         init_mm.start_code = (unsigned long)_stext;
 306         init_mm.end_code = (unsigned long) _etext;
 307         init_mm.end_data = (unsigned long) _edata;
 308         init_mm.brk = klimit;
 309
 310         exc_lvl_early_init();
 311
 312         irqstack_early_init();
 313
 314         /* set up the bootmem stuff with available memory */
 315         do_init_bootmem();
 316         if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
 317
 318 #ifdef CONFIG_DUMMY_CONSOLE
 319         conswitchp = &dummy_con;
 320 #endif
 321
 322         if (ppc_md.setup_arch)
 323                 ppc_md.setup_arch();
 324         if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
 325
 326         paging_init();
 327
 328         /* Initialize the MMU context management stuff */
 329         mmu_context_init();
 330 }