1 * Marvell PXA910 Clock Controller
3 The PXA910 clock subsystem generates and supplies clock to various
4 controllers within the PXA910 SoC.
8 - compatible: should be one of the following.
9 - "marvell,pxa910-clock" - controller compatible with PXA910 SoC.
11 - reg: physical base address of the clock subsystem and length of memory mapped
12 region. There are 4 places in SOC has clock control logic:
13 "mpmu", "apmu", "apbc", "apbcp". So four reg spaces need to be defined.
15 - #clock-cells: should be 1.
16 - #reset-cells: should be 1.
18 Each clock is assigned an identifier and client nodes use this identifier
19 to specify the clock which they consume.
21 All these identifier could be found in <dt-bindings/clock/marvell-pxa910.h>.