2 * linux/arch/arm/mach-omap1/mcbsp.c
4 * Copyright (C) 2008 Instituto Nokia de Tecnologia
5 * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * Multichannel mode not supported.
13 #include <linux/ioport.h>
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/clk.h>
17 #include <linux/err.h>
19 #include <linux/platform_device.h>
20 #include <linux/slab.h>
25 #include <plat/mcbsp.h>
27 #include <mach/irqs.h>
31 #define DPS_RSTCT2_PER_EN (1 << 0)
32 #define DSP_RSTCT2_WD_PER_EN (1 << 1)
35 static struct clk
*api_clk
;
36 static struct clk
*dsp_clk
;
37 static struct platform_device
**omap_mcbsp_devices
;
39 static void omap1_mcbsp_request(unsigned int id
)
42 * On 1510, 1610 and 1710, McBSP1 and McBSP3
43 * are DSP public peripherals.
45 if (id
== 0 || id
== 2) {
47 api_clk
= clk_get(NULL
, "api_ck");
48 dsp_clk
= clk_get(NULL
, "dsp_ck");
49 if (!IS_ERR(api_clk
) && !IS_ERR(dsp_clk
)) {
54 * DSP external peripheral reset
55 * FIXME: This should be moved to dsp code
57 __raw_writew(__raw_readw(DSP_RSTCT2
) | DPS_RSTCT2_PER_EN
|
58 DSP_RSTCT2_WD_PER_EN
, DSP_RSTCT2
);
64 static void omap1_mcbsp_free(unsigned int id
)
66 if (id
== 0 || id
== 2) {
68 if (!IS_ERR(api_clk
)) {
72 if (!IS_ERR(dsp_clk
)) {
80 static struct omap_mcbsp_ops omap1_mcbsp_ops
= {
81 .request
= omap1_mcbsp_request
,
82 .free
= omap1_mcbsp_free
,
85 #define OMAP7XX_MCBSP1_BASE 0xfffb1000
86 #define OMAP7XX_MCBSP2_BASE 0xfffb1800
88 #define OMAP1510_MCBSP1_BASE 0xe1011800
89 #define OMAP1510_MCBSP2_BASE 0xfffb1000
90 #define OMAP1510_MCBSP3_BASE 0xe1017000
92 #define OMAP1610_MCBSP1_BASE 0xe1011800
93 #define OMAP1610_MCBSP2_BASE 0xfffb1000
94 #define OMAP1610_MCBSP3_BASE 0xe1017000
96 #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
97 struct resource omap7xx_mcbsp_res
[][6] = {
100 .start
= OMAP7XX_MCBSP1_BASE
,
101 .end
= OMAP7XX_MCBSP1_BASE
+ SZ_256
,
102 .flags
= IORESOURCE_MEM
,
106 .start
= INT_7XX_McBSP1RX
,
107 .flags
= IORESOURCE_IRQ
,
111 .start
= INT_7XX_McBSP1TX
,
112 .flags
= IORESOURCE_IRQ
,
116 .start
= OMAP_DMA_MCBSP1_RX
,
117 .flags
= IORESOURCE_DMA
,
121 .start
= OMAP_DMA_MCBSP1_TX
,
122 .flags
= IORESOURCE_DMA
,
127 .start
= OMAP7XX_MCBSP2_BASE
,
128 .end
= OMAP7XX_MCBSP2_BASE
+ SZ_256
,
129 .flags
= IORESOURCE_MEM
,
133 .start
= INT_7XX_McBSP2RX
,
134 .flags
= IORESOURCE_IRQ
,
138 .start
= INT_7XX_McBSP2TX
,
139 .flags
= IORESOURCE_IRQ
,
143 .start
= OMAP_DMA_MCBSP3_RX
,
144 .flags
= IORESOURCE_DMA
,
148 .start
= OMAP_DMA_MCBSP3_TX
,
149 .flags
= IORESOURCE_DMA
,
154 #define omap7xx_mcbsp_res_0 omap7xx_mcbsp_res[0]
156 static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata
[] = {
158 .ops
= &omap1_mcbsp_ops
,
161 .ops
= &omap1_mcbsp_ops
,
164 #define OMAP7XX_MCBSP_RES_SZ ARRAY_SIZE(omap7xx_mcbsp_res[1])
165 #define OMAP7XX_MCBSP_COUNT ARRAY_SIZE(omap7xx_mcbsp_res)
167 #define omap7xx_mcbsp_res_0 NULL
168 #define omap7xx_mcbsp_pdata NULL
169 #define OMAP7XX_MCBSP_RES_SZ 0
170 #define OMAP7XX_MCBSP_COUNT 0
173 #ifdef CONFIG_ARCH_OMAP15XX
174 struct resource omap15xx_mcbsp_res
[][6] = {
177 .start
= OMAP1510_MCBSP1_BASE
,
178 .end
= OMAP1510_MCBSP1_BASE
+ SZ_256
,
179 .flags
= IORESOURCE_MEM
,
183 .start
= INT_McBSP1RX
,
184 .flags
= IORESOURCE_IRQ
,
188 .start
= INT_McBSP1TX
,
189 .flags
= IORESOURCE_IRQ
,
193 .start
= OMAP_DMA_MCBSP1_RX
,
194 .flags
= IORESOURCE_DMA
,
198 .start
= OMAP_DMA_MCBSP1_TX
,
199 .flags
= IORESOURCE_DMA
,
204 .start
= OMAP1510_MCBSP2_BASE
,
205 .end
= OMAP1510_MCBSP2_BASE
+ SZ_256
,
206 .flags
= IORESOURCE_MEM
,
210 .start
= INT_1510_SPI_RX
,
211 .flags
= IORESOURCE_IRQ
,
215 .start
= INT_1510_SPI_TX
,
216 .flags
= IORESOURCE_IRQ
,
220 .start
= OMAP_DMA_MCBSP2_RX
,
221 .flags
= IORESOURCE_DMA
,
225 .start
= OMAP_DMA_MCBSP2_TX
,
226 .flags
= IORESOURCE_DMA
,
231 .start
= OMAP1510_MCBSP3_BASE
,
232 .end
= OMAP1510_MCBSP3_BASE
+ SZ_256
,
233 .flags
= IORESOURCE_MEM
,
237 .start
= INT_McBSP3RX
,
238 .flags
= IORESOURCE_IRQ
,
242 .start
= INT_McBSP3TX
,
243 .flags
= IORESOURCE_IRQ
,
247 .start
= OMAP_DMA_MCBSP3_RX
,
248 .flags
= IORESOURCE_DMA
,
252 .start
= OMAP_DMA_MCBSP3_TX
,
253 .flags
= IORESOURCE_DMA
,
258 #define omap15xx_mcbsp_res_0 omap15xx_mcbsp_res[0]
260 static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata
[] = {
262 .ops
= &omap1_mcbsp_ops
,
265 .ops
= &omap1_mcbsp_ops
,
268 .ops
= &omap1_mcbsp_ops
,
271 #define OMAP15XX_MCBSP_RES_SZ ARRAY_SIZE(omap15xx_mcbsp_res[1])
272 #define OMAP15XX_MCBSP_COUNT ARRAY_SIZE(omap15xx_mcbsp_res)
274 #define omap15xx_mcbsp_res_0 NULL
275 #define omap15xx_mcbsp_pdata NULL
276 #define OMAP15XX_MCBSP_RES_SZ 0
277 #define OMAP15XX_MCBSP_COUNT 0
280 #ifdef CONFIG_ARCH_OMAP16XX
281 struct resource omap16xx_mcbsp_res
[][6] = {
284 .start
= OMAP1610_MCBSP1_BASE
,
285 .end
= OMAP1610_MCBSP1_BASE
+ SZ_256
,
286 .flags
= IORESOURCE_MEM
,
290 .start
= INT_McBSP1RX
,
291 .flags
= IORESOURCE_IRQ
,
295 .start
= INT_McBSP1TX
,
296 .flags
= IORESOURCE_IRQ
,
300 .start
= OMAP_DMA_MCBSP1_RX
,
301 .flags
= IORESOURCE_DMA
,
305 .start
= OMAP_DMA_MCBSP1_TX
,
306 .flags
= IORESOURCE_DMA
,
311 .start
= OMAP1610_MCBSP2_BASE
,
312 .end
= OMAP1610_MCBSP2_BASE
+ SZ_256
,
313 .flags
= IORESOURCE_MEM
,
317 .start
= INT_1610_McBSP2_RX
,
318 .flags
= IORESOURCE_IRQ
,
322 .start
= INT_1610_McBSP2_TX
,
323 .flags
= IORESOURCE_IRQ
,
327 .start
= OMAP_DMA_MCBSP2_RX
,
328 .flags
= IORESOURCE_DMA
,
332 .start
= OMAP_DMA_MCBSP2_TX
,
333 .flags
= IORESOURCE_DMA
,
338 .start
= OMAP1610_MCBSP3_BASE
,
339 .end
= OMAP1610_MCBSP3_BASE
+ SZ_256
,
340 .flags
= IORESOURCE_MEM
,
344 .start
= INT_McBSP3RX
,
345 .flags
= IORESOURCE_IRQ
,
349 .start
= INT_McBSP3TX
,
350 .flags
= IORESOURCE_IRQ
,
354 .start
= OMAP_DMA_MCBSP3_RX
,
355 .flags
= IORESOURCE_DMA
,
359 .start
= OMAP_DMA_MCBSP3_TX
,
360 .flags
= IORESOURCE_DMA
,
365 #define omap16xx_mcbsp_res_0 omap16xx_mcbsp_res[0]
367 static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata
[] = {
369 .ops
= &omap1_mcbsp_ops
,
372 .ops
= &omap1_mcbsp_ops
,
375 .ops
= &omap1_mcbsp_ops
,
378 #define OMAP16XX_MCBSP_RES_SZ ARRAY_SIZE(omap16xx_mcbsp_res[1])
379 #define OMAP16XX_MCBSP_COUNT ARRAY_SIZE(omap16xx_mcbsp_res)
381 #define omap16xx_mcbsp_res_0 NULL
382 #define omap16xx_mcbsp_pdata NULL
383 #define OMAP16XX_MCBSP_RES_SZ 0
384 #define OMAP16XX_MCBSP_COUNT 0
387 static void omap_mcbsp_register_board_cfg(struct resource
*res
, int res_count
,
388 struct omap_mcbsp_platform_data
*config
, int size
)
392 omap_mcbsp_devices
= kzalloc(size
* sizeof(struct platform_device
*),
394 if (!omap_mcbsp_devices
) {
395 printk(KERN_ERR
"Could not register McBSP devices\n");
399 for (i
= 0; i
< size
; i
++) {
400 struct platform_device
*new_mcbsp
;
403 new_mcbsp
= platform_device_alloc("omap-mcbsp", i
+ 1);
406 platform_device_add_resources(new_mcbsp
, &res
[i
* res_count
],
408 config
[i
].reg_size
= 2;
409 config
[i
].reg_step
= 2;
410 new_mcbsp
->dev
.platform_data
= &config
[i
];
411 ret
= platform_device_add(new_mcbsp
);
413 platform_device_put(new_mcbsp
);
416 omap_mcbsp_devices
[i
] = new_mcbsp
;
420 static int __init
omap1_mcbsp_init(void)
422 if (!cpu_class_is_omap1())
425 if (cpu_is_omap7xx())
426 omap_mcbsp_register_board_cfg(omap7xx_mcbsp_res_0
,
427 OMAP7XX_MCBSP_RES_SZ
,
429 OMAP7XX_MCBSP_COUNT
);
431 if (cpu_is_omap15xx())
432 omap_mcbsp_register_board_cfg(omap15xx_mcbsp_res_0
,
433 OMAP15XX_MCBSP_RES_SZ
,
434 omap15xx_mcbsp_pdata
,
435 OMAP15XX_MCBSP_COUNT
);
437 if (cpu_is_omap16xx())
438 omap_mcbsp_register_board_cfg(omap16xx_mcbsp_res_0
,
439 OMAP16XX_MCBSP_RES_SZ
,
440 omap16xx_mcbsp_pdata
,
441 OMAP16XX_MCBSP_COUNT
);
446 arch_initcall(omap1_mcbsp_init
);