arch/powerpc/mm/mmu_decl.h

   1 /*
   2  * Declarations of procedures and variables shared between files
   3  * in arch/ppc/mm/.
   4  *
   5  *  Derived from arch/ppc/mm/init.c:
   6  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
   7  *
   8  *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
   9  *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
  10  *    Copyright (C) 1996 Paul Mackerras
  11  *
  12  *  Derived from "arch/i386/mm/init.c"
  13  *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
  14  *
  15  *  This program is free software; you can redistribute it and/or
  16  *  modify it under the terms of the GNU General Public License
  17  *  as published by the Free Software Foundation; either version
  18  *  2 of the License, or (at your option) any later version.
  19  *
  20  */
  21 #include <linux/mm.h>
  22 #include <asm/tlbflush.h>
  23 #include <asm/mmu.h>
  24
  25 #ifdef CONFIG_PPC_MMU_NOHASH
  26
  27 /*
  28  * On 40x and 8xx, we directly inline tlbia and tlbivax
  29  */
  30 #if defined(CONFIG_40x) || defined(CONFIG_PPC_8xx)
  31 static inline void _tlbil_all(void)
  32 {
  33         asm volatile ("sync; tlbia; isync" : : : "memory");
  34 }
  35 static inline void _tlbil_pid(unsigned int pid)
  36 {
  37         asm volatile ("sync; tlbia; isync" : : : "memory");
  38 }
  39 #define _tlbil_pid_noind(pid)   _tlbil_pid(pid)
  40
  41 #else /* CONFIG_40x || CONFIG_PPC_8xx */
  42 extern void _tlbil_all(void);
  43 extern void _tlbil_pid(unsigned int pid);
  44 #ifdef CONFIG_PPC_BOOK3E
  45 extern void _tlbil_pid_noind(unsigned int pid);
  46 #else
  47 #define _tlbil_pid_noind(pid)   _tlbil_pid(pid)
  48 #endif
  49 #endif /* !(CONFIG_40x || CONFIG_PPC_8xx) */
  50
  51 /*
  52  * On 8xx, we directly inline tlbie, on others, it's extern
  53  */
  54 #ifdef CONFIG_PPC_8xx
  55 static inline void _tlbil_va(unsigned long address, unsigned int pid,
  56                              unsigned int tsize, unsigned int ind)
  57 {
  58         asm volatile ("tlbie %0; sync" : : "r" (address) : "memory");
  59 }
  60 #elif defined(CONFIG_PPC_BOOK3E)
  61 extern void _tlbil_va(unsigned long address, unsigned int pid,
  62                       unsigned int tsize, unsigned int ind);
  63 #else
  64 extern void __tlbil_va(unsigned long address, unsigned int pid);
  65 static inline void _tlbil_va(unsigned long address, unsigned int pid,
  66                              unsigned int tsize, unsigned int ind)
  67 {
  68         __tlbil_va(address, pid);
  69 }
  70 #endif /* CONFIG_PPC_8xx */
  71
  72 #if defined(CONFIG_PPC_BOOK3E) || defined(CONFIG_PPC_47x)
  73 extern void _tlbivax_bcast(unsigned long address, unsigned int pid,
  74                            unsigned int tsize, unsigned int ind);
  75 #else
  76 static inline void _tlbivax_bcast(unsigned long address, unsigned int pid,
  77                                    unsigned int tsize, unsigned int ind)
  78 {
  79         BUG();
  80 }
  81 #endif
  82
  83 #else /* CONFIG_PPC_MMU_NOHASH */
  84
  85 extern void hash_preload(struct mm_struct *mm, unsigned long ea,
  86                          unsigned long access, unsigned long trap);
  87
  88
  89 extern void _tlbie(unsigned long address);
  90 extern void _tlbia(void);
  91
  92 #endif /* CONFIG_PPC_MMU_NOHASH */
  93
  94 #ifdef CONFIG_PPC32
  95
  96 extern void mapin_ram(void);
  97 extern void setbat(int index, unsigned long virt, phys_addr_t phys,
  98                    unsigned int size, pgprot_t prot);
  99
 100 extern int __map_without_bats;
 101 extern int __allow_ioremap_reserved;
 102 extern unsigned int rtas_data, rtas_size;
 103
 104 struct hash_pte;
 105 extern struct hash_pte *Hash, *Hash_end;
 106 extern unsigned long Hash_size, Hash_mask;
 107
 108 #endif /* CONFIG_PPC32 */
 109
 110 extern unsigned long ioremap_bot;
 111 extern unsigned long __max_low_memory;
 112 extern phys_addr_t __initial_memory_limit_addr;
 113 extern phys_addr_t total_memory;
 114 extern phys_addr_t total_lowmem;
 115 extern phys_addr_t memstart_addr;
 116 extern phys_addr_t lowmem_end_addr;
 117
 118 #ifdef CONFIG_WII
 119 extern unsigned long wii_hole_start;
 120 extern unsigned long wii_hole_size;
 121
 122 extern unsigned long wii_mmu_mapin_mem2(unsigned long top);
 123 extern void wii_memory_fixups(void);
 124 #endif
 125
 126 /* ...and now those things that may be slightly different between processor
 127  * architectures.  -- Dan
 128  */
 129 #ifdef CONFIG_PPC32
 130 extern void MMU_init_hw(void);
 131 extern unsigned long mmu_mapin_ram(unsigned long top);
 132 #endif
 133
 134 #ifdef CONFIG_PPC_FSL_BOOK3E
 135 extern unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx,
 136                                      bool dryrun);
 137 extern unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
 138                                  phys_addr_t phys);
 139 #ifdef CONFIG_PPC32
 140 extern void adjust_total_lowmem(void);
 141 extern int switch_to_as1(void);
 142 extern void restore_to_as0(int esel, int offset, void *dt_ptr, int bootcpu);
 143 #endif
 144 extern void loadcam_entry(unsigned int index);
 145 extern void loadcam_multi(int first_idx, int num, int tmp_idx);
 146
 147 struct tlbcam {
 148         u32     MAS0;
 149         u32     MAS1;
 150         unsigned long   MAS2;
 151         u32     MAS3;
 152         u32     MAS7;
 153 };
 154 #endif
 155
 156 #if defined(CONFIG_6xx) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx)
 157 /* 6xx have BATS */
 158 /* FSL_BOOKE have TLBCAM */
 159 /* 8xx have LTLB */
 160 phys_addr_t v_block_mapped(unsigned long va);
 161 unsigned long p_block_mapped(phys_addr_t pa);
 162 #else
 163 static inline phys_addr_t v_block_mapped(unsigned long va) { return 0; }
 164 static inline unsigned long p_block_mapped(phys_addr_t pa) { return 0; }
 165 #endif