Linux 2.6.31.6
[linux/fpc-iii.git] / arch / arm / plat-mxc / clock.c
blob92e13566cd4f56f321eca6c8df50f33f4a2c9c7d
1 /*
2 * Based on arch/arm/plat-omap/clock.c
4 * Copyright (C) 2004 - 2005 Nokia corporation
5 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
6 * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
7 * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
8 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
22 * MA 02110-1301, USA.
25 /* #define DEBUG */
27 #include <linux/clk.h>
28 #include <linux/err.h>
29 #include <linux/errno.h>
30 #include <linux/init.h>
31 #include <linux/io.h>
32 #include <linux/kernel.h>
33 #include <linux/list.h>
34 #include <linux/module.h>
35 #include <linux/mutex.h>
36 #include <linux/platform_device.h>
37 #include <linux/proc_fs.h>
38 #include <linux/semaphore.h>
39 #include <linux/string.h>
41 #include <mach/clock.h>
43 static LIST_HEAD(clocks);
44 static DEFINE_MUTEX(clocks_mutex);
46 /*-------------------------------------------------------------------------
47 * Standard clock functions defined in include/linux/clk.h
48 *-------------------------------------------------------------------------*/
51 * All the code inside #ifndef CONFIG_COMMON_CLKDEV can be removed once all
52 * MXC architectures have switched to using clkdev.
54 #ifndef CONFIG_COMMON_CLKDEV
56 * Retrieve a clock by name.
58 * Note that we first try to use device id on the bus
59 * and clock name. If this fails, we try to use "<name>.<id>". If this fails,
60 * we try to use clock name only.
61 * The reference count to the clock's module owner ref count is incremented.
63 struct clk *clk_get(struct device *dev, const char *id)
65 struct clk *p, *clk = ERR_PTR(-ENOENT);
66 int idno;
67 const char *str;
69 if (id == NULL)
70 return clk;
72 if (dev == NULL || dev->bus != &platform_bus_type)
73 idno = -1;
74 else
75 idno = to_platform_device(dev)->id;
77 mutex_lock(&clocks_mutex);
79 list_for_each_entry(p, &clocks, node) {
80 if (p->id == idno &&
81 strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
82 clk = p;
83 goto found;
87 str = strrchr(id, '.');
88 if (str) {
89 int cnt = str - id;
90 str++;
91 idno = simple_strtol(str, NULL, 10);
92 list_for_each_entry(p, &clocks, node) {
93 if (p->id == idno &&
94 strlen(p->name) == cnt &&
95 strncmp(id, p->name, cnt) == 0 &&
96 try_module_get(p->owner)) {
97 clk = p;
98 goto found;
103 list_for_each_entry(p, &clocks, node) {
104 if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
105 clk = p;
106 goto found;
110 printk(KERN_WARNING "clk: Unable to get requested clock: %s\n", id);
112 found:
113 mutex_unlock(&clocks_mutex);
115 return clk;
117 EXPORT_SYMBOL(clk_get);
118 #endif
120 static void __clk_disable(struct clk *clk)
122 if (clk == NULL || IS_ERR(clk))
123 return;
125 __clk_disable(clk->parent);
126 __clk_disable(clk->secondary);
128 if (!(--clk->usecount) && clk->disable)
129 clk->disable(clk);
132 static int __clk_enable(struct clk *clk)
134 if (clk == NULL || IS_ERR(clk))
135 return -EINVAL;
137 __clk_enable(clk->parent);
138 __clk_enable(clk->secondary);
140 if (clk->usecount++ == 0 && clk->enable)
141 clk->enable(clk);
143 return 0;
146 /* This function increments the reference count on the clock and enables the
147 * clock if not already enabled. The parent clock tree is recursively enabled
149 int clk_enable(struct clk *clk)
151 int ret = 0;
153 if (clk == NULL || IS_ERR(clk))
154 return -EINVAL;
156 mutex_lock(&clocks_mutex);
157 ret = __clk_enable(clk);
158 mutex_unlock(&clocks_mutex);
160 return ret;
162 EXPORT_SYMBOL(clk_enable);
164 /* This function decrements the reference count on the clock and disables
165 * the clock when reference count is 0. The parent clock tree is
166 * recursively disabled
168 void clk_disable(struct clk *clk)
170 if (clk == NULL || IS_ERR(clk))
171 return;
173 mutex_lock(&clocks_mutex);
174 __clk_disable(clk);
175 mutex_unlock(&clocks_mutex);
177 EXPORT_SYMBOL(clk_disable);
179 /* Retrieve the *current* clock rate. If the clock itself
180 * does not provide a special calculation routine, ask
181 * its parent and so on, until one is able to return
182 * a valid clock rate
184 unsigned long clk_get_rate(struct clk *clk)
186 if (clk == NULL || IS_ERR(clk))
187 return 0UL;
189 if (clk->get_rate)
190 return clk->get_rate(clk);
192 return clk_get_rate(clk->parent);
194 EXPORT_SYMBOL(clk_get_rate);
196 #ifndef CONFIG_COMMON_CLKDEV
197 /* Decrement the clock's module reference count */
198 void clk_put(struct clk *clk)
200 if (clk && !IS_ERR(clk))
201 module_put(clk->owner);
203 EXPORT_SYMBOL(clk_put);
204 #endif
206 /* Round the requested clock rate to the nearest supported
207 * rate that is less than or equal to the requested rate.
208 * This is dependent on the clock's current parent.
210 long clk_round_rate(struct clk *clk, unsigned long rate)
212 if (clk == NULL || IS_ERR(clk) || !clk->round_rate)
213 return 0;
215 return clk->round_rate(clk, rate);
217 EXPORT_SYMBOL(clk_round_rate);
219 /* Set the clock to the requested clock rate. The rate must
220 * match a supported rate exactly based on what clk_round_rate returns
222 int clk_set_rate(struct clk *clk, unsigned long rate)
224 int ret = -EINVAL;
226 if (clk == NULL || IS_ERR(clk) || clk->set_rate == NULL || rate == 0)
227 return ret;
229 mutex_lock(&clocks_mutex);
230 ret = clk->set_rate(clk, rate);
231 mutex_unlock(&clocks_mutex);
233 return ret;
235 EXPORT_SYMBOL(clk_set_rate);
237 /* Set the clock's parent to another clock source */
238 int clk_set_parent(struct clk *clk, struct clk *parent)
240 int ret = -EINVAL;
242 if (clk == NULL || IS_ERR(clk) || parent == NULL ||
243 IS_ERR(parent) || clk->set_parent == NULL)
244 return ret;
246 mutex_lock(&clocks_mutex);
247 ret = clk->set_parent(clk, parent);
248 if (ret == 0)
249 clk->parent = parent;
250 mutex_unlock(&clocks_mutex);
252 return ret;
254 EXPORT_SYMBOL(clk_set_parent);
256 /* Retrieve the clock's parent clock source */
257 struct clk *clk_get_parent(struct clk *clk)
259 struct clk *ret = NULL;
261 if (clk == NULL || IS_ERR(clk))
262 return ret;
264 return clk->parent;
266 EXPORT_SYMBOL(clk_get_parent);
268 #ifndef CONFIG_COMMON_CLKDEV
270 * Add a new clock to the clock tree.
272 int clk_register(struct clk *clk)
274 if (clk == NULL || IS_ERR(clk))
275 return -EINVAL;
277 mutex_lock(&clocks_mutex);
278 list_add(&clk->node, &clocks);
279 mutex_unlock(&clocks_mutex);
281 return 0;
283 EXPORT_SYMBOL(clk_register);
285 /* Remove a clock from the clock tree */
286 void clk_unregister(struct clk *clk)
288 if (clk == NULL || IS_ERR(clk))
289 return;
291 mutex_lock(&clocks_mutex);
292 list_del(&clk->node);
293 mutex_unlock(&clocks_mutex);
295 EXPORT_SYMBOL(clk_unregister);
297 #ifdef CONFIG_PROC_FS
298 static int mxc_clock_read_proc(char *page, char **start, off_t off,
299 int count, int *eof, void *data)
301 struct clk *clkp;
302 char *p = page;
303 int len;
305 list_for_each_entry(clkp, &clocks, node) {
306 p += sprintf(p, "%s-%d:\t\t%lu, %d", clkp->name, clkp->id,
307 clk_get_rate(clkp), clkp->usecount);
308 if (clkp->parent)
309 p += sprintf(p, ", %s-%d\n", clkp->parent->name,
310 clkp->parent->id);
311 else
312 p += sprintf(p, "\n");
315 len = (p - page) - off;
316 if (len < 0)
317 len = 0;
319 *eof = (len <= count) ? 1 : 0;
320 *start = page + off;
322 return len;
325 static int __init mxc_setup_proc_entry(void)
327 struct proc_dir_entry *res;
329 res = create_proc_read_entry("cpu/clocks", 0, NULL,
330 mxc_clock_read_proc, NULL);
331 if (!res) {
332 printk(KERN_ERR "Failed to create proc/cpu/clocks\n");
333 return -ENOMEM;
335 return 0;
338 late_initcall(mxc_setup_proc_entry);
339 #endif /* CONFIG_PROC_FS */
340 #endif
343 * Get the resulting clock rate from a PLL register value and the input
344 * frequency. PLLs with this register layout can at least be found on
345 * MX1, MX21, MX27 and MX31
347 * mfi + mfn / (mfd + 1)
348 * f = 2 * f_ref * --------------------
349 * pd + 1
351 unsigned long mxc_decode_pll(unsigned int reg_val, u32 freq)
353 long long ll;
354 int mfn_abs;
355 unsigned int mfi, mfn, mfd, pd;
357 mfi = (reg_val >> 10) & 0xf;
358 mfn = reg_val & 0x3ff;
359 mfd = (reg_val >> 16) & 0x3ff;
360 pd = (reg_val >> 26) & 0xf;
362 mfi = mfi <= 5 ? 5 : mfi;
364 mfn_abs = mfn;
366 #if !defined CONFIG_ARCH_MX1 && !defined CONFIG_ARCH_MX21
367 if (mfn >= 0x200) {
368 mfn |= 0xFFFFFE00;
369 mfn_abs = -mfn;
371 #endif
373 freq *= 2;
374 freq /= pd + 1;
376 ll = (unsigned long long)freq * mfn_abs;
378 do_div(ll, mfd + 1);
379 if (mfn < 0)
380 ll = -ll;
381 ll = (freq * mfi) + ll;
383 return ll;