drivers/isdn/hisax/w6692.h

   1 /* $Id: w6692.h,v 1.4.2.2 2004/01/12 22:52:29 keil Exp $
   2  *
   3  * Winbond W6692 specific defines
   4  *
   5  * Author       Petr Novak
   6  * Copyright    by Petr Novak        <petr.novak@i.cz>
   7  *
   8  * This software may be used and distributed according to the terms
   9  * of the GNU General Public License, incorporated herein by reference.
  10  *
  11  */
  12
  13 /* map W6692 functions to ISAC functions */
  14 #define readW6692       readisac
  15 #define writeW6692      writeisac
  16 #define readW6692fifo   readisacfifo
  17 #define writeW6692fifo  writeisacfifo
  18
  19 /* B-channel FIFO read/write routines */
  20
  21 #define READW6692BFIFO(cs, bchan, ptr, count)                           \
  22         insb(cs->hw.w6692.iobase + W_B_RFIFO + (bchan ? 0x40 : 0), ptr, count)
  23
  24 #define WRITEW6692BFIFO(cs, bchan, ptr, count)                          \
  25         outsb(cs->hw.w6692.iobase + W_B_XFIFO + (bchan ? 0x40 : 0), ptr, count)
  26
  27 /* Specifications of W6692 registers */
  28
  29 #define W_D_RFIFO       0x00    /* R */
  30 #define W_D_XFIFO       0x04    /* W */
  31 #define W_D_CMDR        0x08    /* W */
  32 #define W_D_MODE        0x0c    /* R/W */
  33 #define W_D_TIMR        0x10    /* R/W */
  34 #define W_ISTA          0x14    /* R_clr */
  35 #define W_IMASK         0x18    /* R/W */
  36 #define W_D_EXIR        0x1c    /* R_clr */
  37 #define W_D_EXIM        0x20    /* R/W */
  38 #define W_D_STAR        0x24    /* R */
  39 #define W_D_RSTA        0x28    /* R */
  40 #define W_D_SAM         0x2c    /* R/W */
  41 #define W_D_SAP1        0x30    /* R/W */
  42 #define W_D_SAP2        0x34    /* R/W */
  43 #define W_D_TAM         0x38    /* R/W */
  44 #define W_D_TEI1        0x3c    /* R/W */
  45 #define W_D_TEI2        0x40    /* R/W */
  46 #define W_D_RBCH        0x44    /* R */
  47 #define W_D_RBCL        0x48    /* R */
  48 #define W_TIMR2         0x4c    /* W */
  49 #define W_L1_RC         0x50    /* R/W */
  50 #define W_D_CTL         0x54    /* R/W */
  51 #define W_CIR           0x58    /* R */
  52 #define W_CIX           0x5c    /* W */
  53 #define W_SQR           0x60    /* R */
  54 #define W_SQX           0x64    /* W */
  55 #define W_PCTL          0x68    /* R/W */
  56 #define W_MOR           0x6c    /* R */
  57 #define W_MOX           0x70    /* R/W */
  58 #define W_MOSR          0x74    /* R_clr */
  59 #define W_MOCR          0x78    /* R/W */
  60 #define W_GCR           0x7c    /* R/W */
  61
  62 #define W_B_RFIFO       0x80    /* R */
  63 #define W_B_XFIFO       0x84    /* W */
  64 #define W_B_CMDR        0x88    /* W */
  65 #define W_B_MODE        0x8c    /* R/W */
  66 #define W_B_EXIR        0x90    /* R_clr */
  67 #define W_B_EXIM        0x94    /* R/W */
  68 #define W_B_STAR        0x98    /* R */
  69 #define W_B_ADM1        0x9c    /* R/W */
  70 #define W_B_ADM2        0xa0    /* R/W */
  71 #define W_B_ADR1        0xa4    /* R/W */
  72 #define W_B_ADR2        0xa8    /* R/W */
  73 #define W_B_RBCL        0xac    /* R */
  74 #define W_B_RBCH        0xb0    /* R */
  75
  76 #define W_XADDR         0xf4    /* R/W */
  77 #define W_XDATA         0xf8    /* R/W */
  78 #define W_EPCTL         0xfc    /* W */
  79
  80 /* W6692 register bits */
  81
  82 #define W_D_CMDR_XRST   0x01
  83 #define W_D_CMDR_XME    0x02
  84 #define W_D_CMDR_XMS    0x08
  85 #define W_D_CMDR_STT    0x10
  86 #define W_D_CMDR_RRST   0x40
  87 #define W_D_CMDR_RACK   0x80
  88
  89 #define W_D_MODE_RLP    0x01
  90 #define W_D_MODE_DLP    0x02
  91 #define W_D_MODE_MFD    0x04
  92 #define W_D_MODE_TEE    0x08
  93 #define W_D_MODE_TMS    0x10
  94 #define W_D_MODE_RACT   0x40
  95 #define W_D_MODE_MMS    0x80
  96
  97 #define W_INT_B2_EXI    0x01
  98 #define W_INT_B1_EXI    0x02
  99 #define W_INT_D_EXI     0x04
 100 #define W_INT_XINT0     0x08
 101 #define W_INT_XINT1     0x10
 102 #define W_INT_D_XFR     0x20
 103 #define W_INT_D_RME     0x40
 104 #define W_INT_D_RMR     0x80
 105
 106 #define W_D_EXI_WEXP    0x01
 107 #define W_D_EXI_TEXP    0x02
 108 #define W_D_EXI_ISC     0x04
 109 #define W_D_EXI_MOC     0x08
 110 #define W_D_EXI_TIN2    0x10
 111 #define W_D_EXI_XCOL    0x20
 112 #define W_D_EXI_XDUN    0x40
 113 #define W_D_EXI_RDOV    0x80
 114
 115 #define W_D_STAR_DRDY   0x10
 116 #define W_D_STAR_XBZ    0x20
 117 #define W_D_STAR_XDOW   0x80
 118
 119 #define W_D_RSTA_RMB    0x10
 120 #define W_D_RSTA_CRCE   0x20
 121 #define W_D_RSTA_RDOV   0x40
 122
 123 #define W_D_CTL_SRST    0x20
 124
 125 #define W_CIR_SCC       0x80
 126 #define W_CIR_ICC       0x40
 127 #define W_CIR_COD_MASK  0x0f
 128
 129 #define W_B_CMDR_XRST   0x01
 130 #define W_B_CMDR_XME    0x02
 131 #define W_B_CMDR_XMS    0x04
 132 #define W_B_CMDR_RACT   0x20
 133 #define W_B_CMDR_RRST   0x40
 134 #define W_B_CMDR_RACK   0x80
 135
 136 #define W_B_MODE_FTS0   0x01
 137 #define W_B_MODE_FTS1   0x02
 138 #define W_B_MODE_SW56   0x04
 139 #define W_B_MODE_BSW0   0x08
 140 #define W_B_MODE_BSW1   0x10
 141 #define W_B_MODE_EPCM   0x20
 142 #define W_B_MODE_ITF    0x40
 143 #define W_B_MODE_MMS    0x80
 144
 145 #define W_B_EXI_XDUN    0x01
 146 #define W_B_EXI_XFR     0x02
 147 #define W_B_EXI_RDOV    0x10
 148 #define W_B_EXI_RME     0x20
 149 #define W_B_EXI_RMR     0x40
 150
 151 #define W_B_STAR_XBZ    0x01
 152 #define W_B_STAR_XDOW   0x04
 153 #define W_B_STAR_RMB    0x10
 154 #define W_B_STAR_CRCE   0x20
 155 #define W_B_STAR_RDOV   0x40
 156
 157 #define W_B_RBCH_LOV    0x20
 158
 159 /* W6692 Layer1 commands */
 160
 161 #define W_L1CMD_ECK     0x00
 162 #define W_L1CMD_RST     0x01
 163 #define W_L1CMD_SCP     0x04
 164 #define W_L1CMD_SSP     0x02
 165 #define W_L1CMD_AR8     0x08
 166 #define W_L1CMD_AR10    0x09
 167 #define W_L1CMD_EAL     0x0a
 168 #define W_L1CMD_DRC     0x0f
 169
 170 /* W6692 Layer1 indications */
 171
 172 #define W_L1IND_CE      0x07
 173 #define W_L1IND_DRD     0x00
 174 #define W_L1IND_LD      0x04
 175 #define W_L1IND_ARD     0x08
 176 #define W_L1IND_TI      0x0a
 177 #define W_L1IND_ATI     0x0b
 178 #define W_L1IND_AI8     0x0c
 179 #define W_L1IND_AI10    0x0d
 180 #define W_L1IND_CD      0x0f
 181
 182 /* FIFO thresholds */
 183 #define W_D_FIFO_THRESH 64
 184 #define W_B_FIFO_THRESH 64