drivers/mfd/mc13xxx-core.c

   1 /*
   2  * Copyright 2009-2010 Pengutronix
   3  * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
   4  *
   5  * loosely based on an earlier driver that has
   6  * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
   7  *
   8  * This program is free software; you can redistribute it and/or modify it under
   9  * the terms of the GNU General Public License version 2 as published by the
  10  * Free Software Foundation.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/of.h>
  15 #include <linux/of_device.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/mfd/core.h>
  18
  19 #include "mc13xxx.h"
  20
  21 #define MC13XXX_IRQSTAT0        0
  22 #define MC13XXX_IRQMASK0        1
  23 #define MC13XXX_IRQSTAT1        3
  24 #define MC13XXX_IRQMASK1        4
  25
  26 #define MC13XXX_REVISION        7
  27 #define MC13XXX_REVISION_REVMETAL       (0x07 <<  0)
  28 #define MC13XXX_REVISION_REVFULL        (0x03 <<  3)
  29 #define MC13XXX_REVISION_ICID           (0x07 <<  6)
  30 #define MC13XXX_REVISION_FIN            (0x03 <<  9)
  31 #define MC13XXX_REVISION_FAB            (0x03 << 11)
  32 #define MC13XXX_REVISION_ICIDCODE       (0x3f << 13)
  33
  34 #define MC34708_REVISION_REVMETAL       (0x07 <<  0)
  35 #define MC34708_REVISION_REVFULL        (0x07 <<  3)
  36 #define MC34708_REVISION_FIN            (0x07 <<  6)
  37 #define MC34708_REVISION_FAB            (0x07 <<  9)
  38
  39 #define MC13XXX_PWRCTRL         15
  40 #define MC13XXX_PWRCTRL_WDIRESET        (1 << 12)
  41
  42 #define MC13XXX_ADC1            44
  43 #define MC13XXX_ADC1_ADEN               (1 << 0)
  44 #define MC13XXX_ADC1_RAND               (1 << 1)
  45 #define MC13XXX_ADC1_ADSEL              (1 << 3)
  46 #define MC13XXX_ADC1_ASC                (1 << 20)
  47 #define MC13XXX_ADC1_ADTRIGIGN          (1 << 21)
  48
  49 #define MC13XXX_ADC2            45
  50
  51 void mc13xxx_lock(struct mc13xxx *mc13xxx)
  52 {
  53         if (!mutex_trylock(&mc13xxx->lock)) {
  54                 dev_dbg(mc13xxx->dev, "wait for %s from %ps\n",
  55                                 __func__, __builtin_return_address(0));
  56
  57                 mutex_lock(&mc13xxx->lock);
  58         }
  59         dev_dbg(mc13xxx->dev, "%s from %ps\n",
  60                         __func__, __builtin_return_address(0));
  61 }
  62 EXPORT_SYMBOL(mc13xxx_lock);
  63
  64 void mc13xxx_unlock(struct mc13xxx *mc13xxx)
  65 {
  66         dev_dbg(mc13xxx->dev, "%s from %ps\n",
  67                         __func__, __builtin_return_address(0));
  68         mutex_unlock(&mc13xxx->lock);
  69 }
  70 EXPORT_SYMBOL(mc13xxx_unlock);
  71
  72 int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val)
  73 {
  74         int ret;
  75
  76         ret = regmap_read(mc13xxx->regmap, offset, val);
  77         dev_vdbg(mc13xxx->dev, "[0x%02x] -> 0x%06x\n", offset, *val);
  78
  79         return ret;
  80 }
  81 EXPORT_SYMBOL(mc13xxx_reg_read);
  82
  83 int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val)
  84 {
  85         dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x\n", offset, val);
  86
  87         if (val >= BIT(24))
  88                 return -EINVAL;
  89
  90         return regmap_write(mc13xxx->regmap, offset, val);
  91 }
  92 EXPORT_SYMBOL(mc13xxx_reg_write);
  93
  94 int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset,
  95                 u32 mask, u32 val)
  96 {
  97         BUG_ON(val & ~mask);
  98         dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x (mask: 0x%06x)\n",
  99                         offset, val, mask);
 100
 101         return regmap_update_bits(mc13xxx->regmap, offset, mask, val);
 102 }
 103 EXPORT_SYMBOL(mc13xxx_reg_rmw);
 104
 105 int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq)
 106 {
 107         int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
 108
 109         disable_irq_nosync(virq);
 110
 111         return 0;
 112 }
 113 EXPORT_SYMBOL(mc13xxx_irq_mask);
 114
 115 int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq)
 116 {
 117         int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
 118
 119         enable_irq(virq);
 120
 121         return 0;
 122 }
 123 EXPORT_SYMBOL(mc13xxx_irq_unmask);
 124
 125 int mc13xxx_irq_status(struct mc13xxx *mc13xxx, int irq,
 126                 int *enabled, int *pending)
 127 {
 128         int ret;
 129         unsigned int offmask = irq < 24 ? MC13XXX_IRQMASK0 : MC13XXX_IRQMASK1;
 130         unsigned int offstat = irq < 24 ? MC13XXX_IRQSTAT0 : MC13XXX_IRQSTAT1;
 131         u32 irqbit = 1 << (irq < 24 ? irq : irq - 24);
 132
 133         if (irq < 0 || irq >= ARRAY_SIZE(mc13xxx->irqs))
 134                 return -EINVAL;
 135
 136         if (enabled) {
 137                 u32 mask;
 138
 139                 ret = mc13xxx_reg_read(mc13xxx, offmask, &mask);
 140                 if (ret)
 141                         return ret;
 142
 143                 *enabled = mask & irqbit;
 144         }
 145
 146         if (pending) {
 147                 u32 stat;
 148
 149                 ret = mc13xxx_reg_read(mc13xxx, offstat, &stat);
 150                 if (ret)
 151                         return ret;
 152
 153                 *pending = stat & irqbit;
 154         }
 155
 156         return 0;
 157 }
 158 EXPORT_SYMBOL(mc13xxx_irq_status);
 159
 160 int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq,
 161                 irq_handler_t handler, const char *name, void *dev)
 162 {
 163         int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
 164
 165         return devm_request_threaded_irq(mc13xxx->dev, virq, NULL, handler,
 166                                          IRQF_ONESHOT, name, dev);
 167 }
 168 EXPORT_SYMBOL(mc13xxx_irq_request);
 169
 170 int mc13xxx_irq_free(struct mc13xxx *mc13xxx, int irq, void *dev)
 171 {
 172         int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
 173
 174         devm_free_irq(mc13xxx->dev, virq, dev);
 175
 176         return 0;
 177 }
 178 EXPORT_SYMBOL(mc13xxx_irq_free);
 179
 180 #define maskval(reg, mask)      (((reg) & (mask)) >> __ffs(mask))
 181 static void mc13xxx_print_revision(struct mc13xxx *mc13xxx, u32 revision)
 182 {
 183         dev_info(mc13xxx->dev, "%s: rev: %d.%d, "
 184                         "fin: %d, fab: %d, icid: %d/%d\n",
 185                         mc13xxx->variant->name,
 186                         maskval(revision, MC13XXX_REVISION_REVFULL),
 187                         maskval(revision, MC13XXX_REVISION_REVMETAL),
 188                         maskval(revision, MC13XXX_REVISION_FIN),
 189                         maskval(revision, MC13XXX_REVISION_FAB),
 190                         maskval(revision, MC13XXX_REVISION_ICID),
 191                         maskval(revision, MC13XXX_REVISION_ICIDCODE));
 192 }
 193
 194 static void mc34708_print_revision(struct mc13xxx *mc13xxx, u32 revision)
 195 {
 196         dev_info(mc13xxx->dev, "%s: rev %d.%d, fin: %d, fab: %d\n",
 197                         mc13xxx->variant->name,
 198                         maskval(revision, MC34708_REVISION_REVFULL),
 199                         maskval(revision, MC34708_REVISION_REVMETAL),
 200                         maskval(revision, MC34708_REVISION_FIN),
 201                         maskval(revision, MC34708_REVISION_FAB));
 202 }
 203
 204 /* These are only exported for mc13xxx-i2c and mc13xxx-spi */
 205 struct mc13xxx_variant mc13xxx_variant_mc13783 = {
 206         .name = "mc13783",
 207         .print_revision = mc13xxx_print_revision,
 208 };
 209 EXPORT_SYMBOL_GPL(mc13xxx_variant_mc13783);
 210
 211 struct mc13xxx_variant mc13xxx_variant_mc13892 = {
 212         .name = "mc13892",
 213         .print_revision = mc13xxx_print_revision,
 214 };
 215 EXPORT_SYMBOL_GPL(mc13xxx_variant_mc13892);
 216
 217 struct mc13xxx_variant mc13xxx_variant_mc34708 = {
 218         .name = "mc34708",
 219         .print_revision = mc34708_print_revision,
 220 };
 221 EXPORT_SYMBOL_GPL(mc13xxx_variant_mc34708);
 222
 223 static const char *mc13xxx_get_chipname(struct mc13xxx *mc13xxx)
 224 {
 225         return mc13xxx->variant->name;
 226 }
 227
 228 int mc13xxx_get_flags(struct mc13xxx *mc13xxx)
 229 {
 230         return mc13xxx->flags;
 231 }
 232 EXPORT_SYMBOL(mc13xxx_get_flags);
 233
 234 #define MC13XXX_ADC1_CHAN0_SHIFT        5
 235 #define MC13XXX_ADC1_CHAN1_SHIFT        8
 236 #define MC13783_ADC1_ATO_SHIFT          11
 237 #define MC13783_ADC1_ATOX               (1 << 19)
 238
 239 struct mc13xxx_adcdone_data {
 240         struct mc13xxx *mc13xxx;
 241         struct completion done;
 242 };
 243
 244 static irqreturn_t mc13xxx_handler_adcdone(int irq, void *data)
 245 {
 246         struct mc13xxx_adcdone_data *adcdone_data = data;
 247
 248         complete_all(&adcdone_data->done);
 249
 250         return IRQ_HANDLED;
 251 }
 252
 253 #define MC13XXX_ADC_WORKING (1 << 0)
 254
 255 int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, unsigned int mode,
 256                 unsigned int channel, u8 ato, bool atox,
 257                 unsigned int *sample)
 258 {
 259         u32 adc0, adc1, old_adc0;
 260         int i, ret;
 261         struct mc13xxx_adcdone_data adcdone_data = {
 262                 .mc13xxx = mc13xxx,
 263         };
 264         init_completion(&adcdone_data.done);
 265
 266         dev_dbg(mc13xxx->dev, "%s\n", __func__);
 267
 268         mc13xxx_lock(mc13xxx);
 269
 270         if (mc13xxx->adcflags & MC13XXX_ADC_WORKING) {
 271                 ret = -EBUSY;
 272                 goto out;
 273         }
 274
 275         mc13xxx->adcflags |= MC13XXX_ADC_WORKING;
 276
 277         mc13xxx_reg_read(mc13xxx, MC13XXX_ADC0, &old_adc0);
 278
 279         adc0 = MC13XXX_ADC0_ADINC1 | MC13XXX_ADC0_ADINC2;
 280         adc1 = MC13XXX_ADC1_ADEN | MC13XXX_ADC1_ADTRIGIGN | MC13XXX_ADC1_ASC;
 281
 282         if (channel > 7)
 283                 adc1 |= MC13XXX_ADC1_ADSEL;
 284
 285         switch (mode) {
 286         case MC13XXX_ADC_MODE_TS:
 287                 adc0 |= MC13XXX_ADC0_ADREFEN | MC13XXX_ADC0_TSMOD0 |
 288                         MC13XXX_ADC0_TSMOD1;
 289                 adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT;
 290                 break;
 291
 292         case MC13XXX_ADC_MODE_SINGLE_CHAN:
 293                 adc0 |= old_adc0 & MC13XXX_ADC0_CONFIG_MASK;
 294                 adc1 |= (channel & 0x7) << MC13XXX_ADC1_CHAN0_SHIFT;
 295                 adc1 |= MC13XXX_ADC1_RAND;
 296                 break;
 297
 298         case MC13XXX_ADC_MODE_MULT_CHAN:
 299                 adc0 |= old_adc0 & MC13XXX_ADC0_CONFIG_MASK;
 300                 adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT;
 301                 break;
 302
 303         default:
 304                 mc13xxx_unlock(mc13xxx);
 305                 return -EINVAL;
 306         }
 307
 308         adc1 |= ato << MC13783_ADC1_ATO_SHIFT;
 309         if (atox)
 310                 adc1 |= MC13783_ADC1_ATOX;
 311
 312         dev_dbg(mc13xxx->dev, "%s: request irq\n", __func__);
 313         mc13xxx_irq_request(mc13xxx, MC13XXX_IRQ_ADCDONE,
 314                         mc13xxx_handler_adcdone, __func__, &adcdone_data);
 315
 316         mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, adc0);
 317         mc13xxx_reg_write(mc13xxx, MC13XXX_ADC1, adc1);
 318
 319         mc13xxx_unlock(mc13xxx);
 320
 321         ret = wait_for_completion_interruptible_timeout(&adcdone_data.done, HZ);
 322
 323         if (!ret)
 324                 ret = -ETIMEDOUT;
 325
 326         mc13xxx_lock(mc13xxx);
 327
 328         mc13xxx_irq_free(mc13xxx, MC13XXX_IRQ_ADCDONE, &adcdone_data);
 329
 330         if (ret > 0)
 331                 for (i = 0; i < 4; ++i) {
 332                         ret = mc13xxx_reg_read(mc13xxx,
 333                                         MC13XXX_ADC2, &sample[i]);
 334                         if (ret)
 335                                 break;
 336                 }
 337
 338         if (mode == MC13XXX_ADC_MODE_TS)
 339                 /* restore TSMOD */
 340                 mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, old_adc0);
 341
 342         mc13xxx->adcflags &= ~MC13XXX_ADC_WORKING;
 343 out:
 344         mc13xxx_unlock(mc13xxx);
 345
 346         return ret;
 347 }
 348 EXPORT_SYMBOL_GPL(mc13xxx_adc_do_conversion);
 349
 350 static int mc13xxx_add_subdevice_pdata(struct mc13xxx *mc13xxx,
 351                 const char *format, void *pdata, size_t pdata_size)
 352 {
 353         char buf[30];
 354         const char *name = mc13xxx_get_chipname(mc13xxx);
 355
 356         struct mfd_cell cell = {
 357                 .platform_data = pdata,
 358                 .pdata_size = pdata_size,
 359         };
 360
 361         /* there is no asnprintf in the kernel :-( */
 362         if (snprintf(buf, sizeof(buf), format, name) > sizeof(buf))
 363                 return -E2BIG;
 364
 365         cell.name = kmemdup(buf, strlen(buf) + 1, GFP_KERNEL);
 366         if (!cell.name)
 367                 return -ENOMEM;
 368
 369         return mfd_add_devices(mc13xxx->dev, -1, &cell, 1, NULL, 0,
 370                                regmap_irq_get_domain(mc13xxx->irq_data));
 371 }
 372
 373 static int mc13xxx_add_subdevice(struct mc13xxx *mc13xxx, const char *format)
 374 {
 375         return mc13xxx_add_subdevice_pdata(mc13xxx, format, NULL, 0);
 376 }
 377
 378 #ifdef CONFIG_OF
 379 static int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx)
 380 {
 381         struct device_node *np = mc13xxx->dev->of_node;
 382
 383         if (!np)
 384                 return -ENODEV;
 385
 386         if (of_property_read_bool(np, "fsl,mc13xxx-uses-adc"))
 387                 mc13xxx->flags |= MC13XXX_USE_ADC;
 388
 389         if (of_property_read_bool(np, "fsl,mc13xxx-uses-codec"))
 390                 mc13xxx->flags |= MC13XXX_USE_CODEC;
 391
 392         if (of_property_read_bool(np, "fsl,mc13xxx-uses-rtc"))
 393                 mc13xxx->flags |= MC13XXX_USE_RTC;
 394
 395         if (of_property_read_bool(np, "fsl,mc13xxx-uses-touch"))
 396                 mc13xxx->flags |= MC13XXX_USE_TOUCHSCREEN;
 397
 398         return 0;
 399 }
 400 #else
 401 static inline int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx)
 402 {
 403         return -ENODEV;
 404 }
 405 #endif
 406
 407 int mc13xxx_common_init(struct device *dev)
 408 {
 409         struct mc13xxx_platform_data *pdata = dev_get_platdata(dev);
 410         struct mc13xxx *mc13xxx = dev_get_drvdata(dev);
 411         u32 revision;
 412         int i, ret;
 413
 414         mc13xxx->dev = dev;
 415
 416         ret = mc13xxx_reg_read(mc13xxx, MC13XXX_REVISION, &revision);
 417         if (ret)
 418                 return ret;
 419
 420         mc13xxx->variant->print_revision(mc13xxx, revision);
 421
 422         ret = mc13xxx_reg_rmw(mc13xxx, MC13XXX_PWRCTRL,
 423                         MC13XXX_PWRCTRL_WDIRESET, MC13XXX_PWRCTRL_WDIRESET);
 424         if (ret)
 425                 return ret;
 426
 427         for (i = 0; i < ARRAY_SIZE(mc13xxx->irqs); i++) {
 428                 mc13xxx->irqs[i].reg_offset = i / MC13XXX_IRQ_PER_REG;
 429                 mc13xxx->irqs[i].mask = BIT(i % MC13XXX_IRQ_PER_REG);
 430         }
 431
 432         mc13xxx->irq_chip.name = dev_name(dev);
 433         mc13xxx->irq_chip.status_base = MC13XXX_IRQSTAT0;
 434         mc13xxx->irq_chip.mask_base = MC13XXX_IRQMASK0;
 435         mc13xxx->irq_chip.ack_base = MC13XXX_IRQSTAT0;
 436         mc13xxx->irq_chip.irq_reg_stride = MC13XXX_IRQSTAT1 - MC13XXX_IRQSTAT0;
 437         mc13xxx->irq_chip.init_ack_masked = true;
 438         mc13xxx->irq_chip.use_ack = true;
 439         mc13xxx->irq_chip.num_regs = MC13XXX_IRQ_REG_CNT;
 440         mc13xxx->irq_chip.irqs = mc13xxx->irqs;
 441         mc13xxx->irq_chip.num_irqs = ARRAY_SIZE(mc13xxx->irqs);
 442
 443         ret = regmap_add_irq_chip(mc13xxx->regmap, mc13xxx->irq, IRQF_ONESHOT,
 444                                   0, &mc13xxx->irq_chip, &mc13xxx->irq_data);
 445         if (ret)
 446                 return ret;
 447
 448         mutex_init(&mc13xxx->lock);
 449
 450         if (mc13xxx_probe_flags_dt(mc13xxx) < 0 && pdata)
 451                 mc13xxx->flags = pdata->flags;
 452
 453         if (pdata) {
 454                 mc13xxx_add_subdevice_pdata(mc13xxx, "%s-regulator",
 455                         &pdata->regulators, sizeof(pdata->regulators));
 456                 mc13xxx_add_subdevice_pdata(mc13xxx, "%s-led",
 457                                 pdata->leds, sizeof(*pdata->leds));
 458                 mc13xxx_add_subdevice_pdata(mc13xxx, "%s-pwrbutton",
 459                                 pdata->buttons, sizeof(*pdata->buttons));
 460                 if (mc13xxx->flags & MC13XXX_USE_CODEC)
 461                         mc13xxx_add_subdevice_pdata(mc13xxx, "%s-codec",
 462                                 pdata->codec, sizeof(*pdata->codec));
 463                 if (mc13xxx->flags & MC13XXX_USE_TOUCHSCREEN)
 464                         mc13xxx_add_subdevice_pdata(mc13xxx, "%s-ts",
 465                                 &pdata->touch, sizeof(pdata->touch));
 466         } else {
 467                 mc13xxx_add_subdevice(mc13xxx, "%s-regulator");
 468                 mc13xxx_add_subdevice(mc13xxx, "%s-led");
 469                 mc13xxx_add_subdevice(mc13xxx, "%s-pwrbutton");
 470                 if (mc13xxx->flags & MC13XXX_USE_CODEC)
 471                         mc13xxx_add_subdevice(mc13xxx, "%s-codec");
 472                 if (mc13xxx->flags & MC13XXX_USE_TOUCHSCREEN)
 473                         mc13xxx_add_subdevice(mc13xxx, "%s-ts");
 474         }
 475
 476         if (mc13xxx->flags & MC13XXX_USE_ADC)
 477                 mc13xxx_add_subdevice(mc13xxx, "%s-adc");
 478
 479         if (mc13xxx->flags & MC13XXX_USE_RTC)
 480                 mc13xxx_add_subdevice(mc13xxx, "%s-rtc");
 481
 482         return 0;
 483 }
 484 EXPORT_SYMBOL_GPL(mc13xxx_common_init);
 485
 486 int mc13xxx_common_exit(struct device *dev)
 487 {
 488         struct mc13xxx *mc13xxx = dev_get_drvdata(dev);
 489
 490         mfd_remove_devices(dev);
 491         regmap_del_irq_chip(mc13xxx->irq, mc13xxx->irq_data);
 492         mutex_destroy(&mc13xxx->lock);
 493
 494         return 0;
 495 }
 496 EXPORT_SYMBOL_GPL(mc13xxx_common_exit);
 497
 498 MODULE_DESCRIPTION("Core driver for Freescale MC13XXX PMIC");
 499 MODULE_AUTHOR("Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>");
 500 MODULE_LICENSE("GPL v2");