drivers/rtc/rtc-pm8xxx.c

   1 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  */
  12 #include <linux/of.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/rtc.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/pm.h>
  18 #include <linux/regmap.h>
  19 #include <linux/slab.h>
  20 #include <linux/spinlock.h>
  21
  22 /* RTC Register offsets from RTC CTRL REG */
  23 #define PM8XXX_ALARM_CTRL_OFFSET        0x01
  24 #define PM8XXX_RTC_WRITE_OFFSET         0x02
  25 #define PM8XXX_RTC_READ_OFFSET          0x06
  26 #define PM8XXX_ALARM_RW_OFFSET          0x0A
  27
  28 /* RTC_CTRL register bit fields */
  29 #define PM8xxx_RTC_ENABLE               BIT(7)
  30 #define PM8xxx_RTC_ALARM_ENABLE         BIT(1)
  31 #define PM8xxx_RTC_ALARM_CLEAR          BIT(0)
  32
  33 #define NUM_8_BIT_RTC_REGS              0x4
  34
  35 /**
  36  * struct pm8xxx_rtc -  rtc driver internal structure
  37  * @rtc:                rtc device for this driver.
  38  * @regmap:             regmap used to access RTC registers
  39  * @allow_set_time:     indicates whether writing to the RTC is allowed
  40  * @rtc_alarm_irq:      rtc alarm irq number.
  41  * @rtc_base:           address of rtc control register.
  42  * @rtc_read_base:      base address of read registers.
  43  * @rtc_write_base:     base address of write registers.
  44  * @alarm_rw_base:      base address of alarm registers.
  45  * @ctrl_reg:           rtc control register.
  46  * @rtc_dev:            device structure.
  47  * @ctrl_reg_lock:      spinlock protecting access to ctrl_reg.
  48  */
  49 struct pm8xxx_rtc {
  50         struct rtc_device *rtc;
  51         struct regmap *regmap;
  52         bool allow_set_time;
  53         int rtc_alarm_irq;
  54         int rtc_base;
  55         int rtc_read_base;
  56         int rtc_write_base;
  57         int alarm_rw_base;
  58         u8 ctrl_reg;
  59         struct device *rtc_dev;
  60         spinlock_t ctrl_reg_lock;
  61 };
  62
  63 /*
  64  * Steps to write the RTC registers.
  65  * 1. Disable alarm if enabled.
  66  * 2. Write 0x00 to LSB.
  67  * 3. Write Byte[1], Byte[2], Byte[3] then Byte[0].
  68  * 4. Enable alarm if disabled in step 1.
  69  */
  70 static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
  71 {
  72         int rc, i;
  73         unsigned long secs, irq_flags;
  74         u8 value[NUM_8_BIT_RTC_REGS], alarm_enabled = 0, ctrl_reg;
  75         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
  76
  77         if (!rtc_dd->allow_set_time)
  78                 return -EACCES;
  79
  80         rtc_tm_to_time(tm, &secs);
  81
  82         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
  83                 value[i] = secs & 0xFF;
  84                 secs >>= 8;
  85         }
  86
  87         dev_dbg(dev, "Seconds value to be written to RTC = %lu\n", secs);
  88
  89         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
  90         ctrl_reg = rtc_dd->ctrl_reg;
  91
  92         if (ctrl_reg & PM8xxx_RTC_ALARM_ENABLE) {
  93                 alarm_enabled = 1;
  94                 ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
  95                 rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
  96                 if (rc) {
  97                         dev_err(dev, "Write to RTC control register failed\n");
  98                         goto rtc_rw_fail;
  99                 }
 100                 rtc_dd->ctrl_reg = ctrl_reg;
 101         } else {
 102                 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 103         }
 104
 105         /* Write 0 to Byte[0] */
 106         rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_write_base, 0);
 107         if (rc) {
 108                 dev_err(dev, "Write to RTC write data register failed\n");
 109                 goto rtc_rw_fail;
 110         }
 111
 112         /* Write Byte[1], Byte[2], Byte[3] */
 113         rc = regmap_bulk_write(rtc_dd->regmap, rtc_dd->rtc_write_base + 1,
 114                                &value[1], sizeof(value) - 1);
 115         if (rc) {
 116                 dev_err(dev, "Write to RTC write data register failed\n");
 117                 goto rtc_rw_fail;
 118         }
 119
 120         /* Write Byte[0] */
 121         rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_write_base, value[0]);
 122         if (rc) {
 123                 dev_err(dev, "Write to RTC write data register failed\n");
 124                 goto rtc_rw_fail;
 125         }
 126
 127         if (alarm_enabled) {
 128                 ctrl_reg |= PM8xxx_RTC_ALARM_ENABLE;
 129                 rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
 130                 if (rc) {
 131                         dev_err(dev, "Write to RTC control register failed\n");
 132                         goto rtc_rw_fail;
 133                 }
 134                 rtc_dd->ctrl_reg = ctrl_reg;
 135         }
 136
 137 rtc_rw_fail:
 138         if (alarm_enabled)
 139                 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 140
 141         return rc;
 142 }
 143
 144 static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
 145 {
 146         int rc;
 147         u8 value[NUM_8_BIT_RTC_REGS];
 148         unsigned long secs;
 149         unsigned int reg;
 150         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 151
 152         rc = regmap_bulk_read(rtc_dd->regmap, rtc_dd->rtc_read_base,
 153                               value, sizeof(value));
 154         if (rc) {
 155                 dev_err(dev, "RTC read data register failed\n");
 156                 return rc;
 157         }
 158
 159         /*
 160          * Read the LSB again and check if there has been a carry over.
 161          * If there is, redo the read operation.
 162          */
 163         rc = regmap_read(rtc_dd->regmap, rtc_dd->rtc_read_base, &reg);
 164         if (rc < 0) {
 165                 dev_err(dev, "RTC read data register failed\n");
 166                 return rc;
 167         }
 168
 169         if (unlikely(reg < value[0])) {
 170                 rc = regmap_bulk_read(rtc_dd->regmap, rtc_dd->rtc_read_base,
 171                                       value, sizeof(value));
 172                 if (rc) {
 173                         dev_err(dev, "RTC read data register failed\n");
 174                         return rc;
 175                 }
 176         }
 177
 178         secs = value[0] | (value[1] << 8) | (value[2] << 16) | (value[3] << 24);
 179
 180         rtc_time_to_tm(secs, tm);
 181
 182         rc = rtc_valid_tm(tm);
 183         if (rc < 0) {
 184                 dev_err(dev, "Invalid time read from RTC\n");
 185                 return rc;
 186         }
 187
 188         dev_dbg(dev, "secs = %lu, h:m:s == %d:%d:%d, d/m/y = %d/%d/%d\n",
 189                 secs, tm->tm_hour, tm->tm_min, tm->tm_sec,
 190                 tm->tm_mday, tm->tm_mon, tm->tm_year);
 191
 192         return 0;
 193 }
 194
 195 static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
 196 {
 197         int rc, i;
 198         u8 value[NUM_8_BIT_RTC_REGS], ctrl_reg;
 199         unsigned long secs, irq_flags;
 200         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 201
 202         rtc_tm_to_time(&alarm->time, &secs);
 203
 204         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
 205                 value[i] = secs & 0xFF;
 206                 secs >>= 8;
 207         }
 208
 209         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 210
 211         rc = regmap_bulk_write(rtc_dd->regmap, rtc_dd->alarm_rw_base, value,
 212                                sizeof(value));
 213         if (rc) {
 214                 dev_err(dev, "Write to RTC ALARM register failed\n");
 215                 goto rtc_rw_fail;
 216         }
 217
 218         ctrl_reg = rtc_dd->ctrl_reg;
 219
 220         if (alarm->enabled)
 221                 ctrl_reg |= PM8xxx_RTC_ALARM_ENABLE;
 222         else
 223                 ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
 224
 225         rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
 226         if (rc) {
 227                 dev_err(dev, "Write to RTC control register failed\n");
 228                 goto rtc_rw_fail;
 229         }
 230
 231         rtc_dd->ctrl_reg = ctrl_reg;
 232
 233         dev_dbg(dev, "Alarm Set for h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
 234                 alarm->time.tm_hour, alarm->time.tm_min,
 235                 alarm->time.tm_sec, alarm->time.tm_mday,
 236                 alarm->time.tm_mon, alarm->time.tm_year);
 237 rtc_rw_fail:
 238         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 239         return rc;
 240 }
 241
 242 static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
 243 {
 244         int rc;
 245         u8 value[NUM_8_BIT_RTC_REGS];
 246         unsigned long secs;
 247         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 248
 249         rc = regmap_bulk_read(rtc_dd->regmap, rtc_dd->alarm_rw_base, value,
 250                               sizeof(value));
 251         if (rc) {
 252                 dev_err(dev, "RTC alarm time read failed\n");
 253                 return rc;
 254         }
 255
 256         secs = value[0] | (value[1] << 8) | (value[2] << 16) | (value[3] << 24);
 257
 258         rtc_time_to_tm(secs, &alarm->time);
 259
 260         rc = rtc_valid_tm(&alarm->time);
 261         if (rc < 0) {
 262                 dev_err(dev, "Invalid alarm time read from RTC\n");
 263                 return rc;
 264         }
 265
 266         dev_dbg(dev, "Alarm set for - h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
 267                 alarm->time.tm_hour, alarm->time.tm_min,
 268                 alarm->time.tm_sec, alarm->time.tm_mday,
 269                 alarm->time.tm_mon, alarm->time.tm_year);
 270
 271         return 0;
 272 }
 273
 274 static int pm8xxx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
 275 {
 276         int rc;
 277         unsigned long irq_flags;
 278         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 279         u8 ctrl_reg;
 280
 281         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 282
 283         ctrl_reg = rtc_dd->ctrl_reg;
 284
 285         if (enable)
 286                 ctrl_reg |= PM8xxx_RTC_ALARM_ENABLE;
 287         else
 288                 ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
 289
 290         rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
 291         if (rc) {
 292                 dev_err(dev, "Write to RTC control register failed\n");
 293                 goto rtc_rw_fail;
 294         }
 295
 296         rtc_dd->ctrl_reg = ctrl_reg;
 297
 298 rtc_rw_fail:
 299         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 300         return rc;
 301 }
 302
 303 static const struct rtc_class_ops pm8xxx_rtc_ops = {
 304         .read_time      = pm8xxx_rtc_read_time,
 305         .set_time       = pm8xxx_rtc_set_time,
 306         .set_alarm      = pm8xxx_rtc_set_alarm,
 307         .read_alarm     = pm8xxx_rtc_read_alarm,
 308         .alarm_irq_enable = pm8xxx_rtc_alarm_irq_enable,
 309 };
 310
 311 static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
 312 {
 313         struct pm8xxx_rtc *rtc_dd = dev_id;
 314         unsigned int ctrl_reg;
 315         int rc;
 316         unsigned long irq_flags;
 317
 318         rtc_update_irq(rtc_dd->rtc, 1, RTC_IRQF | RTC_AF);
 319
 320         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 321
 322         /* Clear the alarm enable bit */
 323         ctrl_reg = rtc_dd->ctrl_reg;
 324         ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
 325
 326         rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
 327         if (rc) {
 328                 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 329                 dev_err(rtc_dd->rtc_dev,
 330                         "Write to RTC control register failed\n");
 331                 goto rtc_alarm_handled;
 332         }
 333
 334         rtc_dd->ctrl_reg = ctrl_reg;
 335         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 336
 337         /* Clear RTC alarm register */
 338         rc = regmap_read(rtc_dd->regmap,
 339                          rtc_dd->rtc_base + PM8XXX_ALARM_CTRL_OFFSET,
 340                          &ctrl_reg);
 341         if (rc) {
 342                 dev_err(rtc_dd->rtc_dev,
 343                         "RTC Alarm control register read failed\n");
 344                 goto rtc_alarm_handled;
 345         }
 346
 347         ctrl_reg &= ~PM8xxx_RTC_ALARM_CLEAR;
 348         rc = regmap_write(rtc_dd->regmap,
 349                           rtc_dd->rtc_base + PM8XXX_ALARM_CTRL_OFFSET,
 350                           ctrl_reg);
 351         if (rc)
 352                 dev_err(rtc_dd->rtc_dev,
 353                         "Write to RTC Alarm control register failed\n");
 354
 355 rtc_alarm_handled:
 356         return IRQ_HANDLED;
 357 }
 358
 359 /*
 360  * Hardcoded RTC bases until IORESOURCE_REG mapping is figured out
 361  */
 362 static const struct of_device_id pm8xxx_id_table[] = {
 363         { .compatible = "qcom,pm8921-rtc", .data = (void *) 0x11D },
 364         { .compatible = "qcom,pm8058-rtc", .data = (void *) 0x1E8 },
 365         { },
 366 };
 367 MODULE_DEVICE_TABLE(of, pm8xxx_id_table);
 368
 369 static int pm8xxx_rtc_probe(struct platform_device *pdev)
 370 {
 371         int rc;
 372         unsigned int ctrl_reg;
 373         struct pm8xxx_rtc *rtc_dd;
 374         const struct of_device_id *match;
 375
 376         match = of_match_node(pm8xxx_id_table, pdev->dev.of_node);
 377         if (!match)
 378                 return -ENXIO;
 379
 380         rtc_dd = devm_kzalloc(&pdev->dev, sizeof(*rtc_dd), GFP_KERNEL);
 381         if (rtc_dd == NULL)
 382                 return -ENOMEM;
 383
 384         /* Initialise spinlock to protect RTC control register */
 385         spin_lock_init(&rtc_dd->ctrl_reg_lock);
 386
 387         rtc_dd->regmap = dev_get_regmap(pdev->dev.parent, NULL);
 388         if (!rtc_dd->regmap) {
 389                 dev_err(&pdev->dev, "Parent regmap unavailable.\n");
 390                 return -ENXIO;
 391         }
 392
 393         rtc_dd->rtc_alarm_irq = platform_get_irq(pdev, 0);
 394         if (rtc_dd->rtc_alarm_irq < 0) {
 395                 dev_err(&pdev->dev, "Alarm IRQ resource absent!\n");
 396                 return -ENXIO;
 397         }
 398
 399         rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node,
 400                                                       "allow-set-time");
 401
 402         rtc_dd->rtc_base = (long) match->data;
 403
 404         /* Setup RTC register addresses */
 405         rtc_dd->rtc_write_base = rtc_dd->rtc_base + PM8XXX_RTC_WRITE_OFFSET;
 406         rtc_dd->rtc_read_base = rtc_dd->rtc_base + PM8XXX_RTC_READ_OFFSET;
 407         rtc_dd->alarm_rw_base = rtc_dd->rtc_base + PM8XXX_ALARM_RW_OFFSET;
 408
 409         rtc_dd->rtc_dev = &pdev->dev;
 410
 411         /* Check if the RTC is on, else turn it on */
 412         rc = regmap_read(rtc_dd->regmap, rtc_dd->rtc_base, &ctrl_reg);
 413         if (rc) {
 414                 dev_err(&pdev->dev, "RTC control register read failed!\n");
 415                 return rc;
 416         }
 417
 418         if (!(ctrl_reg & PM8xxx_RTC_ENABLE)) {
 419                 ctrl_reg |= PM8xxx_RTC_ENABLE;
 420                 rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
 421                 if (rc) {
 422                         dev_err(&pdev->dev,
 423                                 "Write to RTC control register failed\n");
 424                         return rc;
 425                 }
 426         }
 427
 428         rtc_dd->ctrl_reg = ctrl_reg;
 429
 430         platform_set_drvdata(pdev, rtc_dd);
 431
 432         device_init_wakeup(&pdev->dev, 1);
 433
 434         /* Register the RTC device */
 435         rtc_dd->rtc = devm_rtc_device_register(&pdev->dev, "pm8xxx_rtc",
 436                                                &pm8xxx_rtc_ops, THIS_MODULE);
 437         if (IS_ERR(rtc_dd->rtc)) {
 438                 dev_err(&pdev->dev, "%s: RTC registration failed (%ld)\n",
 439                         __func__, PTR_ERR(rtc_dd->rtc));
 440                 return PTR_ERR(rtc_dd->rtc);
 441         }
 442
 443         /* Request the alarm IRQ */
 444         rc = devm_request_any_context_irq(&pdev->dev, rtc_dd->rtc_alarm_irq,
 445                                           pm8xxx_alarm_trigger,
 446                                           IRQF_TRIGGER_RISING,
 447                                           "pm8xxx_rtc_alarm", rtc_dd);
 448         if (rc < 0) {
 449                 dev_err(&pdev->dev, "Request IRQ failed (%d)\n", rc);
 450                 return rc;
 451         }
 452
 453         dev_dbg(&pdev->dev, "Probe success !!\n");
 454
 455         return 0;
 456 }
 457
 458 #ifdef CONFIG_PM_SLEEP
 459 static int pm8xxx_rtc_resume(struct device *dev)
 460 {
 461         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 462
 463         if (device_may_wakeup(dev))
 464                 disable_irq_wake(rtc_dd->rtc_alarm_irq);
 465
 466         return 0;
 467 }
 468
 469 static int pm8xxx_rtc_suspend(struct device *dev)
 470 {
 471         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 472
 473         if (device_may_wakeup(dev))
 474                 enable_irq_wake(rtc_dd->rtc_alarm_irq);
 475
 476         return 0;
 477 }
 478 #endif
 479
 480 static SIMPLE_DEV_PM_OPS(pm8xxx_rtc_pm_ops,
 481                          pm8xxx_rtc_suspend,
 482                          pm8xxx_rtc_resume);
 483
 484 static struct platform_driver pm8xxx_rtc_driver = {
 485         .probe          = pm8xxx_rtc_probe,
 486         .driver = {
 487                 .name           = "rtc-pm8xxx",
 488                 .owner          = THIS_MODULE,
 489                 .pm             = &pm8xxx_rtc_pm_ops,
 490                 .of_match_table = pm8xxx_id_table,
 491         },
 492 };
 493
 494 module_platform_driver(pm8xxx_rtc_driver);
 495
 496 MODULE_ALIAS("platform:rtc-pm8xxx");
 497 MODULE_DESCRIPTION("PMIC8xxx RTC driver");
 498 MODULE_LICENSE("GPL v2");
 499 MODULE_AUTHOR("Anirudh Ghayal <aghayal@codeaurora.org>");