Linux 3.16.62
[linux/fpc-iii.git] / drivers / rtc / rtc-sa1100.c
blob17ac745533adc0d068d9988182d3b5b262a3a54a
1 /*
2 * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
4 * Copyright (c) 2000 Nils Faerber
6 * Based on rtc.c by Paul Gortmaker
8 * Original Driver by Nils Faerber <nils@kernelconcepts.de>
10 * Modifications from:
11 * CIH <cih@coventive.com>
12 * Nicolas Pitre <nico@fluxnic.net>
13 * Andrew Christian <andrew.christian@hp.com>
15 * Converted to the RTC subsystem and Driver Model
16 * by Richard Purdie <rpurdie@rpsys.net>
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version
21 * 2 of the License, or (at your option) any later version.
24 #include <linux/platform_device.h>
25 #include <linux/module.h>
26 #include <linux/clk.h>
27 #include <linux/rtc.h>
28 #include <linux/init.h>
29 #include <linux/fs.h>
30 #include <linux/interrupt.h>
31 #include <linux/slab.h>
32 #include <linux/string.h>
33 #include <linux/of.h>
34 #include <linux/pm.h>
35 #include <linux/bitops.h>
36 #include <linux/io.h>
38 #include <mach/hardware.h>
39 #include <mach/irqs.h>
41 #if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)
42 #include <mach/regs-rtc.h>
43 #endif
45 #define RTC_DEF_DIVIDER (32768 - 1)
46 #define RTC_DEF_TRIM 0
47 #define RTC_FREQ 1024
49 struct sa1100_rtc {
50 spinlock_t lock;
51 int irq_1hz;
52 int irq_alarm;
53 struct rtc_device *rtc;
54 struct clk *clk;
57 static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
59 struct sa1100_rtc *info = dev_get_drvdata(dev_id);
60 struct rtc_device *rtc = info->rtc;
61 unsigned int rtsr;
62 unsigned long events = 0;
64 spin_lock(&info->lock);
66 rtsr = RTSR;
67 /* clear interrupt sources */
68 RTSR = 0;
69 /* Fix for a nasty initialization problem the in SA11xx RTSR register.
70 * See also the comments in sa1100_rtc_probe(). */
71 if (rtsr & (RTSR_ALE | RTSR_HZE)) {
72 /* This is the original code, before there was the if test
73 * above. This code does not clear interrupts that were not
74 * enabled. */
75 RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
76 } else {
77 /* For some reason, it is possible to enter this routine
78 * without interruptions enabled, it has been tested with
79 * several units (Bug in SA11xx chip?).
81 * This situation leads to an infinite "loop" of interrupt
82 * routine calling and as a result the processor seems to
83 * lock on its first call to open(). */
84 RTSR = RTSR_AL | RTSR_HZ;
87 /* clear alarm interrupt if it has occurred */
88 if (rtsr & RTSR_AL)
89 rtsr &= ~RTSR_ALE;
90 RTSR = rtsr & (RTSR_ALE | RTSR_HZE);
92 /* update irq data & counter */
93 if (rtsr & RTSR_AL)
94 events |= RTC_AF | RTC_IRQF;
95 if (rtsr & RTSR_HZ)
96 events |= RTC_UF | RTC_IRQF;
98 rtc_update_irq(rtc, 1, events);
100 spin_unlock(&info->lock);
102 return IRQ_HANDLED;
105 static int sa1100_rtc_open(struct device *dev)
107 struct sa1100_rtc *info = dev_get_drvdata(dev);
108 struct rtc_device *rtc = info->rtc;
109 int ret;
111 ret = request_irq(info->irq_1hz, sa1100_rtc_interrupt, 0, "rtc 1Hz", dev);
112 if (ret) {
113 dev_err(dev, "IRQ %d already in use.\n", info->irq_1hz);
114 return ret;
116 ret = request_irq(info->irq_alarm, sa1100_rtc_interrupt, 0, "rtc Alrm", dev);
117 if (ret) {
118 dev_err(dev, "IRQ %d already in use.\n", info->irq_alarm);
119 goto fail_ai;
121 rtc->max_user_freq = RTC_FREQ;
122 rtc_irq_set_freq(rtc, NULL, RTC_FREQ);
124 return 0;
126 fail_ai:
127 free_irq(info->irq_1hz, dev);
128 return ret;
131 static void sa1100_rtc_release(struct device *dev)
133 struct sa1100_rtc *info = dev_get_drvdata(dev);
135 spin_lock_irq(&info->lock);
136 RTSR = 0;
137 spin_unlock_irq(&info->lock);
139 free_irq(info->irq_alarm, dev);
140 free_irq(info->irq_1hz, dev);
143 static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
145 struct sa1100_rtc *info = dev_get_drvdata(dev);
147 spin_lock_irq(&info->lock);
148 if (enabled)
149 RTSR |= RTSR_ALE;
150 else
151 RTSR &= ~RTSR_ALE;
152 spin_unlock_irq(&info->lock);
153 return 0;
156 static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
158 rtc_time_to_tm(RCNR, tm);
159 return 0;
162 static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
164 unsigned long time;
165 int ret;
167 ret = rtc_tm_to_time(tm, &time);
168 if (ret == 0)
169 RCNR = time;
170 return ret;
173 static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
175 u32 rtsr;
177 rtsr = RTSR;
178 alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
179 alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
180 return 0;
183 static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
185 struct sa1100_rtc *info = dev_get_drvdata(dev);
186 unsigned long time;
187 int ret;
189 spin_lock_irq(&info->lock);
190 ret = rtc_tm_to_time(&alrm->time, &time);
191 if (ret != 0)
192 goto out;
193 RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
194 RTAR = time;
195 if (alrm->enabled)
196 RTSR |= RTSR_ALE;
197 else
198 RTSR &= ~RTSR_ALE;
199 out:
200 spin_unlock_irq(&info->lock);
202 return ret;
205 static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
207 seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR);
208 seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR);
210 return 0;
213 static const struct rtc_class_ops sa1100_rtc_ops = {
214 .open = sa1100_rtc_open,
215 .release = sa1100_rtc_release,
216 .read_time = sa1100_rtc_read_time,
217 .set_time = sa1100_rtc_set_time,
218 .read_alarm = sa1100_rtc_read_alarm,
219 .set_alarm = sa1100_rtc_set_alarm,
220 .proc = sa1100_rtc_proc,
221 .alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
224 static int sa1100_rtc_probe(struct platform_device *pdev)
226 struct rtc_device *rtc;
227 struct sa1100_rtc *info;
228 int irq_1hz, irq_alarm, ret = 0;
230 irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz");
231 irq_alarm = platform_get_irq_byname(pdev, "rtc alarm");
232 if (irq_1hz < 0 || irq_alarm < 0)
233 return -ENODEV;
235 info = devm_kzalloc(&pdev->dev, sizeof(struct sa1100_rtc), GFP_KERNEL);
236 if (!info)
237 return -ENOMEM;
238 info->clk = devm_clk_get(&pdev->dev, NULL);
239 if (IS_ERR(info->clk)) {
240 dev_err(&pdev->dev, "failed to find rtc clock source\n");
241 return PTR_ERR(info->clk);
243 info->irq_1hz = irq_1hz;
244 info->irq_alarm = irq_alarm;
245 spin_lock_init(&info->lock);
246 platform_set_drvdata(pdev, info);
248 ret = clk_prepare_enable(info->clk);
249 if (ret)
250 return ret;
252 * According to the manual we should be able to let RTTR be zero
253 * and then a default diviser for a 32.768KHz clock is used.
254 * Apparently this doesn't work, at least for my SA1110 rev 5.
255 * If the clock divider is uninitialized then reset it to the
256 * default value to get the 1Hz clock.
258 if (RTTR == 0) {
259 RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
260 dev_warn(&pdev->dev, "warning: "
261 "initializing default clock divider/trim value\n");
262 /* The current RTC value probably doesn't make sense either */
263 RCNR = 0;
266 device_init_wakeup(&pdev->dev, 1);
268 rtc = devm_rtc_device_register(&pdev->dev, pdev->name, &sa1100_rtc_ops,
269 THIS_MODULE);
271 if (IS_ERR(rtc)) {
272 ret = PTR_ERR(rtc);
273 goto err_dev;
275 info->rtc = rtc;
277 /* Fix for a nasty initialization problem the in SA11xx RTSR register.
278 * See also the comments in sa1100_rtc_interrupt().
280 * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
281 * interrupt pending, even though interrupts were never enabled.
282 * In this case, this bit it must be reset before enabling
283 * interruptions to avoid a nonexistent interrupt to occur.
285 * In principle, the same problem would apply to bit 0, although it has
286 * never been observed to happen.
288 * This issue is addressed both here and in sa1100_rtc_interrupt().
289 * If the issue is not addressed here, in the times when the processor
290 * wakes up with the bit set there will be one spurious interrupt.
292 * The issue is also dealt with in sa1100_rtc_interrupt() to be on the
293 * safe side, once the condition that lead to this strange
294 * initialization is unknown and could in principle happen during
295 * normal processing.
297 * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
298 * the corresponding bits in RTSR. */
299 RTSR = RTSR_AL | RTSR_HZ;
301 return 0;
302 err_dev:
303 clk_disable_unprepare(info->clk);
304 return ret;
307 static int sa1100_rtc_remove(struct platform_device *pdev)
309 struct sa1100_rtc *info = platform_get_drvdata(pdev);
311 if (info)
312 clk_disable_unprepare(info->clk);
314 return 0;
317 #ifdef CONFIG_PM_SLEEP
318 static int sa1100_rtc_suspend(struct device *dev)
320 struct sa1100_rtc *info = dev_get_drvdata(dev);
321 if (device_may_wakeup(dev))
322 enable_irq_wake(info->irq_alarm);
323 return 0;
326 static int sa1100_rtc_resume(struct device *dev)
328 struct sa1100_rtc *info = dev_get_drvdata(dev);
329 if (device_may_wakeup(dev))
330 disable_irq_wake(info->irq_alarm);
331 return 0;
333 #endif
335 static SIMPLE_DEV_PM_OPS(sa1100_rtc_pm_ops, sa1100_rtc_suspend,
336 sa1100_rtc_resume);
338 #ifdef CONFIG_OF
339 static const struct of_device_id sa1100_rtc_dt_ids[] = {
340 { .compatible = "mrvl,sa1100-rtc", },
341 { .compatible = "mrvl,mmp-rtc", },
344 MODULE_DEVICE_TABLE(of, sa1100_rtc_dt_ids);
345 #endif
347 static struct platform_driver sa1100_rtc_driver = {
348 .probe = sa1100_rtc_probe,
349 .remove = sa1100_rtc_remove,
350 .driver = {
351 .name = "sa1100-rtc",
352 .pm = &sa1100_rtc_pm_ops,
353 .of_match_table = of_match_ptr(sa1100_rtc_dt_ids),
357 module_platform_driver(sa1100_rtc_driver);
359 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
360 MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
361 MODULE_LICENSE("GPL");
362 MODULE_ALIAS("platform:sa1100-rtc");