wl1251: use wiphy_dev instead of wl->spi->dev
[linux/fpc-iii.git] / arch / arm / plat-mxc / include / mach / clock.h
blob43a82d0c534dd8f1e4bdfc99a95c94e9c1e56413
1 /*
2 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
20 #ifndef __ASM_ARCH_MXC_CLOCK_H__
21 #define __ASM_ARCH_MXC_CLOCK_H__
23 #ifndef __ASSEMBLY__
24 #include <linux/list.h>
26 struct module;
28 struct clk {
29 #ifndef CONFIG_COMMON_CLKDEV
30 /* As soon as i.MX1 and i.MX31 switched to clkdev, this
31 * block can go away */
32 struct list_head node;
33 struct module *owner;
34 const char *name;
35 #endif
36 int id;
37 /* Source clock this clk depends on */
38 struct clk *parent;
39 /* Secondary clock to enable/disable with this clock */
40 struct clk *secondary;
41 /* Reference count of clock enable/disable */
42 __s8 usecount;
43 /* Register bit position for clock's enable/disable control. */
44 u8 enable_shift;
45 /* Register address for clock's enable/disable control. */
46 void __iomem *enable_reg;
47 u32 flags;
48 /* get the current clock rate (always a fresh value) */
49 unsigned long (*get_rate) (struct clk *);
50 /* Function ptr to set the clock to a new rate. The rate must match a
51 supported rate returned from round_rate. Leave blank if clock is not
52 programmable */
53 int (*set_rate) (struct clk *, unsigned long);
54 /* Function ptr to round the requested clock rate to the nearest
55 supported rate that is less than or equal to the requested rate. */
56 unsigned long (*round_rate) (struct clk *, unsigned long);
57 /* Function ptr to enable the clock. Leave blank if clock can not
58 be gated. */
59 int (*enable) (struct clk *);
60 /* Function ptr to disable the clock. Leave blank if clock can not
61 be gated. */
62 void (*disable) (struct clk *);
63 /* Function ptr to set the parent clock of the clock. */
64 int (*set_parent) (struct clk *, struct clk *);
67 int clk_register(struct clk *clk);
68 void clk_unregister(struct clk *clk);
70 unsigned long mxc_decode_pll(unsigned int pll, u32 f_ref);
72 #endif /* __ASSEMBLY__ */
73 #endif /* __ASM_ARCH_MXC_CLOCK_H__ */