wl1251: use wiphy_dev instead of wl->spi->dev
[linux/fpc-iii.git] / arch / m68knommu / platform / 527x / config.c
blobf746439cfd3ef9db0080b0d85f9d4f803c8b8d61
1 /***************************************************************************/
3 /*
4 * linux/arch/m68knommu/platform/527x/config.c
6 * Sub-architcture dependant initialization code for the Freescale
7 * 5270/5271 CPUs.
9 * Copyright (C) 1999-2004, Greg Ungerer (gerg@snapgear.com)
10 * Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com)
13 /***************************************************************************/
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/init.h>
18 #include <linux/io.h>
19 #include <asm/machdep.h>
20 #include <asm/coldfire.h>
21 #include <asm/mcfsim.h>
22 #include <asm/mcfuart.h>
24 /***************************************************************************/
26 static struct mcf_platform_uart m527x_uart_platform[] = {
28 .mapbase = MCF_MBAR + MCFUART_BASE1,
29 .irq = MCFINT_VECBASE + MCFINT_UART0,
32 .mapbase = MCF_MBAR + MCFUART_BASE2,
33 .irq = MCFINT_VECBASE + MCFINT_UART1,
36 .mapbase = MCF_MBAR + MCFUART_BASE3,
37 .irq = MCFINT_VECBASE + MCFINT_UART2,
39 { },
42 static struct platform_device m527x_uart = {
43 .name = "mcfuart",
44 .id = 0,
45 .dev.platform_data = m527x_uart_platform,
48 static struct resource m527x_fec0_resources[] = {
50 .start = MCF_MBAR + 0x1000,
51 .end = MCF_MBAR + 0x1000 + 0x7ff,
52 .flags = IORESOURCE_MEM,
55 .start = 64 + 23,
56 .end = 64 + 23,
57 .flags = IORESOURCE_IRQ,
60 .start = 64 + 27,
61 .end = 64 + 27,
62 .flags = IORESOURCE_IRQ,
65 .start = 64 + 29,
66 .end = 64 + 29,
67 .flags = IORESOURCE_IRQ,
71 static struct resource m527x_fec1_resources[] = {
73 .start = MCF_MBAR + 0x1800,
74 .end = MCF_MBAR + 0x1800 + 0x7ff,
75 .flags = IORESOURCE_MEM,
78 .start = 128 + 23,
79 .end = 128 + 23,
80 .flags = IORESOURCE_IRQ,
83 .start = 128 + 27,
84 .end = 128 + 27,
85 .flags = IORESOURCE_IRQ,
88 .start = 128 + 29,
89 .end = 128 + 29,
90 .flags = IORESOURCE_IRQ,
94 static struct platform_device m527x_fec[] = {
96 .name = "fec",
97 .id = 0,
98 .num_resources = ARRAY_SIZE(m527x_fec0_resources),
99 .resource = m527x_fec0_resources,
102 .name = "fec",
103 .id = 1,
104 .num_resources = ARRAY_SIZE(m527x_fec1_resources),
105 .resource = m527x_fec1_resources,
109 static struct platform_device *m527x_devices[] __initdata = {
110 &m527x_uart,
111 &m527x_fec[0],
112 #ifdef CONFIG_FEC2
113 &m527x_fec[1],
114 #endif
117 /***************************************************************************/
119 #define INTC0 (MCF_MBAR + MCFICM_INTC0)
121 static void __init m527x_uart_init_line(int line, int irq)
123 u16 sepmask;
124 u32 imr;
126 if ((line < 0) || (line > 2))
127 return;
129 /* level 6, line based priority */
130 writeb(0x30+line, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
132 imr = readl(INTC0 + MCFINTC_IMRL);
133 imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
134 writel(imr, INTC0 + MCFINTC_IMRL);
137 * External Pin Mask Setting & Enable External Pin for Interface
139 sepmask = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
140 if (line == 0)
141 sepmask |= UART0_ENABLE_MASK;
142 else if (line == 1)
143 sepmask |= UART1_ENABLE_MASK;
144 else if (line == 2)
145 sepmask |= UART2_ENABLE_MASK;
146 writew(sepmask, MCF_IPSBAR + MCF_GPIO_PAR_UART);
149 static void __init m527x_uarts_init(void)
151 const int nrlines = ARRAY_SIZE(m527x_uart_platform);
152 int line;
154 for (line = 0; (line < nrlines); line++)
155 m527x_uart_init_line(line, m527x_uart_platform[line].irq);
158 /***************************************************************************/
160 static void __init m527x_fec_irq_init(int nr)
162 unsigned long base;
163 u32 imr;
165 base = MCF_IPSBAR + (nr ? MCFICM_INTC1 : MCFICM_INTC0);
167 writeb(0x28, base + MCFINTC_ICR0 + 23);
168 writeb(0x27, base + MCFINTC_ICR0 + 27);
169 writeb(0x26, base + MCFINTC_ICR0 + 29);
171 imr = readl(base + MCFINTC_IMRH);
172 imr &= ~0xf;
173 writel(imr, base + MCFINTC_IMRH);
174 imr = readl(base + MCFINTC_IMRL);
175 imr &= ~0xff800001;
176 writel(imr, base + MCFINTC_IMRL);
179 static void __init m527x_fec_init(void)
181 u16 par;
182 u8 v;
184 m527x_fec_irq_init(0);
186 /* Set multi-function pins to ethernet mode for fec0 */
187 #if defined(CONFIG_M5271)
188 v = readb(MCF_IPSBAR + 0x100047);
189 writeb(v | 0xf0, MCF_IPSBAR + 0x100047);
190 #else
191 par = readw(MCF_IPSBAR + 0x100082);
192 writew(par | 0xf00, MCF_IPSBAR + 0x100082);
193 v = readb(MCF_IPSBAR + 0x100078);
194 writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
195 #endif
197 #ifdef CONFIG_FEC2
198 m527x_fec_irq_init(1);
200 /* Set multi-function pins to ethernet mode for fec1 */
201 par = readw(MCF_IPSBAR + 0x100082);
202 writew(par | 0xa0, MCF_IPSBAR + 0x100082);
203 v = readb(MCF_IPSBAR + 0x100079);
204 writeb(v | 0xc0, MCF_IPSBAR + 0x100079);
205 #endif
208 /***************************************************************************/
210 void mcf_disableall(void)
212 *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
213 *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL)) = 0xffffffff;
216 /***************************************************************************/
218 void mcf_autovector(unsigned int vec)
220 /* Everything is auto-vectored on the 5272 */
223 /***************************************************************************/
225 static void m527x_cpu_reset(void)
227 local_irq_disable();
228 __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
231 /***************************************************************************/
233 void __init config_BSP(char *commandp, int size)
235 mcf_disableall();
236 mach_reset = m527x_cpu_reset;
237 m527x_uarts_init();
238 m527x_fec_init();
241 /***************************************************************************/
243 static int __init init_BSP(void)
245 platform_add_devices(m527x_devices, ARRAY_SIZE(m527x_devices));
246 return 0;
249 arch_initcall(init_BSP);
251 /***************************************************************************/