arch/powerpc/platforms/pasemi/pci.c

   1 /*
   2  * Copyright (C) 2006 PA Semi, Inc
   3  *
   4  * Authors: Kip Walker, PA Semi
   5  *          Olof Johansson, PA Semi
   6  *
   7  * Maintained by: Olof Johansson <olof@lixom.net>
   8  *
   9  * Based on arch/powerpc/platforms/maple/pci.c
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  23  */
  24
  25
  26 #include <linux/kernel.h>
  27 #include <linux/pci.h>
  28
  29 #include <asm/pci-bridge.h>
  30 #include <asm/machdep.h>
  31
  32 #include <asm/ppc-pci.h>
  33
  34 #define PA_PXP_CFA(bus, devfn, off) (((bus) << 20) | ((devfn) << 12) | (off))
  35
  36 static inline int pa_pxp_offset_valid(u8 bus, u8 devfn, int offset)
  37 {
  38         /* Device 0 Function 0 is special: It's config space spans function 1 as
  39          * well, so allow larger offset. It's really a two-function device but the
  40          * second function does not probe.
  41          */
  42         if (bus == 0 && devfn == 0)
  43                 return offset < 8192;
  44         else
  45                 return offset < 4096;
  46 }
  47
  48 static void volatile __iomem *pa_pxp_cfg_addr(struct pci_controller *hose,
  49                                        u8 bus, u8 devfn, int offset)
  50 {
  51         return hose->cfg_data + PA_PXP_CFA(bus, devfn, offset);
  52 }
  53
  54 static inline int is_root_port(int busno, int devfn)
  55 {
  56         return ((busno == 0) && (PCI_FUNC(devfn) < 4) &&
  57                  ((PCI_SLOT(devfn) == 16) || (PCI_SLOT(devfn) == 17)));
  58 }
  59
  60 static inline int is_5945_reg(int reg)
  61 {
  62         return (((reg >= 0x18) && (reg < 0x34)) ||
  63                 ((reg >= 0x158) && (reg < 0x178)));
  64 }
  65
  66 static int workaround_5945(struct pci_bus *bus, unsigned int devfn,
  67                            int offset, int len, u32 *val)
  68 {
  69         struct pci_controller *hose;
  70         void volatile __iomem *addr, *dummy;
  71         int byte;
  72         u32 tmp;
  73
  74         if (!is_root_port(bus->number, devfn) || !is_5945_reg(offset))
  75                 return 0;
  76
  77         hose = pci_bus_to_host(bus);
  78
  79         addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset & ~0x3);
  80         byte = offset & 0x3;
  81
  82         /* Workaround bug 5945: write 0 to a dummy register before reading,
  83          * and write back what we read. We must read/write the full 32-bit
  84          * contents so we need to shift and mask by hand.
  85          */
  86         dummy = pa_pxp_cfg_addr(hose, bus->number, devfn, 0x10);
  87         out_le32(dummy, 0);
  88         tmp = in_le32(addr);
  89         out_le32(addr, tmp);
  90
  91         switch (len) {
  92         case 1:
  93                 *val = (tmp >> (8*byte)) & 0xff;
  94                 break;
  95         case 2:
  96                 if (byte == 0)
  97                         *val = tmp & 0xffff;
  98                 else
  99                         *val = (tmp >> 16) & 0xffff;
 100                 break;
 101         default:
 102                 *val = tmp;
 103                 break;
 104         }
 105
 106         return 1;
 107 }
 108
 109 static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
 110                               int offset, int len, u32 *val)
 111 {
 112         struct pci_controller *hose;
 113         void volatile __iomem *addr;
 114
 115         hose = pci_bus_to_host(bus);
 116         if (!hose)
 117                 return PCIBIOS_DEVICE_NOT_FOUND;
 118
 119         if (!pa_pxp_offset_valid(bus->number, devfn, offset))
 120                 return PCIBIOS_BAD_REGISTER_NUMBER;
 121
 122         if (workaround_5945(bus, devfn, offset, len, val))
 123                 return PCIBIOS_SUCCESSFUL;
 124
 125         addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
 126
 127         /*
 128          * Note: the caller has already checked that offset is
 129          * suitably aligned and that len is 1, 2 or 4.
 130          */
 131         switch (len) {
 132         case 1:
 133                 *val = in_8(addr);
 134                 break;
 135         case 2:
 136                 *val = in_le16(addr);
 137                 break;
 138         default:
 139                 *val = in_le32(addr);
 140                 break;
 141         }
 142
 143         return PCIBIOS_SUCCESSFUL;
 144 }
 145
 146 static int pa_pxp_write_config(struct pci_bus *bus, unsigned int devfn,
 147                                int offset, int len, u32 val)
 148 {
 149         struct pci_controller *hose;
 150         void volatile __iomem *addr;
 151
 152         hose = pci_bus_to_host(bus);
 153         if (!hose)
 154                 return PCIBIOS_DEVICE_NOT_FOUND;
 155
 156         if (!pa_pxp_offset_valid(bus->number, devfn, offset))
 157                 return PCIBIOS_BAD_REGISTER_NUMBER;
 158
 159         addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
 160
 161         /*
 162          * Note: the caller has already checked that offset is
 163          * suitably aligned and that len is 1, 2 or 4.
 164          */
 165         switch (len) {
 166         case 1:
 167                 out_8(addr, val);
 168                 break;
 169         case 2:
 170                 out_le16(addr, val);
 171                 break;
 172         default:
 173                 out_le32(addr, val);
 174                 break;
 175         }
 176         return PCIBIOS_SUCCESSFUL;
 177 }
 178
 179 static struct pci_ops pa_pxp_ops = {
 180         .read = pa_pxp_read_config,
 181         .write = pa_pxp_write_config,
 182 };
 183
 184 static void __init setup_pa_pxp(struct pci_controller *hose)
 185 {
 186         hose->ops = &pa_pxp_ops;
 187         hose->cfg_data = ioremap(0xe0000000, 0x10000000);
 188 }
 189
 190 static int __init pas_add_bridge(struct device_node *dev)
 191 {
 192         struct pci_controller *hose;
 193
 194         pr_debug("Adding PCI host bridge %s\n", dev->full_name);
 195
 196         hose = pcibios_alloc_controller(dev);
 197         if (!hose)
 198                 return -ENOMEM;
 199
 200         hose->first_busno = 0;
 201         hose->last_busno = 0xff;
 202
 203         setup_pa_pxp(hose);
 204
 205         printk(KERN_INFO "Found PA-PXP PCI host bridge.\n");
 206
 207         /* Interpret the "ranges" property */
 208         pci_process_bridge_OF_ranges(hose, dev, 1);
 209
 210         return 0;
 211 }
 212
 213 void __init pas_pci_init(void)
 214 {
 215         struct device_node *np, *root;
 216
 217         root = of_find_node_by_path("/");
 218         if (!root) {
 219                 printk(KERN_CRIT "pas_pci_init: can't find root "
 220                         "of device tree\n");
 221                 return;
 222         }
 223
 224         for (np = NULL; (np = of_get_next_child(root, np)) != NULL;)
 225                 if (np->name && !strcmp(np->name, "pxp") && !pas_add_bridge(np))
 226                         of_node_get(np);
 227
 228         of_node_put(root);
 229
 230         /* Setup the linkage between OF nodes and PHBs */
 231         pci_devs_phb_init();
 232
 233         /* Use the common resource allocation mechanism */
 234         pci_probe_only = 1;
 235 }
 236
 237 void __iomem *pasemi_pci_getcfgaddr(struct pci_dev *dev, int offset)
 238 {
 239         struct pci_controller *hose;
 240
 241         hose = pci_bus_to_host(dev->bus);
 242
 243         return (void __iomem *)pa_pxp_cfg_addr(hose, dev->bus->number, dev->devfn, offset);
 244 }