5 The expectations of individual ACPI tables are discussed in the list that
8 If a section number is used, it refers to a section number in the ACPI
9 specification where the object is defined. If "Signature Reserved" is used,
10 the table signature (the first four bytes of the table) is the only portion
11 of the table recognized by the specification, and the actual table is defined
12 outside of the UEFI Forum (see Section 5.2.6 of the specification).
14 For ACPI on arm64, tables also fall into the following categories:
16 - Required: DSDT, FADT, GTDT, MADT, MCFG, RSDP, SPCR, XSDT
18 - Recommended: BERT, EINJ, ERST, HEST, PCCT, SSDT
20 - Optional: BGRT, CPEP, CSRT, DBG2, DRTM, ECDT, FACS, FPDT, IORT,
21 MCHI, MPST, MSCT, NFIT, PMTT, RASF, SBST, SLIT, SPMI, SRAT, STAO,
22 TCPA, TPM2, UEFI, XENV
24 - Not supported: BOOT, DBGP, DMAR, ETDT, HPET, IBFT, IVRS, LPIT,
25 MSDM, OEMx, PSDT, RSDT, SLIC, WAET, WDAT, WDRT, WPBT
27 ====== ========================================================================
28 Table Usage for ARMv8 Linux
29 ====== ========================================================================
30 BERT Section 18.3 (signature == "BERT")
32 **Boot Error Record Table**
34 Must be supplied if RAS support is provided by the platform. It
35 is recommended this table be supplied.
37 BOOT Signature Reserved (signature == "BOOT")
39 **simple BOOT flag table**
41 Microsoft only table, will not be supported.
43 BGRT Section 5.2.22 (signature == "BGRT")
45 **Boot Graphics Resource Table**
47 Optional, not currently supported, with no real use-case for an
50 CPEP Section 5.2.18 (signature == "CPEP")
52 **Corrected Platform Error Polling table**
54 Optional, not currently supported, and not recommended until such
55 time as ARM-compatible hardware is available, and the specification
58 CSRT Signature Reserved (signature == "CSRT")
60 **Core System Resources Table**
62 Optional, not currently supported.
64 DBG2 Signature Reserved (signature == "DBG2")
66 **DeBuG port table 2**
68 License has changed and should be usable. Optional if used instead
69 of earlycon=<device> on the command line.
71 DBGP Signature Reserved (signature == "DBGP")
75 Microsoft only table, will not be supported.
77 DSDT Section 5.2.11.1 (signature == "DSDT")
79 **Differentiated System Description Table**
81 A DSDT is required; see also SSDT.
83 ACPI tables contain only one DSDT but can contain one or more SSDTs,
84 which are optional. Each SSDT can only add to the ACPI namespace,
85 but cannot modify or replace anything in the DSDT.
87 DMAR Signature Reserved (signature == "DMAR")
89 **DMA Remapping table**
91 x86 only table, will not be supported.
93 DRTM Signature Reserved (signature == "DRTM")
95 **Dynamic Root of Trust for Measurement table**
97 Optional, not currently supported.
99 ECDT Section 5.2.16 (signature == "ECDT")
101 **Embedded Controller Description Table**
103 Optional, not currently supported, but could be used on ARM if and
104 only if one uses the GPE_BIT field to represent an IRQ number, since
105 there are no GPE blocks defined in hardware reduced mode. This would
106 need to be modified in the ACPI specification.
108 EINJ Section 18.6 (signature == "EINJ")
110 **Error Injection table**
112 This table is very useful for testing platform response to error
113 conditions; it allows one to inject an error into the system as
114 if it had actually occurred. However, this table should not be
115 shipped with a production system; it should be dynamically loaded
116 and executed with the ACPICA tools only during testing.
118 ERST Section 18.5 (signature == "ERST")
120 **Error Record Serialization Table**
122 On a platform supports RAS, this table must be supplied if it is not
123 UEFI-based; if it is UEFI-based, this table may be supplied. When this
124 table is not present, UEFI run time service will be utilized to save
125 and retrieve hardware error information to and from a persistent store.
127 ETDT Signature Reserved (signature == "ETDT")
129 **Event Timer Description Table**
131 Obsolete table, will not be supported.
133 FACS Section 5.2.10 (signature == "FACS")
135 **Firmware ACPI Control Structure**
137 It is unlikely that this table will be terribly useful. If it is
138 provided, the Global Lock will NOT be used since it is not part of
139 the hardware reduced profile, and only 64-bit address fields will
142 FADT Section 5.2.9 (signature == "FACP")
144 **Fixed ACPI Description Table**
148 The HW_REDUCED_ACPI flag must be set. All of the fields that are
149 to be ignored when HW_REDUCED_ACPI is set are expected to be set to
152 If an FACS table is provided, the X_FIRMWARE_CTRL field is to be
153 used, not FIRMWARE_CTRL.
155 If PSCI is used (as is recommended), make sure that ARM_BOOT_ARCH is
156 filled in properly - that the PSCI_COMPLIANT flag is set and that
157 PSCI_USE_HVC is set or unset as needed (see table 5-37).
159 For the DSDT that is also required, the X_DSDT field is to be used,
162 FPDT Section 5.2.23 (signature == "FPDT")
164 **Firmware Performance Data Table**
166 Optional, not currently supported.
168 GTDT Section 5.2.24 (signature == "GTDT")
170 **Generic Timer Description Table**
174 HEST Section 18.3.2 (signature == "HEST")
176 **Hardware Error Source Table**
178 ARM-specific error sources have been defined; please use those or the
179 PCI types such as type 6 (AER Root Port), 7 (AER Endpoint), or 8 (AER
180 Bridge), or use type 9 (Generic Hardware Error Source). Firmware first
181 error handling is possible if and only if Trusted Firmware is being
184 Must be supplied if RAS support is provided by the platform. It
185 is recommended this table be supplied.
187 HPET Signature Reserved (signature == "HPET")
189 **High Precision Event timer Table**
191 x86 only table, will not be supported.
193 IBFT Signature Reserved (signature == "IBFT")
195 **iSCSI Boot Firmware Table**
197 Microsoft defined table, support TBD.
199 IORT Signature Reserved (signature == "IORT")
201 **Input Output Remapping Table**
203 arm64 only table, required in order to describe IO topology, SMMUs,
204 and GIC ITSs, and how those various components are connected together,
205 such as identifying which components are behind which SMMUs/ITSs.
206 This table will only be required on certain SBSA platforms (e.g.,
207 when using GICv3-ITS and an SMMU); on SBSA Level 0 platforms, it
210 IVRS Signature Reserved (signature == "IVRS")
212 **I/O Virtualization Reporting Structure**
214 x86_64 (AMD) only table, will not be supported.
216 LPIT Signature Reserved (signature == "LPIT")
218 **Low Power Idle Table**
220 x86 only table as of ACPI 5.1; starting with ACPI 6.0, processor
221 descriptions and power states on ARM platforms should use the DSDT
222 and define processor container devices (_HID ACPI0010, Section 8.4,
223 and more specifically 8.4.3 and and 8.4.4).
225 MADT Section 5.2.12 (signature == "APIC")
227 **Multiple APIC Description Table**
229 Required for arm64. Only the GIC interrupt controller structures
230 should be used (types 0xA - 0xF).
232 MCFG Signature Reserved (signature == "MCFG")
234 **Memory-mapped ConFiGuration space**
236 If the platform supports PCI/PCIe, an MCFG table is required.
238 MCHI Signature Reserved (signature == "MCHI")
240 **Management Controller Host Interface table**
242 Optional, not currently supported.
244 MPST Section 5.2.21 (signature == "MPST")
246 **Memory Power State Table**
248 Optional, not currently supported.
250 MSCT Section 5.2.19 (signature == "MSCT")
252 **Maximum System Characteristic Table**
254 Optional, not currently supported.
256 MSDM Signature Reserved (signature == "MSDM")
258 **Microsoft Data Management table**
260 Microsoft only table, will not be supported.
262 NFIT Section 5.2.25 (signature == "NFIT")
264 **NVDIMM Firmware Interface Table**
266 Optional, not currently supported.
268 OEMx Signature of "OEMx" only
270 **OEM Specific Tables**
272 All tables starting with a signature of "OEM" are reserved for OEM
273 use. Since these are not meant to be of general use but are limited
274 to very specific end users, they are not recommended for use and are
275 not supported by the kernel for arm64.
277 PCCT Section 14.1 (signature == "PCCT)
279 **Platform Communications Channel Table**
281 Recommend for use on arm64; use of PCC is recommended when using CPPC
282 to control performance and power for platform processors.
284 PMTT Section 5.2.21.12 (signature == "PMTT")
286 **Platform Memory Topology Table**
288 Optional, not currently supported.
290 PSDT Section 5.2.11.3 (signature == "PSDT")
292 **Persistent System Description Table**
294 Obsolete table, will not be supported.
296 RASF Section 5.2.20 (signature == "RASF")
298 **RAS Feature table**
300 Optional, not currently supported.
302 RSDP Section 5.2.5 (signature == "RSD PTR")
304 **Root System Description PoinTeR**
308 RSDT Section 5.2.7 (signature == "RSDT")
310 **Root System Description Table**
312 Since this table can only provide 32-bit addresses, it is deprecated
313 on arm64, and will not be used. If provided, it will be ignored.
315 SBST Section 5.2.14 (signature == "SBST")
317 **Smart Battery Subsystem Table**
319 Optional, not currently supported.
321 SLIC Signature Reserved (signature == "SLIC")
323 **Software LIcensing table**
325 Microsoft only table, will not be supported.
327 SLIT Section 5.2.17 (signature == "SLIT")
329 **System Locality distance Information Table**
331 Optional in general, but required for NUMA systems.
333 SPCR Signature Reserved (signature == "SPCR")
335 **Serial Port Console Redirection table**
339 SPMI Signature Reserved (signature == "SPMI")
341 **Server Platform Management Interface table**
343 Optional, not currently supported.
345 SRAT Section 5.2.16 (signature == "SRAT")
347 **System Resource Affinity Table**
349 Optional, but if used, only the GICC Affinity structures are read.
350 To support arm64 NUMA, this table is required.
352 SSDT Section 5.2.11.2 (signature == "SSDT")
354 **Secondary System Description Table**
356 These tables are a continuation of the DSDT; these are recommended
357 for use with devices that can be added to a running system, but can
358 also serve the purpose of dividing up device descriptions into more
361 An SSDT can only ADD to the ACPI namespace. It cannot modify or
362 replace existing device descriptions already in the namespace.
364 These tables are optional, however. ACPI tables should contain only
365 one DSDT but can contain many SSDTs.
367 STAO Signature Reserved (signature == "STAO")
369 **_STA Override table**
371 Optional, but only necessary in virtualized environments in order to
372 hide devices from guest OSs.
374 TCPA Signature Reserved (signature == "TCPA")
376 **Trusted Computing Platform Alliance table**
378 Optional, not currently supported, and may need changes to fully
379 interoperate with arm64.
381 TPM2 Signature Reserved (signature == "TPM2")
383 **Trusted Platform Module 2 table**
385 Optional, not currently supported, and may need changes to fully
386 interoperate with arm64.
388 UEFI Signature Reserved (signature == "UEFI")
390 **UEFI ACPI data table**
392 Optional, not currently supported. No known use case for arm64,
395 WAET Signature Reserved (signature == "WAET")
397 **Windows ACPI Emulated devices Table**
399 Microsoft only table, will not be supported.
401 WDAT Signature Reserved (signature == "WDAT")
403 **Watch Dog Action Table**
405 Microsoft only table, will not be supported.
407 WDRT Signature Reserved (signature == "WDRT")
409 **Watch Dog Resource Table**
411 Microsoft only table, will not be supported.
413 WPBT Signature Reserved (signature == "WPBT")
415 **Windows Platform Binary Table**
417 Microsoft only table, will not be supported.
419 XENV Signature Reserved (signature == "XENV")
421 **Xen project table**
423 Optional, used only by Xen at present.
425 XSDT Section 5.2.8 (signature == "XSDT")
427 **eXtended System Description Table**
430 ====== ========================================================================
434 The expectations on individual ACPI objects that are likely to be used are
435 shown in the list that follows; any object not explicitly mentioned below
436 should be used as needed for a particular platform or particular subsystem,
437 such as power management or PCI.
439 ===== ================ ========================================================
440 Name Section Usage for ARMv8 Linux
441 ===== ================ ========================================================
442 _CCA 6.2.17 This method must be defined for all bus masters
443 on arm64 - there are no assumptions made about
444 whether such devices are cache coherent or not.
445 The _CCA value is inherited by all descendants of
446 these devices so it does not need to be repeated.
447 Without _CCA on arm64, the kernel does not know what
448 to do about setting up DMA for the device.
450 NB: this method provides default cache coherency
451 attributes; the presence of an SMMU can be used to
452 modify that, however. For example, a master could
453 default to non-coherent, but be made coherent with
454 the appropriate SMMU configuration (see Table 17 of
455 the IORT specification, ARM Document DEN 0049B).
457 _CID 6.1.2 Use as needed, see also _HID.
459 _CLS 6.1.3 Use as needed, see also _HID.
461 _CPC 8.4.7.1 Use as needed, power management specific. CPPC is
462 recommended on arm64.
464 _CRS 6.2.2 Required on arm64.
466 _CSD 8.4.2.2 Use as needed, used only in conjunction with _CST.
468 _CST 8.4.2.1 Low power idle states (8.4.4) are recommended instead
471 _DDN 6.1.4 This field can be used for a device name. However,
472 it is meant for DOS device names (e.g., COM1), so be
473 careful of its use across OSes.
475 _DSD 6.2.5 To be used with caution. If this object is used, try
476 to use it within the constraints already defined by the
477 Device Properties UUID. Only in rare circumstances
478 should it be necessary to create a new _DSD UUID.
480 In either case, submit the _DSD definition along with
481 any driver patches for discussion, especially when
482 device properties are used. A driver will not be
483 considered complete without a corresponding _DSD
484 description. Once approved by kernel maintainers,
485 the UUID or device properties must then be registered
486 with the UEFI Forum; this may cause some iteration as
487 more than one OS will be registering entries.
489 _DSM 9.1.1 Do not use this method. It is not standardized, the
490 return values are not well documented, and it is
491 currently a frequent source of error.
493 \_GL 5.7.1 This object is not to be used in hardware reduced
494 mode, and therefore should not be used on arm64.
496 _GLK 6.5.7 This object requires a global lock be defined; there
497 is no global lock on arm64 since it runs in hardware
498 reduced mode. Hence, do not use this object on arm64.
500 \_GPE 5.3.1 This namespace is for x86 use only. Do not use it
503 _HID 6.1.5 This is the primary object to use in device probing,
504 though _CID and _CLS may also be used.
506 _INI 6.5.1 Not required, but can be useful in setting up devices
507 when UEFI leaves them in a state that may not be what
508 the driver expects before it starts probing.
510 _LPI 8.4.4.3 Recommended for use with processor definitions (_HID
511 ACPI0010) on arm64. See also _RDI.
513 _MLS 6.1.7 Highly recommended for use in internationalization.
515 _OFF 7.2.2 It is recommended to define this method for any device
516 that can be turned on or off.
518 _ON 7.2.3 It is recommended to define this method for any device
519 that can be turned on or off.
521 \_OS 5.7.3 This method will return "Linux" by default (this is
522 the value of the macro ACPI_OS_NAME on Linux). The
523 command line parameter acpi_os=<string> can be used
524 to set it to some other value.
526 _OSC 6.2.11 This method can be a global method in ACPI (i.e.,
527 \_SB._OSC), or it may be associated with a specific
528 device (e.g., \_SB.DEV0._OSC), or both. When used
529 as a global method, only capabilities published in
530 the ACPI specification are allowed. When used as
531 a device-specific method, the process described for
532 using _DSD MUST be used to create an _OSC definition;
533 out-of-process use of _OSC is not allowed. That is,
534 submit the device-specific _OSC usage description as
535 part of the kernel driver submission, get it approved
536 by the kernel community, then register it with the
539 \_OSI 5.7.2 Deprecated on ARM64. As far as ACPI firmware is
540 concerned, _OSI is not to be used to determine what
541 sort of system is being used or what functionality
542 is provided. The _OSC method is to be used instead.
544 _PDC 8.4.1 Deprecated, do not use on arm64.
546 \_PIC 5.8.1 The method should not be used. On arm64, the only
547 interrupt model available is GIC.
549 \_PR 5.3.1 This namespace is for x86 use only on legacy systems.
550 Do not use it on arm64.
552 _PRT 6.2.13 Required as part of the definition of all PCI root
555 _PRx 7.3.8-11 Use as needed; power management specific. If _PR0 is
556 defined, _PR3 must also be defined.
558 _PSx 7.3.2-5 Use as needed; power management specific. If _PS0 is
559 defined, _PS3 must also be defined. If clocks or
560 regulators need adjusting to be consistent with power
561 usage, change them in these methods.
563 _RDI 8.4.4.4 Recommended for use with processor definitions (_HID
564 ACPI0010) on arm64. This should only be used in
565 conjunction with _LPI.
567 \_REV 5.7.4 Always returns the latest version of ACPI supported.
569 \_SB 5.3.1 Required on arm64; all devices must be defined in this
572 _SLI 6.2.15 Use is recommended when SLIT table is in use.
574 _STA 6.3.7, It is recommended to define this method for any device
575 7.2.4 that can be turned on or off. See also the STAO table
576 that provides overrides to hide devices in virtualized
579 _SRS 6.2.16 Use as needed; see also _PRS.
581 _STR 6.1.10 Recommended for conveying device names to end users;
582 this is preferred over using _DDN.
584 _SUB 6.1.9 Use as needed; _HID or _CID are preferred.
586 _SUN 6.1.11 Use as needed, but recommended.
588 _SWS 7.4.3 Use as needed; power management specific; this may
589 require specification changes for use on arm64.
591 _UID 6.1.12 Recommended for distinguishing devices of the same
592 class; define it if at all possible.
593 ===== ================ ========================================================
600 Do not use GPE block devices; these are not supported in the hardware reduced
601 profile used by arm64. Since there are no GPE blocks defined for use on ARM
602 platforms, ACPI events must be signaled differently.
604 There are two options: GPIO-signaled interrupts (Section 5.6.5), and
605 interrupt-signaled events (Section 5.6.9). Interrupt-signaled events are a
606 new feature in the ACPI 6.1 specification. Either - or both - can be used
607 on a given platform, and which to use may be dependent of limitations in any
608 given SoC. If possible, interrupt-signaled events are recommended.
611 ACPI Processor Control
612 ----------------------
613 Section 8 of the ACPI specification changed significantly in version 6.0.
614 Processors should now be defined as Device objects with _HID ACPI0007; do
615 not use the deprecated Processor statement in ASL. All multiprocessor systems
616 should also define a hierarchy of processors, done with Processor Container
617 Devices (see Section 8.4.3.1, _HID ACPI0010); do not use processor aggregator
618 devices (Section 8.5) to describe processor topology. Section 8.4 of the
619 specification describes the semantics of these object definitions and how
622 Most importantly, the processor hierarchy defined also defines the low power
623 idle states that are available to the platform, along with the rules for
624 determining which processors can be turned on or off and the circumstances
625 that control that. Without this information, the processors will run in
626 whatever power state they were left in by UEFI.
628 Note too, that the processor Device objects defined and the entries in the
629 MADT for GICs are expected to be in synchronization. The _UID of the Device
630 object must correspond to processor IDs used in the MADT.
632 It is recommended that CPPC (8.4.5) be used as the primary model for processor
633 performance control on arm64. C-states and P-states may become available at
634 some point in the future, but most current design work appears to favor CPPC.
636 Further, it is essential that the ARMv8 SoC provide a fully functional
637 implementation of PSCI; this will be the only mechanism supported by ACPI
638 to control CPU power state. Booting of secondary CPUs using the ACPI
639 parking protocol is possible, but discouraged, since only PSCI is supported
643 ACPI System Address Map Interfaces
644 ----------------------------------
645 In Section 15 of the ACPI specification, several methods are mentioned as
646 possible mechanisms for conveying memory resource information to the kernel.
647 For arm64, we will only support UEFI for booting with ACPI, hence the UEFI
648 GetMemoryMap() boot service is the only mechanism that will be used.
651 ACPI Platform Error Interfaces (APEI)
652 -------------------------------------
653 The APEI tables supported are described above.
655 APEI requires the equivalent of an SCI and an NMI on ARMv8. The SCI is used
656 to notify the OSPM of errors that have occurred but can be corrected and the
657 system can continue correct operation, even if possibly degraded. The NMI is
658 used to indicate fatal errors that cannot be corrected, and require immediate
661 Since there is no direct equivalent of the x86 SCI or NMI, arm64 handles
662 these slightly differently. The SCI is handled as a high priority interrupt;
663 given that these are corrected (or correctable) errors being reported, this
664 is sufficient. The NMI is emulated as the highest priority interrupt
665 possible. This implies some caution must be used since there could be
666 interrupts at higher privilege levels or even interrupts at the same priority
667 as the emulated NMI. In Linux, this should not be the case but one should
668 be aware it could happen.
671 ACPI Objects Not Supported on ARM64
672 -----------------------------------
673 While this may change in the future, there are several classes of objects
674 that can be defined, but are not currently of general interest to ARM servers.
675 Some of these objects have x86 equivalents, and may actually make sense in ARM
676 servers. However, there is either no hardware available at present, or there
677 may not even be a non-ARM implementation yet. Hence, they are not currently
680 The following classes of objects are not supported:
682 - Section 9.2: ambient light sensor devices
684 - Section 9.3: battery devices
686 - Section 9.4: lids (e.g., laptop lids)
688 - Section 9.8.2: IDE controllers
690 - Section 9.9: floppy controllers
692 - Section 9.10: GPE block devices
694 - Section 9.15: PC/AT RTC/CMOS devices
696 - Section 9.16: user presence detection devices
698 - Section 9.17: I/O APIC devices; all GICs must be enumerable via MADT
700 - Section 9.18: time and alarm devices (see 9.15)
702 - Section 10: power source and power meter devices
704 - Section 11: thermal management
706 - Section 12: embedded controllers interface
708 - Section 13: SMBus interfaces
711 This also means that there is no support for the following objects:
713 ==== =========================== ==== ==========
714 Name Section Name Section
715 ==== =========================== ==== ==========
716 _ALC 9.3.4 _FDM 9.10.3
717 _ALI 9.3.2 _FIX 6.2.7
718 _ALP 9.3.6 _GAI 10.4.5
719 _ALR 9.3.5 _GHL 10.4.7
720 _ALT 9.3.3 _GTM 9.9.2.1.1
721 _BCT 10.2.2.10 _LID 9.5.1
722 _BDN 6.5.3 _PAI 10.4.4
723 _BIF 10.2.2.1 _PCL 10.3.2
724 _BIX 10.2.2.1 _PIF 10.3.3
725 _BLT 9.2.3 _PMC 10.4.1
726 _BMA 10.2.2.4 _PMD 10.4.8
727 _BMC 10.2.2.12 _PMM 10.4.3
728 _BMD 10.2.2.11 _PRL 10.3.4
729 _BMS 10.2.2.5 _PSR 10.3.1
730 _BST 10.2.2.6 _PTP 10.4.2
731 _BTH 10.2.2.7 _SBS 10.1.3
732 _BTM 10.2.2.9 _SHL 10.4.6
733 _BTP 10.2.2.8 _STM 9.9.2.1.1
734 _DCK 6.5.2 _UPD 9.16.1
735 _EC 12.12 _UPP 9.16.2
736 _FDE 9.10.1 _WPC 10.5.2
737 _FDI 9.10.2 _WPP 10.5.3
738 ==== =========================== ==== ==========