[PATCH] zd1211rw: Add ID for Planex GW-US54GXS
[linux/fpc-iii.git] / include / asm-sparc64 / byteorder.h
blobc69b08af5fe08d5556db52489b7761f582f70c97
1 /* $Id: byteorder.h,v 1.8 1997/12/18 02:44:14 ecd Exp $ */
2 #ifndef _SPARC64_BYTEORDER_H
3 #define _SPARC64_BYTEORDER_H
5 #include <asm/types.h>
6 #include <asm/asi.h>
8 #ifdef __GNUC__
10 static __inline__ __u16 ___arch__swab16p(const __u16 *addr)
12 __u16 ret;
14 __asm__ __volatile__ ("lduha [%1] %2, %0"
15 : "=r" (ret)
16 : "r" (addr), "i" (ASI_PL));
17 return ret;
20 static __inline__ __u32 ___arch__swab32p(const __u32 *addr)
22 __u32 ret;
24 __asm__ __volatile__ ("lduwa [%1] %2, %0"
25 : "=r" (ret)
26 : "r" (addr), "i" (ASI_PL));
27 return ret;
30 static __inline__ __u64 ___arch__swab64p(const __u64 *addr)
32 __u64 ret;
34 __asm__ __volatile__ ("ldxa [%1] %2, %0"
35 : "=r" (ret)
36 : "r" (addr), "i" (ASI_PL));
37 return ret;
40 #define __arch__swab16p(x) ___arch__swab16p(x)
41 #define __arch__swab32p(x) ___arch__swab32p(x)
42 #define __arch__swab64p(x) ___arch__swab64p(x)
44 #define __BYTEORDER_HAS_U64__
46 #endif /* __GNUC__ */
48 #include <linux/byteorder/big_endian.h>
50 #endif /* _SPARC64_BYTEORDER_H */