gpio: rcar: Fix runtime PM imbalance on error
[linux/fpc-iii.git] / drivers / iio / dac / ad5449.c
blobfed3ebaccac4a6e3c90f8176bbf189a698a15de6
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * AD5415, AD5426, AD5429, AD5432, AD5439, AD5443, AD5449 Digital to Analog
4 * Converter driver.
6 * Copyright 2012 Analog Devices Inc.
7 * Author: Lars-Peter Clausen <lars@metafoo.de>
8 */
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/spi/spi.h>
15 #include <linux/slab.h>
16 #include <linux/sysfs.h>
17 #include <linux/regulator/consumer.h>
18 #include <asm/unaligned.h>
20 #include <linux/iio/iio.h>
21 #include <linux/iio/sysfs.h>
23 #include <linux/platform_data/ad5449.h>
25 #define AD5449_MAX_CHANNELS 2
26 #define AD5449_MAX_VREFS 2
28 #define AD5449_CMD_NOOP 0x0
29 #define AD5449_CMD_LOAD_AND_UPDATE(x) (0x1 + (x) * 3)
30 #define AD5449_CMD_READ(x) (0x2 + (x) * 3)
31 #define AD5449_CMD_LOAD(x) (0x3 + (x) * 3)
32 #define AD5449_CMD_CTRL 13
34 #define AD5449_CTRL_SDO_OFFSET 10
35 #define AD5449_CTRL_DAISY_CHAIN BIT(9)
36 #define AD5449_CTRL_HCLR_TO_MIDSCALE BIT(8)
37 #define AD5449_CTRL_SAMPLE_RISING BIT(7)
39 /**
40 * struct ad5449_chip_info - chip specific information
41 * @channels: Channel specification
42 * @num_channels: Number of channels
43 * @has_ctrl: Chip has a control register
45 struct ad5449_chip_info {
46 const struct iio_chan_spec *channels;
47 unsigned int num_channels;
48 bool has_ctrl;
51 /**
52 * struct ad5449 - driver instance specific data
53 * @spi: the SPI device for this driver instance
54 * @chip_info: chip model specific constants, available modes etc
55 * @vref_reg: vref supply regulators
56 * @has_sdo: whether the SDO line is connected
57 * @dac_cache: Cache for the DAC values
58 * @data: spi transfer buffers
60 struct ad5449 {
61 struct spi_device *spi;
62 const struct ad5449_chip_info *chip_info;
63 struct regulator_bulk_data vref_reg[AD5449_MAX_VREFS];
65 bool has_sdo;
66 uint16_t dac_cache[AD5449_MAX_CHANNELS];
69 * DMA (thus cache coherency maintenance) requires the
70 * transfer buffers to live in their own cache lines.
72 __be16 data[2] ____cacheline_aligned;
75 enum ad5449_type {
76 ID_AD5426,
77 ID_AD5429,
78 ID_AD5432,
79 ID_AD5439,
80 ID_AD5443,
81 ID_AD5449,
84 static int ad5449_write(struct iio_dev *indio_dev, unsigned int addr,
85 unsigned int val)
87 struct ad5449 *st = iio_priv(indio_dev);
88 int ret;
90 mutex_lock(&indio_dev->mlock);
91 st->data[0] = cpu_to_be16((addr << 12) | val);
92 ret = spi_write(st->spi, st->data, 2);
93 mutex_unlock(&indio_dev->mlock);
95 return ret;
98 static int ad5449_read(struct iio_dev *indio_dev, unsigned int addr,
99 unsigned int *val)
101 struct ad5449 *st = iio_priv(indio_dev);
102 int ret;
103 struct spi_transfer t[] = {
105 .tx_buf = &st->data[0],
106 .len = 2,
107 .cs_change = 1,
108 }, {
109 .tx_buf = &st->data[1],
110 .rx_buf = &st->data[1],
111 .len = 2,
115 mutex_lock(&indio_dev->mlock);
116 st->data[0] = cpu_to_be16(addr << 12);
117 st->data[1] = cpu_to_be16(AD5449_CMD_NOOP);
119 ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
120 if (ret < 0)
121 goto out_unlock;
123 *val = be16_to_cpu(st->data[1]);
125 out_unlock:
126 mutex_unlock(&indio_dev->mlock);
127 return ret;
130 static int ad5449_read_raw(struct iio_dev *indio_dev,
131 struct iio_chan_spec const *chan, int *val, int *val2, long info)
133 struct ad5449 *st = iio_priv(indio_dev);
134 struct regulator_bulk_data *reg;
135 int scale_uv;
136 int ret;
138 switch (info) {
139 case IIO_CHAN_INFO_RAW:
140 if (st->has_sdo) {
141 ret = ad5449_read(indio_dev,
142 AD5449_CMD_READ(chan->address), val);
143 if (ret)
144 return ret;
145 *val &= 0xfff;
146 } else {
147 *val = st->dac_cache[chan->address];
150 return IIO_VAL_INT;
151 case IIO_CHAN_INFO_SCALE:
152 reg = &st->vref_reg[chan->channel];
153 scale_uv = regulator_get_voltage(reg->consumer);
154 if (scale_uv < 0)
155 return scale_uv;
157 *val = scale_uv / 1000;
158 *val2 = chan->scan_type.realbits;
160 return IIO_VAL_FRACTIONAL_LOG2;
161 default:
162 break;
165 return -EINVAL;
168 static int ad5449_write_raw(struct iio_dev *indio_dev,
169 struct iio_chan_spec const *chan, int val, int val2, long info)
171 struct ad5449 *st = iio_priv(indio_dev);
172 int ret;
174 switch (info) {
175 case IIO_CHAN_INFO_RAW:
176 if (val < 0 || val >= (1 << chan->scan_type.realbits))
177 return -EINVAL;
179 ret = ad5449_write(indio_dev,
180 AD5449_CMD_LOAD_AND_UPDATE(chan->address),
181 val << chan->scan_type.shift);
182 if (ret == 0)
183 st->dac_cache[chan->address] = val;
184 break;
185 default:
186 ret = -EINVAL;
189 return ret;
192 static const struct iio_info ad5449_info = {
193 .read_raw = ad5449_read_raw,
194 .write_raw = ad5449_write_raw,
197 #define AD5449_CHANNEL(chan, bits) { \
198 .type = IIO_VOLTAGE, \
199 .indexed = 1, \
200 .output = 1, \
201 .channel = (chan), \
202 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
203 BIT(IIO_CHAN_INFO_SCALE), \
204 .address = (chan), \
205 .scan_type = { \
206 .sign = 'u', \
207 .realbits = (bits), \
208 .storagebits = 16, \
209 .shift = 12 - (bits), \
210 }, \
213 #define DECLARE_AD5449_CHANNELS(name, bits) \
214 const struct iio_chan_spec name[] = { \
215 AD5449_CHANNEL(0, bits), \
216 AD5449_CHANNEL(1, bits), \
219 static DECLARE_AD5449_CHANNELS(ad5429_channels, 8);
220 static DECLARE_AD5449_CHANNELS(ad5439_channels, 10);
221 static DECLARE_AD5449_CHANNELS(ad5449_channels, 12);
223 static const struct ad5449_chip_info ad5449_chip_info[] = {
224 [ID_AD5426] = {
225 .channels = ad5429_channels,
226 .num_channels = 1,
227 .has_ctrl = false,
229 [ID_AD5429] = {
230 .channels = ad5429_channels,
231 .num_channels = 2,
232 .has_ctrl = true,
234 [ID_AD5432] = {
235 .channels = ad5439_channels,
236 .num_channels = 1,
237 .has_ctrl = false,
239 [ID_AD5439] = {
240 .channels = ad5439_channels,
241 .num_channels = 2,
242 .has_ctrl = true,
244 [ID_AD5443] = {
245 .channels = ad5449_channels,
246 .num_channels = 1,
247 .has_ctrl = false,
249 [ID_AD5449] = {
250 .channels = ad5449_channels,
251 .num_channels = 2,
252 .has_ctrl = true,
256 static const char *ad5449_vref_name(struct ad5449 *st, int n)
258 if (st->chip_info->num_channels == 1)
259 return "VREF";
261 if (n == 0)
262 return "VREFA";
263 else
264 return "VREFB";
267 static int ad5449_spi_probe(struct spi_device *spi)
269 struct ad5449_platform_data *pdata = spi->dev.platform_data;
270 const struct spi_device_id *id = spi_get_device_id(spi);
271 struct iio_dev *indio_dev;
272 struct ad5449 *st;
273 unsigned int i;
274 int ret;
276 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
277 if (indio_dev == NULL)
278 return -ENOMEM;
280 st = iio_priv(indio_dev);
281 spi_set_drvdata(spi, indio_dev);
283 st->chip_info = &ad5449_chip_info[id->driver_data];
284 st->spi = spi;
286 for (i = 0; i < st->chip_info->num_channels; ++i)
287 st->vref_reg[i].supply = ad5449_vref_name(st, i);
289 ret = devm_regulator_bulk_get(&spi->dev, st->chip_info->num_channels,
290 st->vref_reg);
291 if (ret)
292 return ret;
294 ret = regulator_bulk_enable(st->chip_info->num_channels, st->vref_reg);
295 if (ret)
296 return ret;
298 indio_dev->dev.parent = &spi->dev;
299 indio_dev->name = id->name;
300 indio_dev->info = &ad5449_info;
301 indio_dev->modes = INDIO_DIRECT_MODE;
302 indio_dev->channels = st->chip_info->channels;
303 indio_dev->num_channels = st->chip_info->num_channels;
305 if (st->chip_info->has_ctrl) {
306 unsigned int ctrl = 0x00;
307 if (pdata) {
308 if (pdata->hardware_clear_to_midscale)
309 ctrl |= AD5449_CTRL_HCLR_TO_MIDSCALE;
310 ctrl |= pdata->sdo_mode << AD5449_CTRL_SDO_OFFSET;
311 st->has_sdo = pdata->sdo_mode != AD5449_SDO_DISABLED;
312 } else {
313 st->has_sdo = true;
315 ad5449_write(indio_dev, AD5449_CMD_CTRL, ctrl);
318 ret = iio_device_register(indio_dev);
319 if (ret)
320 goto error_disable_reg;
322 return 0;
324 error_disable_reg:
325 regulator_bulk_disable(st->chip_info->num_channels, st->vref_reg);
327 return ret;
330 static int ad5449_spi_remove(struct spi_device *spi)
332 struct iio_dev *indio_dev = spi_get_drvdata(spi);
333 struct ad5449 *st = iio_priv(indio_dev);
335 iio_device_unregister(indio_dev);
337 regulator_bulk_disable(st->chip_info->num_channels, st->vref_reg);
339 return 0;
342 static const struct spi_device_id ad5449_spi_ids[] = {
343 { "ad5415", ID_AD5449 },
344 { "ad5426", ID_AD5426 },
345 { "ad5429", ID_AD5429 },
346 { "ad5432", ID_AD5432 },
347 { "ad5439", ID_AD5439 },
348 { "ad5443", ID_AD5443 },
349 { "ad5449", ID_AD5449 },
352 MODULE_DEVICE_TABLE(spi, ad5449_spi_ids);
354 static struct spi_driver ad5449_spi_driver = {
355 .driver = {
356 .name = "ad5449",
358 .probe = ad5449_spi_probe,
359 .remove = ad5449_spi_remove,
360 .id_table = ad5449_spi_ids,
362 module_spi_driver(ad5449_spi_driver);
364 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
365 MODULE_DESCRIPTION("Analog Devices AD5449 and similar DACs");
366 MODULE_LICENSE("GPL v2");