drivers/misc/mic/host/mic_device.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Intel MIC Platform Software Stack (MPSS)
   4  *
   5  * Copyright(c) 2013 Intel Corporation.
   6  *
   7  * Intel MIC Host driver.
   8  */
   9 #ifndef _MIC_DEVICE_H_
  10 #define _MIC_DEVICE_H_
  11
  12 #include <linux/cdev.h>
  13 #include <linux/idr.h>
  14 #include <linux/notifier.h>
  15 #include <linux/irqreturn.h>
  16 #include <linux/dmaengine.h>
  17 #include <linux/miscdevice.h>
  18 #include <linux/mic_bus.h>
  19 #include "../bus/scif_bus.h"
  20 #include "../bus/vop_bus.h"
  21 #include "../bus/cosm_bus.h"
  22 #include "mic_intr.h"
  23
  24 /**
  25  * enum mic_stepping - MIC stepping ids.
  26  */
  27 enum mic_stepping {
  28         MIC_A0_STEP = 0x0,
  29         MIC_B0_STEP = 0x10,
  30         MIC_B1_STEP = 0x11,
  31         MIC_C0_STEP = 0x20,
  32 };
  33
  34 extern struct cosm_hw_ops cosm_hw_ops;
  35
  36 /**
  37  * struct mic_device -  MIC device information for each card.
  38  *
  39  * @mmio: MMIO bar information.
  40  * @aper: Aperture bar information.
  41  * @family: The MIC family to which this device belongs.
  42  * @ops: MIC HW specific operations.
  43  * @id: The unique device id for this MIC device.
  44  * @stepping: Stepping ID.
  45  * @pdev: Underlying PCI device.
  46  * @mic_mutex: Mutex for synchronizing access to mic_device.
  47  * @intr_ops: HW specific interrupt operations.
  48  * @smpt_ops: Hardware specific SMPT operations.
  49  * @smpt: MIC SMPT information.
  50  * @intr_info: H/W specific interrupt information.
  51  * @irq_info: The OS specific irq information
  52  * @dbg_dir: debugfs directory of this MIC device.
  53  * @bootaddr: MIC boot address.
  54  * @dp: virtio device page
  55  * @dp_dma_addr: virtio device page DMA address.
  56  * @dma_mbdev: MIC BUS DMA device.
  57  * @dma_ch - Array of DMA channels
  58  * @num_dma_ch - Number of DMA channels available
  59  * @scdev: SCIF device on the SCIF virtual bus.
  60  * @vpdev: Virtio over PCIe device on the VOP virtual bus.
  61  * @cosm_dev: COSM device
  62  */
  63 struct mic_device {
  64         struct mic_mw mmio;
  65         struct mic_mw aper;
  66         enum mic_hw_family family;
  67         struct mic_hw_ops *ops;
  68         int id;
  69         enum mic_stepping stepping;
  70         struct pci_dev *pdev;
  71         struct mutex mic_mutex;
  72         struct mic_hw_intr_ops *intr_ops;
  73         struct mic_smpt_ops *smpt_ops;
  74         struct mic_smpt_info *smpt;
  75         struct mic_intr_info *intr_info;
  76         struct mic_irq_info irq_info;
  77         struct dentry *dbg_dir;
  78         u32 bootaddr;
  79         void *dp;
  80         dma_addr_t dp_dma_addr;
  81         struct mbus_device *dma_mbdev;
  82         struct dma_chan *dma_ch[MIC_MAX_DMA_CHAN];
  83         int num_dma_ch;
  84         struct scif_hw_dev *scdev;
  85         struct vop_device *vpdev;
  86         struct cosm_device *cosm_dev;
  87 };
  88
  89 /**
  90  * struct mic_hw_ops - MIC HW specific operations.
  91  * @aper_bar: Aperture bar resource number.
  92  * @mmio_bar: MMIO bar resource number.
  93  * @read_spad: Read from scratch pad register.
  94  * @write_spad: Write to scratch pad register.
  95  * @send_intr: Send an interrupt for a particular doorbell on the card.
  96  * @ack_interrupt: Hardware specific operations to ack the h/w on
  97  * receipt of an interrupt.
  98  * @intr_workarounds: Hardware specific workarounds needed after
  99  * handling an interrupt.
 100  * @reset: Reset the remote processor.
 101  * @reset_fw_ready: Reset firmware ready field.
 102  * @is_fw_ready: Check if firmware is ready for OS download.
 103  * @send_firmware_intr: Send an interrupt to the card firmware.
 104  * @load_mic_fw: Load firmware segments required to boot the card
 105  * into card memory. This includes the kernel, command line, ramdisk etc.
 106  * @get_postcode: Get post code status from firmware.
 107  * @dma_filter: DMA filter function to be used.
 108  */
 109 struct mic_hw_ops {
 110         u8 aper_bar;
 111         u8 mmio_bar;
 112         u32 (*read_spad)(struct mic_device *mdev, unsigned int idx);
 113         void (*write_spad)(struct mic_device *mdev, unsigned int idx, u32 val);
 114         void (*send_intr)(struct mic_device *mdev, int doorbell);
 115         u32 (*ack_interrupt)(struct mic_device *mdev);
 116         void (*intr_workarounds)(struct mic_device *mdev);
 117         void (*reset)(struct mic_device *mdev);
 118         void (*reset_fw_ready)(struct mic_device *mdev);
 119         bool (*is_fw_ready)(struct mic_device *mdev);
 120         void (*send_firmware_intr)(struct mic_device *mdev);
 121         int (*load_mic_fw)(struct mic_device *mdev, const char *buf);
 122         u32 (*get_postcode)(struct mic_device *mdev);
 123         bool (*dma_filter)(struct dma_chan *chan, void *param);
 124 };
 125
 126 /**
 127  * mic_mmio_read - read from an MMIO register.
 128  * @mw: MMIO register base virtual address.
 129  * @offset: register offset.
 130  *
 131  * RETURNS: register value.
 132  */
 133 static inline u32 mic_mmio_read(struct mic_mw *mw, u32 offset)
 134 {
 135         return ioread32(mw->va + offset);
 136 }
 137
 138 /**
 139  * mic_mmio_write - write to an MMIO register.
 140  * @mw: MMIO register base virtual address.
 141  * @val: the data value to put into the register
 142  * @offset: register offset.
 143  *
 144  * RETURNS: none.
 145  */
 146 static inline void
 147 mic_mmio_write(struct mic_mw *mw, u32 val, u32 offset)
 148 {
 149         iowrite32(val, mw->va + offset);
 150 }
 151
 152 void mic_bootparam_init(struct mic_device *mdev);
 153 void mic_create_debug_dir(struct mic_device *dev);
 154 void mic_delete_debug_dir(struct mic_device *dev);
 155 void __init mic_init_debugfs(void);
 156 void mic_exit_debugfs(void);
 157 #endif