gpio: rcar: Fix runtime PM imbalance on error
[linux/fpc-iii.git] / drivers / net / wireless / ath / ath9k / ani.h
blobc40965b4c1e2982859cc2fff8f1e7f4747f376e7
1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #ifndef ANI_H
18 #define ANI_H
20 #define BEACON_RSSI(ahp) (ahp->stats.avgbrssi)
22 /* units are errors per second */
23 #define ATH9K_ANI_OFDM_TRIG_HIGH 3500
24 #define ATH9K_ANI_OFDM_TRIG_HIGH_BELOW_INI 1000
25 #define ATH9K_ANI_OFDM_TRIG_HIGH_OLD 500
27 #define ATH9K_ANI_OFDM_TRIG_LOW 400
28 #define ATH9K_ANI_OFDM_TRIG_LOW_ABOVE_INI 900
29 #define ATH9K_ANI_OFDM_TRIG_LOW_OLD 200
31 #define ATH9K_ANI_CCK_TRIG_HIGH 600
32 #define ATH9K_ANI_CCK_TRIG_HIGH_OLD 200
33 #define ATH9K_ANI_CCK_TRIG_LOW 300
34 #define ATH9K_ANI_CCK_TRIG_LOW_OLD 100
36 #define ATH9K_ANI_SPUR_IMMUNE_LVL 3
37 #define ATH9K_ANI_FIRSTEP_LVL 2
39 #define ATH9K_ANI_RSSI_THR_HIGH 40
40 #define ATH9K_ANI_RSSI_THR_LOW 7
42 #define ATH9K_ANI_PERIOD 300
44 /* in ms */
45 #define ATH9K_ANI_POLLINTERVAL 1000
47 #define ATH9K_SIG_FIRSTEP_SETTING_MIN 0
48 #define ATH9K_SIG_FIRSTEP_SETTING_MAX 20
49 #define ATH9K_SIG_SPUR_IMM_SETTING_MIN 0
50 #define ATH9K_SIG_SPUR_IMM_SETTING_MAX 22
52 /* values here are relative to the INI */
54 enum ath9k_ani_cmd {
55 ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION = 0x1,
56 ATH9K_ANI_FIRSTEP_LEVEL = 0x2,
57 ATH9K_ANI_SPUR_IMMUNITY_LEVEL = 0x4,
58 ATH9K_ANI_MRC_CCK = 0x8,
59 ATH9K_ANI_ALL = 0xfff
62 struct ath9k_mib_stats {
63 u32 ackrcv_bad;
64 u32 rts_bad;
65 u32 rts_good;
66 u32 fcs_bad;
67 u32 beacons;
70 /* INI default values for ANI registers */
71 struct ath9k_ani_default {
72 u16 m1ThreshLow;
73 u16 m2ThreshLow;
74 u16 m1Thresh;
75 u16 m2Thresh;
76 u16 m2CountThr;
77 u16 m2CountThrLow;
78 u16 m1ThreshLowExt;
79 u16 m2ThreshLowExt;
80 u16 m1ThreshExt;
81 u16 m2ThreshExt;
82 u16 firstep;
83 u16 firstepLow;
84 u16 cycpwrThr1;
85 u16 cycpwrThr1Ext;
88 struct ar5416AniState {
89 u8 noiseImmunityLevel;
90 u8 ofdmNoiseImmunityLevel;
91 u8 cckNoiseImmunityLevel;
92 bool ofdmsTurn;
93 u8 mrcCCK;
94 u8 spurImmunityLevel;
95 u8 firstepLevel;
96 bool ofdmWeakSigDetect;
97 u32 listenTime;
98 u32 ofdmPhyErrCount;
99 u32 cckPhyErrCount;
100 struct ath9k_ani_default iniDef;
103 struct ar5416Stats {
104 u32 ast_ani_spurup;
105 u32 ast_ani_spurdown;
106 u32 ast_ani_ofdmon;
107 u32 ast_ani_ofdmoff;
108 u32 ast_ani_cckhigh;
109 u32 ast_ani_ccklow;
110 u32 ast_ani_stepup;
111 u32 ast_ani_stepdown;
112 u32 ast_ani_ofdmerrs;
113 u32 ast_ani_cckerrs;
114 u32 ast_ani_reset;
115 u32 ast_ani_lneg_or_lzero;
116 u32 avgbrssi;
117 struct ath9k_mib_stats ast_mibstats;
119 #define ah_mibStats stats.ast_mibstats
121 void ath9k_enable_mib_counters(struct ath_hw *ah);
122 void ath9k_hw_disable_mib_counters(struct ath_hw *ah);
123 void ath9k_hw_ani_init(struct ath_hw *ah);
125 #endif /* ANI_H */