gpio: rcar: Fix runtime PM imbalance on error
[linux/fpc-iii.git] / drivers / net / wireless / intel / iwlwifi / iwl-config.h
blobd5d984d7ce837dd9e20e86580d5f6a8b5daaa2c5
1 /******************************************************************************
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
6 * GPL LICENSE SUMMARY
8 * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
9 * Copyright (C) 2016 - 2017 Intel Deutschland GmbH
10 * Copyright(c) 2018 - 2019 Intel Corporation
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
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19 * General Public License for more details.
21 * The full GNU General Public License is included in this distribution
22 * in the file called COPYING.
24 * Contact Information:
25 * Intel Linux Wireless <linuxwifi@intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 * BSD LICENSE
30 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
31 * Copyright (C) 2016 - 2017 Intel Deutschland GmbH
32 * Copyright(c) 2018 - 2019 Intel Corporation
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61 *****************************************************************************/
62 #ifndef __IWL_CONFIG_H__
63 #define __IWL_CONFIG_H__
65 #include <linux/types.h>
66 #include <linux/netdevice.h>
67 #include <linux/ieee80211.h>
68 #include <linux/nl80211.h>
69 #include "iwl-csr.h"
71 enum iwl_device_family {
72 IWL_DEVICE_FAMILY_UNDEFINED,
73 IWL_DEVICE_FAMILY_1000,
74 IWL_DEVICE_FAMILY_100,
75 IWL_DEVICE_FAMILY_2000,
76 IWL_DEVICE_FAMILY_2030,
77 IWL_DEVICE_FAMILY_105,
78 IWL_DEVICE_FAMILY_135,
79 IWL_DEVICE_FAMILY_5000,
80 IWL_DEVICE_FAMILY_5150,
81 IWL_DEVICE_FAMILY_6000,
82 IWL_DEVICE_FAMILY_6000i,
83 IWL_DEVICE_FAMILY_6005,
84 IWL_DEVICE_FAMILY_6030,
85 IWL_DEVICE_FAMILY_6050,
86 IWL_DEVICE_FAMILY_6150,
87 IWL_DEVICE_FAMILY_7000,
88 IWL_DEVICE_FAMILY_8000,
89 IWL_DEVICE_FAMILY_9000,
90 IWL_DEVICE_FAMILY_22000,
91 IWL_DEVICE_FAMILY_AX210,
95 * LED mode
96 * IWL_LED_DEFAULT: use device default
97 * IWL_LED_RF_STATE: turn LED on/off based on RF state
98 * LED ON = RF ON
99 * LED OFF = RF OFF
100 * IWL_LED_BLINK: adjust led blink rate based on blink table
101 * IWL_LED_DISABLE: led disabled
103 enum iwl_led_mode {
104 IWL_LED_DEFAULT,
105 IWL_LED_RF_STATE,
106 IWL_LED_BLINK,
107 IWL_LED_DISABLE,
111 * enum iwl_nvm_type - nvm formats
112 * @IWL_NVM: the regular format
113 * @IWL_NVM_EXT: extended NVM format
114 * @IWL_NVM_SDP: NVM format used by 3168 series
116 enum iwl_nvm_type {
117 IWL_NVM,
118 IWL_NVM_EXT,
119 IWL_NVM_SDP,
123 * This is the threshold value of plcp error rate per 100mSecs. It is
124 * used to set and check for the validity of plcp_delta.
126 #define IWL_MAX_PLCP_ERR_THRESHOLD_MIN 1
127 #define IWL_MAX_PLCP_ERR_THRESHOLD_DEF 50
128 #define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF 100
129 #define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF 200
130 #define IWL_MAX_PLCP_ERR_THRESHOLD_MAX 255
131 #define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE 0
133 /* TX queue watchdog timeouts in mSecs */
134 #define IWL_WATCHDOG_DISABLED 0
135 #define IWL_DEF_WD_TIMEOUT 2500
136 #define IWL_LONG_WD_TIMEOUT 10000
137 #define IWL_MAX_WD_TIMEOUT 120000
139 #define IWL_DEFAULT_MAX_TX_POWER 22
140 #define IWL_TX_CSUM_NETIF_FLAGS (NETIF_F_IPV6_CSUM | NETIF_F_IP_CSUM |\
141 NETIF_F_TSO | NETIF_F_TSO6)
143 /* Antenna presence definitions */
144 #define ANT_NONE 0x0
145 #define ANT_INVALID 0xff
146 #define ANT_A BIT(0)
147 #define ANT_B BIT(1)
148 #define ANT_C BIT(2)
149 #define ANT_AB (ANT_A | ANT_B)
150 #define ANT_AC (ANT_A | ANT_C)
151 #define ANT_BC (ANT_B | ANT_C)
152 #define ANT_ABC (ANT_A | ANT_B | ANT_C)
153 #define MAX_ANT_NUM 3
156 static inline u8 num_of_ant(u8 mask)
158 return !!((mask) & ANT_A) +
159 !!((mask) & ANT_B) +
160 !!((mask) & ANT_C);
164 * struct iwl_base_params - params not likely to change within a device family
165 * @max_ll_items: max number of OTP blocks
166 * @shadow_ram_support: shadow support for OTP memory
167 * @led_compensation: compensate on the led on/off time per HW according
168 * to the deviation to achieve the desired led frequency.
169 * The detail algorithm is described in iwl-led.c
170 * @wd_timeout: TX queues watchdog timeout
171 * @max_event_log_size: size of event log buffer size for ucode event logging
172 * @shadow_reg_enable: HW shadow register support
173 * @apmg_wake_up_wa: should the MAC access REQ be asserted when a command
174 * is in flight. This is due to a HW bug in 7260, 3160 and 7265.
175 * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled.
176 * @max_tfd_queue_size: max number of entries in tfd queue.
178 struct iwl_base_params {
179 unsigned int wd_timeout;
181 u16 eeprom_size;
182 u16 max_event_log_size;
184 u8 pll_cfg:1, /* for iwl_pcie_apm_init() */
185 shadow_ram_support:1,
186 shadow_reg_enable:1,
187 pcie_l1_allowed:1,
188 apmg_wake_up_wa:1,
189 scd_chain_ext_wa:1;
191 u16 num_of_queues; /* def: HW dependent */
192 u32 max_tfd_queue_size; /* def: HW dependent */
194 u8 max_ll_items;
195 u8 led_compensation;
199 * @stbc: support Tx STBC and 1*SS Rx STBC
200 * @ldpc: support Tx/Rx with LDPC
201 * @use_rts_for_aggregation: use rts/cts protection for HT traffic
202 * @ht40_bands: bitmap of bands (using %NL80211_BAND_*) that support HT40
204 struct iwl_ht_params {
205 u8 ht_greenfield_support:1,
206 stbc:1,
207 ldpc:1,
208 use_rts_for_aggregation:1;
209 u8 ht40_bands;
213 * Tx-backoff threshold
214 * @temperature: The threshold in Celsius
215 * @backoff: The tx-backoff in uSec
217 struct iwl_tt_tx_backoff {
218 s32 temperature;
219 u32 backoff;
222 #define TT_TX_BACKOFF_SIZE 6
225 * struct iwl_tt_params - thermal throttling parameters
226 * @ct_kill_entry: CT Kill entry threshold
227 * @ct_kill_exit: CT Kill exit threshold
228 * @ct_kill_duration: The time intervals (in uSec) in which the driver needs
229 * to checks whether to exit CT Kill.
230 * @dynamic_smps_entry: Dynamic SMPS entry threshold
231 * @dynamic_smps_exit: Dynamic SMPS exit threshold
232 * @tx_protection_entry: TX protection entry threshold
233 * @tx_protection_exit: TX protection exit threshold
234 * @tx_backoff: Array of thresholds for tx-backoff , in ascending order.
235 * @support_ct_kill: Support CT Kill?
236 * @support_dynamic_smps: Support dynamic SMPS?
237 * @support_tx_protection: Support tx protection?
238 * @support_tx_backoff: Support tx-backoff?
240 struct iwl_tt_params {
241 u32 ct_kill_entry;
242 u32 ct_kill_exit;
243 u32 ct_kill_duration;
244 u32 dynamic_smps_entry;
245 u32 dynamic_smps_exit;
246 u32 tx_protection_entry;
247 u32 tx_protection_exit;
248 struct iwl_tt_tx_backoff tx_backoff[TT_TX_BACKOFF_SIZE];
249 u8 support_ct_kill:1,
250 support_dynamic_smps:1,
251 support_tx_protection:1,
252 support_tx_backoff:1;
256 * information on how to parse the EEPROM
258 #define EEPROM_REG_BAND_1_CHANNELS 0x08
259 #define EEPROM_REG_BAND_2_CHANNELS 0x26
260 #define EEPROM_REG_BAND_3_CHANNELS 0x42
261 #define EEPROM_REG_BAND_4_CHANNELS 0x5C
262 #define EEPROM_REG_BAND_5_CHANNELS 0x74
263 #define EEPROM_REG_BAND_24_HT40_CHANNELS 0x82
264 #define EEPROM_REG_BAND_52_HT40_CHANNELS 0x92
265 #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS 0x80
266 #define EEPROM_REGULATORY_BAND_NO_HT40 0
268 /* lower blocks contain EEPROM image and calibration data */
269 #define OTP_LOW_IMAGE_SIZE_2K (2 * 512 * sizeof(u16)) /* 2 KB */
270 #define OTP_LOW_IMAGE_SIZE_16K (16 * 512 * sizeof(u16)) /* 16 KB */
271 #define OTP_LOW_IMAGE_SIZE_32K (32 * 512 * sizeof(u16)) /* 32 KB */
273 struct iwl_eeprom_params {
274 const u8 regulatory_bands[7];
275 bool enhanced_txpower;
278 /* Tx-backoff power threshold
279 * @pwr: The power limit in mw
280 * @backoff: The tx-backoff in uSec
282 struct iwl_pwr_tx_backoff {
283 u32 pwr;
284 u32 backoff;
288 * struct iwl_cfg_trans - information needed to start the trans
290 * These values are specific to the device ID and do not change when
291 * multiple configs are used for a single device ID. They values are
292 * used, among other things, to boot the NIC so that the HW REV or
293 * RFID can be read before deciding the remaining parameters to use.
295 * @base_params: pointer to basic parameters
296 * @csr: csr flags and addresses that are different across devices
297 * @device_family: the device family
298 * @umac_prph_offset: offset to add to UMAC periphery address
299 * @xtal_latency: power up latency to get the xtal stabilized
300 * @extra_phy_cfg_flags: extra configuration flags to pass to the PHY
301 * @rf_id: need to read rf_id to determine the firmware image
302 * @use_tfh: use TFH
303 * @gen2: 22000 and on transport operation
304 * @mq_rx_supported: multi-queue rx support
305 * @integrated: discrete or integrated
306 * @low_latency_xtal: use the low latency xtal if supported
308 struct iwl_cfg_trans_params {
309 const struct iwl_base_params *base_params;
310 enum iwl_device_family device_family;
311 u32 umac_prph_offset;
312 u32 xtal_latency;
313 u32 extra_phy_cfg_flags;
314 u32 rf_id:1,
315 use_tfh:1,
316 gen2:1,
317 mq_rx_supported:1,
318 integrated:1,
319 low_latency_xtal:1,
320 bisr_workaround:1;
324 * struct iwl_fw_mon_reg - FW monitor register info
325 * @addr: register address
326 * @mask: register mask
328 struct iwl_fw_mon_reg {
329 u32 addr;
330 u32 mask;
334 * struct iwl_fw_mon_regs - FW monitor registers
335 * @write_ptr: write pointer register
336 * @cycle_cnt: cycle count register
337 * @cur_frag: current fragment in use
339 struct iwl_fw_mon_regs {
340 struct iwl_fw_mon_reg write_ptr;
341 struct iwl_fw_mon_reg cycle_cnt;
342 struct iwl_fw_mon_reg cur_frag;
346 * struct iwl_cfg
347 * @trans: the trans-specific configuration part
348 * @name: Official name of the device
349 * @fw_name_pre: Firmware filename prefix. The api version and extension
350 * (.ucode) will be added to filename before loading from disk. The
351 * filename is constructed as fw_name_pre<api>.ucode.
352 * @ucode_api_max: Highest version of uCode API supported by driver.
353 * @ucode_api_min: Lowest version of uCode API supported by driver.
354 * @max_inst_size: The maximal length of the fw inst section (only DVM)
355 * @max_data_size: The maximal length of the fw data section (only DVM)
356 * @valid_tx_ant: valid transmit antenna
357 * @valid_rx_ant: valid receive antenna
358 * @non_shared_ant: the antenna that is for WiFi only
359 * @nvm_ver: NVM version
360 * @nvm_calib_ver: NVM calibration version
361 * @lib: pointer to the lib ops
362 * @ht_params: point to ht parameters
363 * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)
364 * @rx_with_siso_diversity: 1x1 device with rx antenna diversity
365 * @tx_with_siso_diversity: 1x1 device with tx antenna diversity
366 * @internal_wimax_coex: internal wifi/wimax combo device
367 * @high_temp: Is this NIC is designated to be in high temperature.
368 * @host_interrupt_operation_mode: device needs host interrupt operation
369 * mode set
370 * @nvm_hw_section_num: the ID of the HW NVM section
371 * @mac_addr_from_csr: read HW address from CSR registers
372 * @features: hw features, any combination of feature_whitelist
373 * @pwr_tx_backoffs: translation table between power limits and backoffs
374 * @max_tx_agg_size: max TX aggregation size of the ADDBA request/response
375 * @max_ht_ampdu_factor: the exponent of the max length of A-MPDU that the
376 * station can receive in HT
377 * @max_vht_ampdu_exponent: the exponent of the max length of A-MPDU that the
378 * station can receive in VHT
379 * @dccm_offset: offset from which DCCM begins
380 * @dccm_len: length of DCCM (including runtime stack CCM)
381 * @dccm2_offset: offset from which the second DCCM begins
382 * @dccm2_len: length of the second DCCM
383 * @smem_offset: offset from which the SMEM begins
384 * @smem_len: the length of SMEM
385 * @vht_mu_mimo_supported: VHT MU-MIMO support
386 * @cdb: CDB support
387 * @nvm_type: see &enum iwl_nvm_type
388 * @d3_debug_data_base_addr: base address where D3 debug data is stored
389 * @d3_debug_data_length: length of the D3 debug data
390 * @bisr_workaround: BISR hardware workaround (for 22260 series devices)
391 * @min_txq_size: minimum number of slots required in a TX queue
392 * @uhb_supported: ultra high band channels supported
393 * @min_256_ba_txq_size: minimum number of slots required in a TX queue which
394 * supports 256 BA aggregation
395 * @num_rbds: number of receive buffer descriptors to use
396 * (only used for multi-queue capable devices)
398 * We enable the driver to be backward compatible wrt. hardware features.
399 * API differences in uCode shouldn't be handled here but through TLVs
400 * and/or the uCode API version instead.
402 struct iwl_cfg {
403 struct iwl_cfg_trans_params trans;
404 /* params specific to an individual device within a device family */
405 const char *name;
406 const char *fw_name_pre;
407 /* params likely to change within a device family */
408 const struct iwl_ht_params *ht_params;
409 const struct iwl_eeprom_params *eeprom_params;
410 const struct iwl_pwr_tx_backoff *pwr_tx_backoffs;
411 const char *default_nvm_file_C_step;
412 const struct iwl_tt_params *thermal_params;
413 enum iwl_led_mode led_mode;
414 enum iwl_nvm_type nvm_type;
415 u32 max_data_size;
416 u32 max_inst_size;
417 netdev_features_t features;
418 u32 dccm_offset;
419 u32 dccm_len;
420 u32 dccm2_offset;
421 u32 dccm2_len;
422 u32 smem_offset;
423 u32 smem_len;
424 u16 nvm_ver;
425 u16 nvm_calib_ver;
426 u32 rx_with_siso_diversity:1,
427 tx_with_siso_diversity:1,
428 bt_shared_single_ant:1,
429 internal_wimax_coex:1,
430 host_interrupt_operation_mode:1,
431 high_temp:1,
432 mac_addr_from_csr:1,
433 lp_xtal_workaround:1,
434 disable_dummy_notification:1,
435 apmg_not_supported:1,
436 vht_mu_mimo_supported:1,
437 cdb:1,
438 dbgc_supported:1,
439 uhb_supported:1;
440 u8 valid_tx_ant;
441 u8 valid_rx_ant;
442 u8 non_shared_ant;
443 u8 nvm_hw_section_num;
444 u8 max_tx_agg_size;
445 u8 max_ht_ampdu_exponent;
446 u8 max_vht_ampdu_exponent;
447 u8 ucode_api_max;
448 u8 ucode_api_min;
449 u16 num_rbds;
450 u32 min_umac_error_event_table;
451 u32 d3_debug_data_base_addr;
452 u32 d3_debug_data_length;
453 u32 min_txq_size;
454 u32 gp2_reg_addr;
455 u32 min_256_ba_txq_size;
456 const struct iwl_fw_mon_regs mon_dram_regs;
457 const struct iwl_fw_mon_regs mon_smem_regs;
460 #define IWL_CFG_ANY (~0)
462 #define IWL_CFG_MAC_TYPE_PU 0x31
463 #define IWL_CFG_MAC_TYPE_PNJ 0x32
464 #define IWL_CFG_MAC_TYPE_TH 0x32
465 #define IWL_CFG_MAC_TYPE_QU 0x33
466 #define IWL_CFG_MAC_TYPE_QUZ 0x35
467 #define IWL_CFG_MAC_TYPE_QNJ 0x36
469 #define IWL_CFG_RF_TYPE_TH 0x105
470 #define IWL_CFG_RF_TYPE_TH1 0x108
471 #define IWL_CFG_RF_TYPE_JF2 0x105
472 #define IWL_CFG_RF_TYPE_JF1 0x108
474 #define IWL_CFG_RF_ID_TH 0x1
475 #define IWL_CFG_RF_ID_TH1 0x1
476 #define IWL_CFG_RF_ID_JF 0x3
477 #define IWL_CFG_RF_ID_JF1 0x6
478 #define IWL_CFG_RF_ID_JF1_DIV 0xA
480 #define IWL_CFG_NO_160 0x0
481 #define IWL_CFG_160 0x1
483 #define IWL_CFG_CORES_BT 0x0
484 #define IWL_CFG_CORES_BT_GNSS 0x5
486 #define IWL_SUBDEVICE_RF_ID(subdevice) ((u16)((subdevice) & 0x00F0) >> 4)
487 #define IWL_SUBDEVICE_NO_160(subdevice) ((u16)((subdevice) & 0x0100) >> 9)
488 #define IWL_SUBDEVICE_CORES(subdevice) ((u16)((subdevice) & 0x1C00) >> 10)
490 struct iwl_dev_info {
491 u16 device;
492 u16 subdevice;
493 u16 mac_type;
494 u16 rf_type;
495 u8 mac_step;
496 u8 rf_id;
497 u8 no_160;
498 u8 cores;
499 const struct iwl_cfg *cfg;
500 const char *name;
504 * This list declares the config structures for all devices.
506 extern const struct iwl_cfg_trans_params iwl9000_trans_cfg;
507 extern const struct iwl_cfg_trans_params iwl9560_trans_cfg;
508 extern const struct iwl_cfg_trans_params iwl9560_shared_clk_trans_cfg;
509 extern const struct iwl_cfg_trans_params iwl_qu_trans_cfg;
510 extern const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg;
511 extern const struct iwl_cfg_trans_params iwl_qnj_trans_cfg;
512 extern const struct iwl_cfg_trans_params iwl_ax200_trans_cfg;
513 extern const char iwl9162_name[];
514 extern const char iwl9260_name[];
515 extern const char iwl9260_1_name[];
516 extern const char iwl9270_name[];
517 extern const char iwl9461_name[];
518 extern const char iwl9462_name[];
519 extern const char iwl9560_name[];
520 extern const char iwl9162_160_name[];
521 extern const char iwl9260_160_name[];
522 extern const char iwl9270_160_name[];
523 extern const char iwl9461_160_name[];
524 extern const char iwl9462_160_name[];
525 extern const char iwl9560_160_name[];
526 extern const char iwl9260_killer_1550_name[];
527 extern const char iwl9560_killer_1550i_name[];
528 extern const char iwl9560_killer_1550s_name[];
529 extern const char iwl_ax200_name[];
530 extern const char iwl_ax200_killer_1650w_name[];
531 extern const char iwl_ax200_killer_1650x_name[];
533 #if IS_ENABLED(CONFIG_IWLDVM)
534 extern const struct iwl_cfg iwl5300_agn_cfg;
535 extern const struct iwl_cfg iwl5100_agn_cfg;
536 extern const struct iwl_cfg iwl5350_agn_cfg;
537 extern const struct iwl_cfg iwl5100_bgn_cfg;
538 extern const struct iwl_cfg iwl5100_abg_cfg;
539 extern const struct iwl_cfg iwl5150_agn_cfg;
540 extern const struct iwl_cfg iwl5150_abg_cfg;
541 extern const struct iwl_cfg iwl6005_2agn_cfg;
542 extern const struct iwl_cfg iwl6005_2abg_cfg;
543 extern const struct iwl_cfg iwl6005_2bg_cfg;
544 extern const struct iwl_cfg iwl6005_2agn_sff_cfg;
545 extern const struct iwl_cfg iwl6005_2agn_d_cfg;
546 extern const struct iwl_cfg iwl6005_2agn_mow1_cfg;
547 extern const struct iwl_cfg iwl6005_2agn_mow2_cfg;
548 extern const struct iwl_cfg iwl1030_bgn_cfg;
549 extern const struct iwl_cfg iwl1030_bg_cfg;
550 extern const struct iwl_cfg iwl6030_2agn_cfg;
551 extern const struct iwl_cfg iwl6030_2abg_cfg;
552 extern const struct iwl_cfg iwl6030_2bgn_cfg;
553 extern const struct iwl_cfg iwl6030_2bg_cfg;
554 extern const struct iwl_cfg iwl6000i_2agn_cfg;
555 extern const struct iwl_cfg iwl6000i_2abg_cfg;
556 extern const struct iwl_cfg iwl6000i_2bg_cfg;
557 extern const struct iwl_cfg iwl6000_3agn_cfg;
558 extern const struct iwl_cfg iwl6050_2agn_cfg;
559 extern const struct iwl_cfg iwl6050_2abg_cfg;
560 extern const struct iwl_cfg iwl6150_bgn_cfg;
561 extern const struct iwl_cfg iwl6150_bg_cfg;
562 extern const struct iwl_cfg iwl1000_bgn_cfg;
563 extern const struct iwl_cfg iwl1000_bg_cfg;
564 extern const struct iwl_cfg iwl100_bgn_cfg;
565 extern const struct iwl_cfg iwl100_bg_cfg;
566 extern const struct iwl_cfg iwl130_bgn_cfg;
567 extern const struct iwl_cfg iwl130_bg_cfg;
568 extern const struct iwl_cfg iwl2000_2bgn_cfg;
569 extern const struct iwl_cfg iwl2000_2bgn_d_cfg;
570 extern const struct iwl_cfg iwl2030_2bgn_cfg;
571 extern const struct iwl_cfg iwl6035_2agn_cfg;
572 extern const struct iwl_cfg iwl6035_2agn_sff_cfg;
573 extern const struct iwl_cfg iwl105_bgn_cfg;
574 extern const struct iwl_cfg iwl105_bgn_d_cfg;
575 extern const struct iwl_cfg iwl135_bgn_cfg;
576 #endif /* CONFIG_IWLDVM */
577 #if IS_ENABLED(CONFIG_IWLMVM)
578 extern const struct iwl_cfg iwl7260_2ac_cfg;
579 extern const struct iwl_cfg iwl7260_2ac_cfg_high_temp;
580 extern const struct iwl_cfg iwl7260_2n_cfg;
581 extern const struct iwl_cfg iwl7260_n_cfg;
582 extern const struct iwl_cfg iwl3160_2ac_cfg;
583 extern const struct iwl_cfg iwl3160_2n_cfg;
584 extern const struct iwl_cfg iwl3160_n_cfg;
585 extern const struct iwl_cfg iwl3165_2ac_cfg;
586 extern const struct iwl_cfg iwl3168_2ac_cfg;
587 extern const struct iwl_cfg iwl7265_2ac_cfg;
588 extern const struct iwl_cfg iwl7265_2n_cfg;
589 extern const struct iwl_cfg iwl7265_n_cfg;
590 extern const struct iwl_cfg iwl7265d_2ac_cfg;
591 extern const struct iwl_cfg iwl7265d_2n_cfg;
592 extern const struct iwl_cfg iwl7265d_n_cfg;
593 extern const struct iwl_cfg iwl8260_2n_cfg;
594 extern const struct iwl_cfg iwl8260_2ac_cfg;
595 extern const struct iwl_cfg iwl8265_2ac_cfg;
596 extern const struct iwl_cfg iwl8275_2ac_cfg;
597 extern const struct iwl_cfg iwl4165_2ac_cfg;
598 extern const struct iwl_cfg iwl9260_2ac_cfg;
599 extern const struct iwl_cfg iwl9560_qu_b0_jf_b0_cfg;
600 extern const struct iwl_cfg iwl9560_qu_c0_jf_b0_cfg;
601 extern const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg;
602 extern const struct iwl_cfg iwl9560_qnj_b0_jf_b0_cfg;
603 extern const struct iwl_cfg iwl9560_2ac_cfg_soc;
604 extern const struct iwl_cfg iwl_ax101_cfg_qu_hr;
605 extern const struct iwl_cfg iwl_ax101_cfg_qu_c0_hr_b0;
606 extern const struct iwl_cfg iwl_ax101_cfg_quz_hr;
607 extern const struct iwl_cfg iwl_ax200_cfg_cc;
608 extern const struct iwl_cfg iwl_ax201_cfg_qu_hr;
609 extern const struct iwl_cfg iwl_ax201_cfg_qu_hr;
610 extern const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0;
611 extern const struct iwl_cfg iwl_ax201_cfg_quz_hr;
612 extern const struct iwl_cfg iwl_ax1650i_cfg_quz_hr;
613 extern const struct iwl_cfg iwl_ax1650s_cfg_quz_hr;
614 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0;
615 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0;
616 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0;
617 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0;
618 extern const struct iwl_cfg killer1650x_2ax_cfg;
619 extern const struct iwl_cfg killer1650w_2ax_cfg;
620 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_b0_f0;
621 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_b0;
622 extern const struct iwl_cfg iwlax210_2ax_cfg_so_jf_a0;
623 extern const struct iwl_cfg iwlax210_2ax_cfg_so_hr_a0;
624 extern const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0;
625 extern const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0;
626 extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0;
627 extern const struct iwl_cfg iwlax411_2ax_cfg_sosnj_gf4_a0;
628 #endif /* CPTCFG_IWLMVM || CPTCFG_IWLFMAC */
630 #endif /* __IWL_CONFIG_H__ */