1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
10 #define RTW_EFUSE_BANK_WIFI 0x0
12 static void switch_efuse_bank(struct rtw_dev
*rtwdev
)
14 rtw_write32_mask(rtwdev
, REG_LDO_EFUSE_CTRL
, BIT_MASK_EFUSE_BANK_SEL
,
18 #define invalid_efuse_header(hdr1, hdr2) \
19 ((hdr1) == 0xff || (((hdr1) & 0x1f) == 0xf && (hdr2) == 0xff))
20 #define invalid_efuse_content(word_en, i) \
21 (((word_en) & BIT(i)) != 0x0)
22 #define get_efuse_blk_idx_2_byte(hdr1, hdr2) \
23 ((((hdr2) & 0xf0) >> 1) | (((hdr1) >> 5) & 0x07))
24 #define get_efuse_blk_idx_1_byte(hdr1) \
25 (((hdr1) & 0xf0) >> 4)
26 #define block_idx_to_logical_idx(blk_idx, i) \
27 (((blk_idx) << 3) + ((i) << 1))
29 /* efuse header format
31 * | 7 5 4 0 | 7 4 3 0 | 15 8 7 0 |
32 * block[2:0] 0 1111 block[6:3] word_en[3:0] byte0 byte1
33 * | header 1 (optional) | header 2 | word N |
35 * word_en: 4 bits each word. 0 -> write; 1 -> not write
36 * N: 1~4, depends on word_en
38 static int rtw_dump_logical_efuse_map(struct rtw_dev
*rtwdev
, u8
*phy_map
,
41 u32 physical_size
= rtwdev
->efuse
.physical_size
;
42 u32 protect_size
= rtwdev
->efuse
.protect_size
;
43 u32 logical_size
= rtwdev
->efuse
.logical_size
;
50 for (phy_idx
= 0; phy_idx
< physical_size
- protect_size
;) {
51 hdr1
= phy_map
[phy_idx
];
52 hdr2
= phy_map
[phy_idx
+ 1];
53 if (invalid_efuse_header(hdr1
, hdr2
))
56 if ((hdr1
& 0x1f) == 0xf) {
57 /* 2-byte header format */
58 blk_idx
= get_efuse_blk_idx_2_byte(hdr1
, hdr2
);
62 /* 1-byte header format */
63 blk_idx
= get_efuse_blk_idx_1_byte(hdr1
);
68 for (i
= 0; i
< 4; i
++) {
69 if (invalid_efuse_content(word_en
, i
))
72 log_idx
= block_idx_to_logical_idx(blk_idx
, i
);
73 if (phy_idx
+ 1 > physical_size
- protect_size
||
74 log_idx
+ 1 > logical_size
)
77 log_map
[log_idx
] = phy_map
[phy_idx
];
78 log_map
[log_idx
+ 1] = phy_map
[phy_idx
+ 1];
85 static int rtw_dump_physical_efuse_map(struct rtw_dev
*rtwdev
, u8
*map
)
87 struct rtw_chip_info
*chip
= rtwdev
->chip
;
88 u32 size
= rtwdev
->efuse
.physical_size
;
93 switch_efuse_bank(rtwdev
);
95 /* disable 2.5V LDO */
96 chip
->ops
->cfg_ldo25(rtwdev
, false);
98 efuse_ctl
= rtw_read32(rtwdev
, REG_EFUSE_CTRL
);
100 for (addr
= 0; addr
< size
; addr
++) {
101 efuse_ctl
&= ~(BIT_MASK_EF_DATA
| BITS_EF_ADDR
);
102 efuse_ctl
|= (addr
& BIT_MASK_EF_ADDR
) << BIT_SHIFT_EF_ADDR
;
103 rtw_write32(rtwdev
, REG_EFUSE_CTRL
, efuse_ctl
& (~BIT_EF_FLAG
));
108 efuse_ctl
= rtw_read32(rtwdev
, REG_EFUSE_CTRL
);
111 } while (!(efuse_ctl
& BIT_EF_FLAG
));
113 *(map
+ addr
) = (u8
)(efuse_ctl
& BIT_MASK_EF_DATA
);
119 int rtw_parse_efuse_map(struct rtw_dev
*rtwdev
)
121 struct rtw_chip_info
*chip
= rtwdev
->chip
;
122 struct rtw_efuse
*efuse
= &rtwdev
->efuse
;
123 u32 phy_size
= efuse
->physical_size
;
124 u32 log_size
= efuse
->logical_size
;
129 phy_map
= kmalloc(phy_size
, GFP_KERNEL
);
130 log_map
= kmalloc(log_size
, GFP_KERNEL
);
131 if (!phy_map
|| !log_map
) {
136 ret
= rtw_dump_physical_efuse_map(rtwdev
, phy_map
);
138 rtw_err(rtwdev
, "failed to dump efuse physical map\n");
142 memset(log_map
, 0xff, log_size
);
143 ret
= rtw_dump_logical_efuse_map(rtwdev
, phy_map
, log_map
);
145 rtw_err(rtwdev
, "failed to dump efuse logical map\n");
149 ret
= chip
->ops
->read_efuse(rtwdev
, log_map
);
151 rtw_err(rtwdev
, "failed to read efuse map\n");