drivers/net/wireless/realtek/rtw88/fw.h

   1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
   2 /* Copyright(c) 2018-2019  Realtek Corporation
   3  */
   4
   5 #ifndef __RTW_FW_H_
   6 #define __RTW_FW_H_
   7
   8 #define H2C_PKT_SIZE            32
   9 #define H2C_PKT_HDR_SIZE        8
  10
  11 /* FW bin information */
  12 #define FW_HDR_SIZE                     64
  13 #define FW_HDR_CHKSUM_SIZE              8
  14
  15 #define FW_NLO_INFO_CHECK_SIZE          4
  16
  17 #define FIFO_PAGE_SIZE_SHIFT            12
  18 #define FIFO_PAGE_SIZE                  4096
  19 #define RSVD_PAGE_START_ADDR            0x780
  20 #define FIFO_DUMP_ADDR                  0x8000
  21
  22 enum rtw_c2h_cmd_id {
  23         C2H_BT_INFO = 0x09,
  24         C2H_BT_MP_INFO = 0x0b,
  25         C2H_RA_RPT = 0x0c,
  26         C2H_HW_FEATURE_REPORT = 0x19,
  27         C2H_WLAN_INFO = 0x27,
  28         C2H_HW_FEATURE_DUMP = 0xfd,
  29         C2H_HALMAC = 0xff,
  30 };
  31
  32 enum rtw_c2h_cmd_id_ext {
  33         C2H_CCX_RPT = 0x0f,
  34 };
  35
  36 struct rtw_c2h_cmd {
  37         u8 id;
  38         u8 seq;
  39         u8 payload[];
  40 } __packed;
  41
  42 enum rtw_rsvd_packet_type {
  43         RSVD_BEACON,
  44         RSVD_DUMMY,
  45         RSVD_PS_POLL,
  46         RSVD_PROBE_RESP,
  47         RSVD_NULL,
  48         RSVD_QOS_NULL,
  49         RSVD_LPS_PG_DPK,
  50         RSVD_LPS_PG_INFO,
  51         RSVD_PROBE_REQ,
  52         RSVD_NLO_INFO,
  53         RSVD_CH_INFO,
  54 };
  55
  56 enum rtw_fw_rf_type {
  57         FW_RF_1T2R = 0,
  58         FW_RF_2T4R = 1,
  59         FW_RF_2T2R = 2,
  60         FW_RF_2T3R = 3,
  61         FW_RF_1T1R = 4,
  62         FW_RF_2T2R_GREEN = 5,
  63         FW_RF_3T3R = 6,
  64         FW_RF_3T4R = 7,
  65         FW_RF_4T4R = 8,
  66         FW_RF_MAX_TYPE = 0xF,
  67 };
  68
  69 struct rtw_coex_info_req {
  70         u8 seq;
  71         u8 op_code;
  72         u8 para1;
  73         u8 para2;
  74         u8 para3;
  75 };
  76
  77 struct rtw_iqk_para {
  78         u8 clear;
  79         u8 segment_iqk;
  80 };
  81
  82 struct rtw_lps_pg_dpk_hdr {
  83         u16 dpk_path_ok;
  84         u8 dpk_txagc[2];
  85         u16 dpk_gs[2];
  86         u32 coef[2][20];
  87         u8 dpk_ch;
  88 } __packed;
  89
  90 struct rtw_lps_pg_info_hdr {
  91         u8 macid;
  92         u8 mbssid;
  93         u8 pattern_count;
  94         u8 mu_tab_group_id;
  95         u8 sec_cam_count;
  96         u8 tx_bu_page_count;
  97         u16 rsvd;
  98         u8 sec_cam[MAX_PG_CAM_BACKUP_NUM];
  99 } __packed;
 100
 101 struct rtw_rsvd_page {
 102         /* associated with each vif */
 103         struct list_head vif_list;
 104         struct rtw_vif *rtwvif;
 105
 106         /* associated when build rsvd page */
 107         struct list_head build_list;
 108
 109         struct sk_buff *skb;
 110         enum rtw_rsvd_packet_type type;
 111         u8 page;
 112         bool add_txdesc;
 113         struct cfg80211_ssid *ssid;
 114 };
 115
 116 enum rtw_keep_alive_pkt_type {
 117         KEEP_ALIVE_NULL_PKT = 0,
 118         KEEP_ALIVE_ARP_RSP = 1,
 119 };
 120
 121 struct rtw_nlo_info_hdr {
 122         u8 nlo_count;
 123         u8 hidden_ap_count;
 124         u8 rsvd1[2];
 125         u8 pattern_check[FW_NLO_INFO_CHECK_SIZE];
 126         u8 rsvd2[8];
 127         u8 ssid_len[16];
 128         u8 chiper[16];
 129         u8 rsvd3[16];
 130         u8 location[8];
 131 } __packed;
 132
 133 enum rtw_packet_type {
 134         RTW_PACKET_PROBE_REQ = 0x00,
 135
 136         RTW_PACKET_UNDEFINE = 0x7FFFFFFF,
 137 };
 138
 139 struct rtw_fw_wow_keep_alive_para {
 140         bool adopt;
 141         u8 pkt_type;
 142         u8 period;              /* unit: sec */
 143 };
 144
 145 struct rtw_fw_wow_disconnect_para {
 146         bool adopt;
 147         u8 period;              /* unit: sec */
 148         u8 retry_count;
 149 };
 150
 151 struct rtw_ch_switch_option {
 152         u8 periodic_option;
 153         u32 tsf_high;
 154         u32 tsf_low;
 155         u8 dest_ch_en;
 156         u8 absolute_time_en;
 157         u8 dest_ch;
 158         u8 normal_period;
 159         u8 normal_period_sel;
 160         u8 normal_cycle;
 161         u8 slow_period;
 162         u8 slow_period_sel;
 163         u8 nlo_en;
 164 };
 165
 166 struct rtw_fw_hdr {
 167         __le16 signature;
 168         u8 category;
 169         u8 function;
 170         __le16 version;         /* 0x04 */
 171         u8 subversion;
 172         u8 subindex;
 173         __le32 rsvd;            /* 0x08 */
 174         __le32 rsvd2;           /* 0x0C */
 175         u8 month;               /* 0x10 */
 176         u8 day;
 177         u8 hour;
 178         u8 min;
 179         __le16 year;            /* 0x14 */
 180         __le16 rsvd3;
 181         u8 mem_usage;           /* 0x18 */
 182         u8 rsvd4[3];
 183         __le16 h2c_fmt_ver;     /* 0x1C */
 184         __le16 rsvd5;
 185         __le32 dmem_addr;       /* 0x20 */
 186         __le32 dmem_size;
 187         __le32 rsvd6;
 188         __le32 rsvd7;
 189         __le32 imem_size;       /* 0x30 */
 190         __le32 emem_size;
 191         __le32 emem_addr;
 192         __le32 imem_addr;
 193 } __packed;
 194
 195 /* C2H */
 196 #define GET_CCX_REPORT_SEQNUM(c2h_payload)      (c2h_payload[8] & 0xfc)
 197 #define GET_CCX_REPORT_STATUS(c2h_payload)      (c2h_payload[9] & 0xc0)
 198
 199 #define GET_RA_REPORT_RATE(c2h_payload)         (c2h_payload[0] & 0x7f)
 200 #define GET_RA_REPORT_SGI(c2h_payload)          ((c2h_payload[0] & 0x80) >> 7)
 201 #define GET_RA_REPORT_BW(c2h_payload)           (c2h_payload[6])
 202 #define GET_RA_REPORT_MACID(c2h_payload)        (c2h_payload[1])
 203
 204 /* PKT H2C */
 205 #define H2C_PKT_CMD_ID 0xFF
 206 #define H2C_PKT_CATEGORY 0x01
 207
 208 #define H2C_PKT_GENERAL_INFO 0x0D
 209 #define H2C_PKT_PHYDM_INFO 0x11
 210 #define H2C_PKT_IQK 0x0E
 211
 212 #define H2C_PKT_CH_SWITCH 0x02
 213 #define H2C_PKT_UPDATE_PKT 0x0C
 214
 215 #define H2C_PKT_CH_SWITCH_LEN 0x20
 216 #define H2C_PKT_UPDATE_PKT_LEN 0x4
 217
 218 #define SET_PKT_H2C_CATEGORY(h2c_pkt, value)                                   \
 219         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(6, 0))
 220 #define SET_PKT_H2C_CMD_ID(h2c_pkt, value)                                     \
 221         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
 222 #define SET_PKT_H2C_SUB_CMD_ID(h2c_pkt, value)                                 \
 223         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 16))
 224 #define SET_PKT_H2C_TOTAL_LEN(h2c_pkt, value)                                  \
 225         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 0))
 226
 227 static inline void rtw_h2c_pkt_set_header(u8 *h2c_pkt, u8 sub_id)
 228 {
 229         SET_PKT_H2C_CATEGORY(h2c_pkt, H2C_PKT_CATEGORY);
 230         SET_PKT_H2C_CMD_ID(h2c_pkt, H2C_PKT_CMD_ID);
 231         SET_PKT_H2C_SUB_CMD_ID(h2c_pkt, sub_id);
 232 }
 233
 234 #define FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt, value)                             \
 235         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(31, 16))
 236 #define GENERAL_INFO_SET_FW_TX_BOUNDARY(h2c_pkt, value)                        \
 237         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16))
 238
 239 #define PHYDM_INFO_SET_REF_TYPE(h2c_pkt, value)                                \
 240         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(7, 0))
 241 #define PHYDM_INFO_SET_RF_TYPE(h2c_pkt, value)                                 \
 242         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 8))
 243 #define PHYDM_INFO_SET_CUT_VER(h2c_pkt, value)                                 \
 244         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16))
 245 #define PHYDM_INFO_SET_RX_ANT_STATUS(h2c_pkt, value)                           \
 246         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(27, 24))
 247 #define PHYDM_INFO_SET_TX_ANT_STATUS(h2c_pkt, value)                           \
 248         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(31, 28))
 249 #define IQK_SET_CLEAR(h2c_pkt, value)                                          \
 250         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(0))
 251 #define IQK_SET_SEGMENT_IQK(h2c_pkt, value)                                    \
 252         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(1))
 253
 254 #define CHSW_INFO_SET_CH(pkt, value)                                           \
 255         le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(7, 0))
 256 #define CHSW_INFO_SET_PRI_CH_IDX(pkt, value)                                   \
 257         le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(11, 8))
 258 #define CHSW_INFO_SET_BW(pkt, value)                                           \
 259         le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(15, 12))
 260 #define CHSW_INFO_SET_TIMEOUT(pkt, value)                                      \
 261         le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(23, 16))
 262 #define CHSW_INFO_SET_ACTION_ID(pkt, value)                                    \
 263         le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(30, 24))
 264
 265 #define UPDATE_PKT_SET_SIZE(h2c_pkt, value)                                    \
 266         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 0))
 267 #define UPDATE_PKT_SET_PKT_ID(h2c_pkt, value)                                  \
 268         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16))
 269 #define UPDATE_PKT_SET_LOCATION(h2c_pkt, value)                                \
 270         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(31, 24))
 271
 272 #define CH_SWITCH_SET_START(h2c_pkt, value)                                    \
 273         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(0))
 274 #define CH_SWITCH_SET_DEST_CH_EN(h2c_pkt, value)                               \
 275         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(1))
 276 #define CH_SWITCH_SET_ABSOLUTE_TIME(h2c_pkt, value)                            \
 277         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(2))
 278 #define CH_SWITCH_SET_PERIODIC_OPT(h2c_pkt, value)                             \
 279         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(4, 3))
 280 #define CH_SWITCH_SET_INFO_LOC(h2c_pkt, value)                                 \
 281         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 8))
 282 #define CH_SWITCH_SET_CH_NUM(h2c_pkt, value)                                   \
 283         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16))
 284 #define CH_SWITCH_SET_PRI_CH_IDX(h2c_pkt, value)                               \
 285         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(27, 24))
 286 #define CH_SWITCH_SET_DEST_CH(h2c_pkt, value)                                  \
 287         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(7, 0))
 288 #define CH_SWITCH_SET_NORMAL_PERIOD(h2c_pkt, value)                            \
 289         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(13, 8))
 290 #define CH_SWITCH_SET_NORMAL_PERIOD_SEL(h2c_pkt, value)                        \
 291         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(15, 14))
 292 #define CH_SWITCH_SET_SLOW_PERIOD(h2c_pkt, value)                              \
 293         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(21, 16))
 294 #define CH_SWITCH_SET_SLOW_PERIOD_SEL(h2c_pkt, value)                          \
 295         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(23, 22))
 296 #define CH_SWITCH_SET_NORMAL_CYCLE(h2c_pkt, value)                             \
 297         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(31, 24))
 298 #define CH_SWITCH_SET_TSF_HIGH(h2c_pkt, value)                                 \
 299         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x04, value, GENMASK(31, 0))
 300 #define CH_SWITCH_SET_TSF_LOW(h2c_pkt, value)                                  \
 301         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x05, value, GENMASK(31, 0))
 302 #define CH_SWITCH_SET_INFO_SIZE(h2c_pkt, value)                                \
 303         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x06, value, GENMASK(15, 0))
 304
 305 /* Command H2C */
 306 #define H2C_CMD_RSVD_PAGE               0x0
 307 #define H2C_CMD_MEDIA_STATUS_RPT        0x01
 308 #define H2C_CMD_SET_PWR_MODE            0x20
 309 #define H2C_CMD_LPS_PG_INFO             0x2b
 310 #define H2C_CMD_RA_INFO                 0x40
 311 #define H2C_CMD_RSSI_MONITOR            0x42
 312
 313 #define H2C_CMD_COEX_TDMA_TYPE          0x60
 314 #define H2C_CMD_QUERY_BT_INFO           0x61
 315 #define H2C_CMD_FORCE_BT_TX_POWER       0x62
 316 #define H2C_CMD_IGNORE_WLAN_ACTION      0x63
 317 #define H2C_CMD_WL_CH_INFO              0x66
 318 #define H2C_CMD_QUERY_BT_MP_INFO        0x67
 319 #define H2C_CMD_BT_WIFI_CONTROL         0x69
 320
 321 #define H2C_CMD_KEEP_ALIVE              0x03
 322 #define H2C_CMD_DISCONNECT_DECISION     0x04
 323 #define H2C_CMD_WOWLAN                  0x80
 324 #define H2C_CMD_REMOTE_WAKE_CTRL        0x81
 325 #define H2C_CMD_AOAC_GLOBAL_INFO        0x82
 326 #define H2C_CMD_NLO_INFO                0x8C
 327
 328 #define SET_H2C_CMD_ID_CLASS(h2c_pkt, value)                                   \
 329         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(7, 0))
 330
 331 #define MEDIA_STATUS_RPT_SET_OP_MODE(h2c_pkt, value)                           \
 332         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
 333 #define MEDIA_STATUS_RPT_SET_MACID(h2c_pkt, value)                             \
 334         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
 335
 336 #define SET_PWR_MODE_SET_MODE(h2c_pkt, value)                                  \
 337         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(14, 8))
 338 #define SET_PWR_MODE_SET_RLBM(h2c_pkt, value)                                  \
 339         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(19, 16))
 340 #define SET_PWR_MODE_SET_SMART_PS(h2c_pkt, value)                              \
 341         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 20))
 342 #define SET_PWR_MODE_SET_AWAKE_INTERVAL(h2c_pkt, value)                        \
 343         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
 344 #define SET_PWR_MODE_SET_PORT_ID(h2c_pkt, value)                               \
 345         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 5))
 346 #define SET_PWR_MODE_SET_PWR_STATE(h2c_pkt, value)                             \
 347         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
 348 #define LPS_PG_INFO_LOC(h2c_pkt, value)                                        \
 349         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
 350 #define LPS_PG_DPK_LOC(h2c_pkt, value)                                         \
 351         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
 352 #define LPS_PG_SEC_CAM_EN(h2c_pkt, value)                                      \
 353         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
 354 #define LPS_PG_PATTERN_CAM_EN(h2c_pkt, value)                                  \
 355         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10))
 356 #define SET_RSSI_INFO_MACID(h2c_pkt, value)                                    \
 357         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
 358 #define SET_RSSI_INFO_RSSI(h2c_pkt, value)                                     \
 359         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
 360 #define SET_RSSI_INFO_STBC(h2c_pkt, value)                                     \
 361         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, BIT(1))
 362 #define SET_RA_INFO_MACID(h2c_pkt, value)                                      \
 363         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
 364 #define SET_RA_INFO_RATE_ID(h2c_pkt, value)                                    \
 365         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(20, 16))
 366 #define SET_RA_INFO_INIT_RA_LVL(h2c_pkt, value)                                \
 367         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(22, 21))
 368 #define SET_RA_INFO_SGI_EN(h2c_pkt, value)                                     \
 369         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(23))
 370 #define SET_RA_INFO_BW_MODE(h2c_pkt, value)                                    \
 371         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(25, 24))
 372 #define SET_RA_INFO_LDPC(h2c_pkt, value)                                       \
 373         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(26))
 374 #define SET_RA_INFO_NO_UPDATE(h2c_pkt, value)                                  \
 375         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(27))
 376 #define SET_RA_INFO_VHT_EN(h2c_pkt, value)                                     \
 377         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(29, 28))
 378 #define SET_RA_INFO_DIS_PT(h2c_pkt, value)                                     \
 379         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(30))
 380 #define SET_RA_INFO_RA_MASK0(h2c_pkt, value)                                   \
 381         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0))
 382 #define SET_RA_INFO_RA_MASK1(h2c_pkt, value)                                   \
 383         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
 384 #define SET_RA_INFO_RA_MASK2(h2c_pkt, value)                                   \
 385         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16))
 386 #define SET_RA_INFO_RA_MASK3(h2c_pkt, value)                                   \
 387         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(31, 24))
 388 #define SET_QUERY_BT_INFO(h2c_pkt, value)                                      \
 389         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
 390 #define SET_WL_CH_INFO_LINK(h2c_pkt, value)                                    \
 391         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
 392 #define SET_WL_CH_INFO_CHNL(h2c_pkt, value)                                    \
 393         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
 394 #define SET_WL_CH_INFO_BW(h2c_pkt, value)                                      \
 395         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
 396 #define SET_BT_MP_INFO_SEQ(h2c_pkt, value)                                     \
 397         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 12))
 398 #define SET_BT_MP_INFO_OP_CODE(h2c_pkt, value)                                 \
 399         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
 400 #define SET_BT_MP_INFO_PARA1(h2c_pkt, value)                                   \
 401         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
 402 #define SET_BT_MP_INFO_PARA2(h2c_pkt, value)                                   \
 403         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0))
 404 #define SET_BT_MP_INFO_PARA3(h2c_pkt, value)                                   \
 405         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
 406 #define SET_BT_TX_POWER_INDEX(h2c_pkt, value)                                  \
 407         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
 408 #define SET_IGNORE_WLAN_ACTION_EN(h2c_pkt, value)                              \
 409         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
 410 #define SET_COEX_TDMA_TYPE_PARA1(h2c_pkt, value)                               \
 411         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
 412 #define SET_COEX_TDMA_TYPE_PARA2(h2c_pkt, value)                               \
 413         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
 414 #define SET_COEX_TDMA_TYPE_PARA3(h2c_pkt, value)                               \
 415         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
 416 #define SET_COEX_TDMA_TYPE_PARA4(h2c_pkt, value)                               \
 417         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0))
 418 #define SET_COEX_TDMA_TYPE_PARA5(h2c_pkt, value)                               \
 419         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
 420 #define SET_BT_WIFI_CONTROL_OP_CODE(h2c_pkt, value)                            \
 421         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
 422 #define SET_BT_WIFI_CONTROL_DATA1(h2c_pkt, value)                              \
 423         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
 424 #define SET_BT_WIFI_CONTROL_DATA2(h2c_pkt, value)                              \
 425         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
 426 #define SET_BT_WIFI_CONTROL_DATA3(h2c_pkt, value)                              \
 427         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0))
 428 #define SET_BT_WIFI_CONTROL_DATA4(h2c_pkt, value)                              \
 429         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
 430 #define SET_BT_WIFI_CONTROL_DATA5(h2c_pkt, value)                              \
 431         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16))
 432
 433 #define SET_KEEP_ALIVE_ENABLE(h2c_pkt, value)                                  \
 434         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
 435 #define SET_KEEP_ALIVE_ADOPT(h2c_pkt, value)                                   \
 436         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9))
 437 #define SET_KEEP_ALIVE_PKT_TYPE(h2c_pkt, value)                                \
 438         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10))
 439 #define SET_KEEP_ALIVE_CHECK_PERIOD(h2c_pkt, value)                            \
 440         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
 441
 442 #define SET_DISCONNECT_DECISION_ENABLE(h2c_pkt, value)                         \
 443         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
 444 #define SET_DISCONNECT_DECISION_ADOPT(h2c_pkt, value)                          \
 445         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9))
 446 #define SET_DISCONNECT_DECISION_CHECK_PERIOD(h2c_pkt, value)                   \
 447         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
 448 #define SET_DISCONNECT_DECISION_TRY_PKT_NUM(h2c_pkt, value)                    \
 449         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
 450
 451 #define SET_WOWLAN_FUNC_ENABLE(h2c_pkt, value)                                 \
 452         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
 453 #define SET_WOWLAN_PATTERN_MATCH_ENABLE(h2c_pkt, value)                        \
 454         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9))
 455 #define SET_WOWLAN_MAGIC_PKT_ENABLE(h2c_pkt, value)                            \
 456         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10))
 457 #define SET_WOWLAN_UNICAST_PKT_ENABLE(h2c_pkt, value)                          \
 458         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(11))
 459 #define SET_WOWLAN_REKEY_WAKEUP_ENABLE(h2c_pkt, value)                         \
 460         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(14))
 461 #define SET_WOWLAN_DEAUTH_WAKEUP_ENABLE(h2c_pkt, value)                        \
 462         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(15))
 463
 464 #define SET_REMOTE_WAKECTRL_ENABLE(h2c_pkt, value)                             \
 465         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
 466 #define SET_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(h2c_pkt, value)                    \
 467         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(12))
 468
 469 #define SET_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(h2c_pkt, value)                  \
 470         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
 471 #define SET_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(h2c_pkt, value)                     \
 472         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
 473
 474 #define SET_NLO_FUN_EN(h2c_pkt, value)                                         \
 475         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
 476 #define SET_NLO_PS_32K(h2c_pkt, value)                                         \
 477         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9))
 478 #define SET_NLO_IGNORE_SECURITY(h2c_pkt, value)                                \
 479         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10))
 480 #define SET_NLO_LOC_NLO_INFO(h2c_pkt, value)                                   \
 481         le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
 482
 483 static inline struct rtw_c2h_cmd *get_c2h_from_skb(struct sk_buff *skb)
 484 {
 485         u32 pkt_offset;
 486
 487         pkt_offset = *((u32 *)skb->cb);
 488         return (struct rtw_c2h_cmd *)(skb->data + pkt_offset);
 489 }
 490
 491 void rtw_fw_c2h_cmd_rx_irqsafe(struct rtw_dev *rtwdev, u32 pkt_offset,
 492                                struct sk_buff *skb);
 493 void rtw_fw_c2h_cmd_handle(struct rtw_dev *rtwdev, struct sk_buff *skb);
 494 void rtw_fw_send_general_info(struct rtw_dev *rtwdev);
 495 void rtw_fw_send_phydm_info(struct rtw_dev *rtwdev);
 496
 497 void rtw_fw_do_iqk(struct rtw_dev *rtwdev, struct rtw_iqk_para *para);
 498 void rtw_fw_set_pwr_mode(struct rtw_dev *rtwdev);
 499 void rtw_fw_set_pg_info(struct rtw_dev *rtwdev);
 500 void rtw_fw_query_bt_info(struct rtw_dev *rtwdev);
 501 void rtw_fw_wl_ch_info(struct rtw_dev *rtwdev, u8 link, u8 ch, u8 bw);
 502 void rtw_fw_query_bt_mp_info(struct rtw_dev *rtwdev,
 503                              struct rtw_coex_info_req *req);
 504 void rtw_fw_force_bt_tx_power(struct rtw_dev *rtwdev, u8 bt_pwr_dec_lvl);
 505 void rtw_fw_bt_ignore_wlan_action(struct rtw_dev *rtwdev, bool enable);
 506 void rtw_fw_coex_tdma_type(struct rtw_dev *rtwdev,
 507                            u8 para1, u8 para2, u8 para3, u8 para4, u8 para5);
 508 void rtw_fw_bt_wifi_control(struct rtw_dev *rtwdev, u8 op_code, u8 *data);
 509 void rtw_fw_send_rssi_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si);
 510 void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si);
 511 void rtw_fw_media_status_report(struct rtw_dev *rtwdev, u8 mac_id, bool conn);
 512 int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr,
 513                                 u8 *buf, u32 size);
 514 void rtw_remove_rsvd_page(struct rtw_dev *rtwdev,
 515                           struct rtw_vif *rtwvif);
 516 void rtw_add_rsvd_page_bcn(struct rtw_dev *rtwdev,
 517                            struct rtw_vif *rtwvif);
 518 void rtw_add_rsvd_page_pno(struct rtw_dev *rtwdev,
 519                            struct rtw_vif *rtwvif);
 520 void rtw_add_rsvd_page_sta(struct rtw_dev *rtwdev,
 521                            struct rtw_vif *rtwvif);
 522 int rtw_fw_download_rsvd_page(struct rtw_dev *rtwdev);
 523 void rtw_send_rsvd_page_h2c(struct rtw_dev *rtwdev);
 524 int rtw_dump_drv_rsvd_page(struct rtw_dev *rtwdev,
 525                            u32 offset, u32 size, u32 *buf);
 526 void rtw_fw_set_remote_wake_ctrl_cmd(struct rtw_dev *rtwdev, bool enable);
 527 void rtw_fw_set_wowlan_ctrl_cmd(struct rtw_dev *rtwdev, bool enable);
 528 void rtw_fw_set_keep_alive_cmd(struct rtw_dev *rtwdev, bool enable);
 529 void rtw_fw_set_disconnect_decision_cmd(struct rtw_dev *rtwdev, bool enable);
 530 void rtw_fw_set_aoac_global_info_cmd(struct rtw_dev *rtwdev,
 531                                      u8 pairwise_key_enc,
 532                                      u8 group_key_enc);
 533
 534 void rtw_fw_set_nlo_info(struct rtw_dev *rtwdev, bool enable);
 535 void rtw_fw_update_pkt_probe_req(struct rtw_dev *rtwdev,
 536                                  struct cfg80211_ssid *ssid);
 537 void rtw_fw_channel_switch(struct rtw_dev *rtwdev, bool enable);
 538 #endif