x86, efi: Set runtime_version to the EFI spec revision
[linux/fpc-iii.git] / arch / powerpc / platforms / 8xx / mpc86xads_setup.c
blob866feff83c910aab87526bd661bd2fc08a4ac77f
1 /*arch/powerpc/platforms/8xx/mpc86xads_setup.c
3 * Platform setup for the Freescale mpc86xads board
5 * Vitaly Bordug <vbordug@ru.mvista.com>
7 * Copyright 2005 MontaVista Software Inc.
9 * Heavily modified by Scott Wood <scottwood@freescale.com>
10 * Copyright 2007 Freescale Semiconductor, Inc.
12 * This file is licensed under the terms of the GNU General Public License
13 * version 2. This program is licensed "as is" without any warranty of any
14 * kind, whether express or implied.
17 #include <linux/init.h>
18 #include <linux/of_platform.h>
20 #include <asm/io.h>
21 #include <asm/machdep.h>
22 #include <asm/time.h>
23 #include <asm/8xx_immap.h>
24 #include <asm/cpm1.h>
25 #include <asm/fs_pd.h>
26 #include <asm/udbg.h>
28 #include "mpc86xads.h"
29 #include "mpc8xx.h"
31 struct cpm_pin {
32 int port, pin, flags;
35 static struct cpm_pin mpc866ads_pins[] = {
36 /* SMC1 */
37 {CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */
38 {CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
40 /* SMC2 */
41 {CPM_PORTB, 21, CPM_PIN_INPUT}, /* RX */
42 {CPM_PORTB, 20, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
44 /* SCC1 */
45 {CPM_PORTA, 6, CPM_PIN_INPUT}, /* CLK1 */
46 {CPM_PORTA, 7, CPM_PIN_INPUT}, /* CLK2 */
47 {CPM_PORTA, 14, CPM_PIN_INPUT}, /* TX */
48 {CPM_PORTA, 15, CPM_PIN_INPUT}, /* RX */
49 {CPM_PORTB, 19, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TENA */
50 {CPM_PORTC, 10, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* RENA */
51 {CPM_PORTC, 11, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CLSN */
53 /* MII */
54 {CPM_PORTD, 3, CPM_PIN_OUTPUT},
55 {CPM_PORTD, 4, CPM_PIN_OUTPUT},
56 {CPM_PORTD, 5, CPM_PIN_OUTPUT},
57 {CPM_PORTD, 6, CPM_PIN_OUTPUT},
58 {CPM_PORTD, 7, CPM_PIN_OUTPUT},
59 {CPM_PORTD, 8, CPM_PIN_OUTPUT},
60 {CPM_PORTD, 9, CPM_PIN_OUTPUT},
61 {CPM_PORTD, 10, CPM_PIN_OUTPUT},
62 {CPM_PORTD, 11, CPM_PIN_OUTPUT},
63 {CPM_PORTD, 12, CPM_PIN_OUTPUT},
64 {CPM_PORTD, 13, CPM_PIN_OUTPUT},
65 {CPM_PORTD, 14, CPM_PIN_OUTPUT},
66 {CPM_PORTD, 15, CPM_PIN_OUTPUT},
68 /* I2C */
69 {CPM_PORTB, 26, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN},
70 {CPM_PORTB, 27, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN},
73 static void __init init_ioports(void)
75 int i;
77 for (i = 0; i < ARRAY_SIZE(mpc866ads_pins); i++) {
78 struct cpm_pin *pin = &mpc866ads_pins[i];
79 cpm1_set_pin(pin->port, pin->pin, pin->flags);
82 cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
83 cpm1_clk_setup(CPM_CLK_SMC2, CPM_BRG2, CPM_CLK_RTX);
84 cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK1, CPM_CLK_TX);
85 cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_RX);
87 /* Set FEC1 and FEC2 to MII mode */
88 clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180);
91 static void __init mpc86xads_setup_arch(void)
93 struct device_node *np;
94 u32 __iomem *bcsr_io;
96 cpm_reset();
97 init_ioports();
99 np = of_find_compatible_node(NULL, NULL, "fsl,mpc866ads-bcsr");
100 if (!np) {
101 printk(KERN_CRIT "Could not find fsl,mpc866ads-bcsr node\n");
102 return;
105 bcsr_io = of_iomap(np, 0);
106 of_node_put(np);
108 if (bcsr_io == NULL) {
109 printk(KERN_CRIT "Could not remap BCSR\n");
110 return;
113 clrbits32(bcsr_io, BCSR1_RS232EN_1 | BCSR1_RS232EN_2 | BCSR1_ETHEN);
114 iounmap(bcsr_io);
117 static int __init mpc86xads_probe(void)
119 unsigned long root = of_get_flat_dt_root();
120 return of_flat_dt_is_compatible(root, "fsl,mpc866ads");
123 static struct of_device_id __initdata of_bus_ids[] = {
124 { .name = "soc", },
125 { .name = "cpm", },
126 { .name = "localbus", },
130 static int __init declare_of_platform_devices(void)
132 of_platform_bus_probe(NULL, of_bus_ids, NULL);
134 return 0;
136 machine_device_initcall(mpc86x_ads, declare_of_platform_devices);
138 define_machine(mpc86x_ads) {
139 .name = "MPC86x ADS",
140 .probe = mpc86xads_probe,
141 .setup_arch = mpc86xads_setup_arch,
142 .init_IRQ = mpc8xx_pics_init,
143 .get_irq = mpc8xx_get_irq,
144 .restart = mpc8xx_restart,
145 .calibrate_decr = mpc8xx_calibrate_decr,
146 .set_rtc_time = mpc8xx_set_rtc_time,
147 .get_rtc_time = mpc8xx_get_rtc_time,
148 .progress = udbg_progress,