staging:iio:adc:ad7606 move to info_mask_(shared_by_type/separate)
[linux/fpc-iii.git] / arch / sh / lib / delay.c
blob0901b2f14e15e9b2b396e923641de5c2a28eb90d
1 /*
2 * Precise Delay Loops for SuperH
4 * Copyright (C) 1999 Niibe Yutaka & Kaz Kojima
5 */
7 #include <linux/sched.h>
8 #include <linux/delay.h>
10 void __delay(unsigned long loops)
12 __asm__ __volatile__(
14 * ST40-300 appears to have an issue with this code,
15 * normally taking two cycles each loop, as with all
16 * other SH variants. If however the branch and the
17 * delay slot straddle an 8 byte boundary, this increases
18 * to 3 cycles.
19 * This align directive ensures this doesn't occur.
21 ".balign 8\n\t"
23 "tst %0, %0\n\t"
24 "1:\t"
25 "bf/s 1b\n\t"
26 " dt %0"
27 : "=r" (loops)
28 : "0" (loops)
29 : "t");
32 inline void __const_udelay(unsigned long xloops)
34 xloops *= 4;
35 __asm__("dmulu.l %0, %2\n\t"
36 "sts mach, %0"
37 : "=r" (xloops)
38 : "0" (xloops),
39 "r" (cpu_data[raw_smp_processor_id()].loops_per_jiffy * (HZ/4))
40 : "macl", "mach");
41 __delay(++xloops);
44 void __udelay(unsigned long usecs)
46 __const_udelay(usecs * 0x000010c6); /* 2**32 / 1000000 */
49 void __ndelay(unsigned long nsecs)
51 __const_udelay(nsecs * 0x00000005);