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Bluetooth: Remove unneeded initializer for management command table
[linux/fpc-iii.git] / drivers / tty / serial / bfin_uart.c
blob43b3e2c233ff0f73928193c3c7dc032abfaf9df3
1 /*
2 * Blackfin On-Chip Serial Driver
3 *
4 * Copyright 2006-2011 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12 #define SUPPORT_SYSRQ
13 #endif
14
15 #define DRIVER_NAME "bfin-uart"
16 #define pr_fmt(fmt) DRIVER_NAME ": " fmt
17
18 #include <linux/module.h>
19 #include <linux/ioport.h>
20 #include <linux/gfp.h>
21 #include <linux/io.h>
22 #include <linux/init.h>
23 #include <linux/console.h>
24 #include <linux/sysrq.h>
25 #include <linux/platform_device.h>
26 #include <linux/tty.h>
27 #include <linux/tty_flip.h>
28 #include <linux/serial_core.h>
29 #include <linux/gpio.h>
30 #include <linux/irq.h>
31 #include <linux/kgdb.h>
32 #include <linux/slab.h>
33 #include <linux/dma-mapping.h>
34
35 #include <asm/portmux.h>
36 #include <asm/cacheflush.h>
37 #include <asm/dma.h>
38 #include <asm/bfin_serial.h>
39
40 #ifdef CONFIG_SERIAL_BFIN_MODULE
41 # undef CONFIG_EARLY_PRINTK
42 #endif
43
44 /* UART name and device definitions */
45 #define BFIN_SERIAL_DEV_NAME "ttyBF"
46 #define BFIN_SERIAL_MAJOR 204
47 #define BFIN_SERIAL_MINOR 64
48
49 static struct bfin_serial_port *bfin_serial_ports[BFIN_UART_NR_PORTS];
50
51 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
52 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
53
54 # ifndef CONFIG_SERIAL_BFIN_PIO
55 # error KGDB only support UART in PIO mode.
56 # endif
57
58 static int kgdboc_port_line;
59 static int kgdboc_break_enabled;
60 #endif
61 /*
62 * Setup for console. Argument comes from the menuconfig
63 */
64 #define DMA_RX_XCOUNT 512
65 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
66
67 #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
68
69 #ifdef CONFIG_SERIAL_BFIN_DMA
70 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
71 #else
72 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
73 #endif
74
75 static void bfin_serial_reset_irda(struct uart_port *port);
76
77 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
78 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
79 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
80 {
81 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
82 if (uart->cts_pin < 0)
83 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
84
85 /* CTS PIN is negative assertive. */
86 if (UART_GET_CTS(uart))
87 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
88 else
89 return TIOCM_DSR | TIOCM_CAR;
90 }
91
92 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
93 {
94 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
95 if (uart->rts_pin < 0)
96 return;
97
98 /* RTS PIN is negative assertive. */
99 if (mctrl & TIOCM_RTS)
100 UART_ENABLE_RTS(uart);
101 else
102 UART_DISABLE_RTS(uart);
103 }
104
105 /*
106 * Handle any change of modem status signal.
107 */
108 static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
109 {
110 struct bfin_serial_port *uart = dev_id;
111 struct uart_port *uport = &uart->port;
112 unsigned int status = bfin_serial_get_mctrl(uport);
113 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
114
115 UART_CLEAR_SCTS(uart);
116 if (uport->hw_stopped) {
117 if (status) {
118 uport->hw_stopped = 0;
119 uart_write_wakeup(uport);
120 }
121 } else {
122 if (!status)
123 uport->hw_stopped = 1;
124 }
125 #else
126 uart_handle_cts_change(uport, status & TIOCM_CTS);
127 #endif
128
129 return IRQ_HANDLED;
130 }
131 #else
132 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
133 {
134 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
135 }
136
137 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
138 {
139 }
140 #endif
141
142 /*
143 * interrupts are disabled on entry
144 */
145 static void bfin_serial_stop_tx(struct uart_port *port)
146 {
147 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
148 #ifdef CONFIG_SERIAL_BFIN_DMA
149 struct circ_buf *xmit = &uart->port.state->xmit;
150 #endif
151
152 while (!(UART_GET_LSR(uart) & TEMT))
153 cpu_relax();
154
155 #ifdef CONFIG_SERIAL_BFIN_DMA
156 disable_dma(uart->tx_dma_channel);
157 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
158 uart->port.icount.tx += uart->tx_count;
159 uart->tx_count = 0;
160 uart->tx_done = 1;
161 #else
162 #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
163 /* Clear TFI bit */
164 UART_PUT_LSR(uart, TFI);
165 #endif
166 UART_CLEAR_IER(uart, ETBEI);
167 #endif
168 }
169
170 /*
171 * port is locked and interrupts are disabled
172 */
173 static void bfin_serial_start_tx(struct uart_port *port)
174 {
175 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
176 struct tty_struct *tty = uart->port.state->port.tty;
177
178 /*
179 * To avoid losting RX interrupt, we reset IR function
180 * before sending data.
181 */
182 if (tty->termios.c_line == N_IRDA)
183 bfin_serial_reset_irda(port);
184
185 #ifdef CONFIG_SERIAL_BFIN_DMA
186 if (uart->tx_done)
187 bfin_serial_dma_tx_chars(uart);
188 #else
189 UART_SET_IER(uart, ETBEI);
190 bfin_serial_tx_chars(uart);
191 #endif
192 }
193
194 /*
195 * Interrupts are enabled
196 */
197 static void bfin_serial_stop_rx(struct uart_port *port)
198 {
199 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
200
201 UART_CLEAR_IER(uart, ERBFI);
202 }
203
204 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
205 # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
206 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
207 #else
208 # define UART_GET_ANOMALY_THRESHOLD(uart) 0
209 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
210 #endif
211
212 #ifdef CONFIG_SERIAL_BFIN_PIO
213 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
214 {
215 unsigned int status, ch, flg;
216 static struct timeval anomaly_start = { .tv_sec = 0 };
217
218 status = UART_GET_LSR(uart);
219 UART_CLEAR_LSR(uart);
220
221 ch = UART_GET_CHAR(uart);
222 uart->port.icount.rx++;
223
224 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
225 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
226 if (kgdb_connected && kgdboc_port_line == uart->port.line
227 && kgdboc_break_enabled)
228 if (ch == 0x3) {/* Ctrl + C */
229 kgdb_breakpoint();
230 return;
231 }
232
233 if (!uart->port.state)
234 return;
235 #endif
236 if (ANOMALY_05000363) {
237 /* The BF533 (and BF561) family of processors have a nice anomaly
238 * where they continuously generate characters for a "single" break.
239 * We have to basically ignore this flood until the "next" valid
240 * character comes across. Due to the nature of the flood, it is
241 * not possible to reliably catch bytes that are sent too quickly
242 * after this break. So application code talking to the Blackfin
243 * which sends a break signal must allow at least 1.5 character
244 * times after the end of the break for things to stabilize. This
245 * timeout was picked as it must absolutely be larger than 1
246 * character time +/- some percent. So 1.5 sounds good. All other
247 * Blackfin families operate properly. Woo.
248 */
249 if (anomaly_start.tv_sec) {
250 struct timeval curr;
251 suseconds_t usecs;
252
253 if ((~ch & (~ch + 1)) & 0xff)
254 goto known_good_char;
255
256 do_gettimeofday(&curr);
257 if (curr.tv_sec - anomaly_start.tv_sec > 1)
258 goto known_good_char;
259
260 usecs = 0;
261 if (curr.tv_sec != anomaly_start.tv_sec)
262 usecs += USEC_PER_SEC;
263 usecs += curr.tv_usec - anomaly_start.tv_usec;
264
265 if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
266 goto known_good_char;
267
268 if (ch)
269 anomaly_start.tv_sec = 0;
270 else
271 anomaly_start = curr;
272
273 return;
274
275 known_good_char:
276 status &= ~BI;
277 anomaly_start.tv_sec = 0;
278 }
279 }
280
281 if (status & BI) {
282 if (ANOMALY_05000363)
283 if (bfin_revid() < 5)
284 do_gettimeofday(&anomaly_start);
285 uart->port.icount.brk++;
286 if (uart_handle_break(&uart->port))
287 goto ignore_char;
288 status &= ~(PE | FE);
289 }
290 if (status & PE)
291 uart->port.icount.parity++;
292 if (status & OE)
293 uart->port.icount.overrun++;
294 if (status & FE)
295 uart->port.icount.frame++;
296
297 status &= uart->port.read_status_mask;
298
299 if (status & BI)
300 flg = TTY_BREAK;
301 else if (status & PE)
302 flg = TTY_PARITY;
303 else if (status & FE)
304 flg = TTY_FRAME;
305 else
306 flg = TTY_NORMAL;
307
308 if (uart_handle_sysrq_char(&uart->port, ch))
309 goto ignore_char;
310
311 uart_insert_char(&uart->port, status, OE, ch, flg);
312
313 ignore_char:
314 tty_flip_buffer_push(&uart->port.state->port);
315 }
316
317 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
318 {
319 struct circ_buf *xmit = &uart->port.state->xmit;
320
321 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
322 #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
323 /* Clear TFI bit */
324 UART_PUT_LSR(uart, TFI);
325 #endif
326 /* Anomaly notes:
327 * 05000215 - we always clear ETBEI within last UART TX
328 * interrupt to end a string. It is always set
329 * when start a new tx.
330 */
331 UART_CLEAR_IER(uart, ETBEI);
332 return;
333 }
334
335 if (uart->port.x_char) {
336 UART_PUT_CHAR(uart, uart->port.x_char);
337 uart->port.icount.tx++;
338 uart->port.x_char = 0;
339 }
340
341 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
342 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
343 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
344 uart->port.icount.tx++;
345 }
346
347 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
348 uart_write_wakeup(&uart->port);
349 }
350
351 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
352 {
353 struct bfin_serial_port *uart = dev_id;
354
355 while (UART_GET_LSR(uart) & DR)
356 bfin_serial_rx_chars(uart);
357
358 return IRQ_HANDLED;
359 }
360
361 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
362 {
363 struct bfin_serial_port *uart = dev_id;
364
365 spin_lock(&uart->port.lock);
366 if (UART_GET_LSR(uart) & THRE)
367 bfin_serial_tx_chars(uart);
368 spin_unlock(&uart->port.lock);
369
370 return IRQ_HANDLED;
371 }
372 #endif
373
374 #ifdef CONFIG_SERIAL_BFIN_DMA
375 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
376 {
377 struct circ_buf *xmit = &uart->port.state->xmit;
378
379 uart->tx_done = 0;
380
381 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
382 uart->tx_count = 0;
383 uart->tx_done = 1;
384 return;
385 }
386
387 if (uart->port.x_char) {
388 UART_PUT_CHAR(uart, uart->port.x_char);
389 uart->port.icount.tx++;
390 uart->port.x_char = 0;
391 }
392
393 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
394 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
395 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
396 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
397 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
398 set_dma_config(uart->tx_dma_channel,
399 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
400 INTR_ON_BUF,
401 DIMENSION_LINEAR,
402 DATA_SIZE_8,
403 DMA_SYNC_RESTART));
404 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
405 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
406 set_dma_x_modify(uart->tx_dma_channel, 1);
407 SSYNC();
408 enable_dma(uart->tx_dma_channel);
409
410 UART_SET_IER(uart, ETBEI);
411 }
412
413 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
414 {
415 int i, flg, status;
416
417 status = UART_GET_LSR(uart);
418 UART_CLEAR_LSR(uart);
419
420 uart->port.icount.rx +=
421 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
422 UART_XMIT_SIZE);
423
424 if (status & BI) {
425 uart->port.icount.brk++;
426 if (uart_handle_break(&uart->port))
427 goto dma_ignore_char;
428 status &= ~(PE | FE);
429 }
430 if (status & PE)
431 uart->port.icount.parity++;
432 if (status & OE)
433 uart->port.icount.overrun++;
434 if (status & FE)
435 uart->port.icount.frame++;
436
437 status &= uart->port.read_status_mask;
438
439 if (status & BI)
440 flg = TTY_BREAK;
441 else if (status & PE)
442 flg = TTY_PARITY;
443 else if (status & FE)
444 flg = TTY_FRAME;
445 else
446 flg = TTY_NORMAL;
447
448 for (i = uart->rx_dma_buf.tail; ; i++) {
449 if (i >= UART_XMIT_SIZE)
450 i = 0;
451 if (i == uart->rx_dma_buf.head)
452 break;
453 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
454 uart_insert_char(&uart->port, status, OE,
455 uart->rx_dma_buf.buf[i], flg);
456 }
457
458 dma_ignore_char:
459 tty_flip_buffer_push(&uart->port.state->port);
460 }
461
462 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
463 {
464 int x_pos, pos;
465 unsigned long flags;
466
467 spin_lock_irqsave(&uart->rx_lock, flags);
468
469 /* 2D DMA RX buffer ring is used. Because curr_y_count and
470 * curr_x_count can't be read as an atomic operation,
471 * curr_y_count should be read before curr_x_count. When
472 * curr_x_count is read, curr_y_count may already indicate
473 * next buffer line. But, the position calculated here is
474 * still indicate the old line. The wrong position data may
475 * be smaller than current buffer tail, which cause garbages
476 * are received if it is not prohibit.
477 */
478 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
479 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
480 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
481 if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
482 uart->rx_dma_nrows = 0;
483 x_pos = DMA_RX_XCOUNT - x_pos;
484 if (x_pos == DMA_RX_XCOUNT)
485 x_pos = 0;
486
487 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
488 /* Ignore receiving data if new position is in the same line of
489 * current buffer tail and small.
490 */
491 if (pos > uart->rx_dma_buf.tail ||
492 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
493 uart->rx_dma_buf.head = pos;
494 bfin_serial_dma_rx_chars(uart);
495 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
496 }
497
498 spin_unlock_irqrestore(&uart->rx_lock, flags);
499
500 mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
501 }
502
503 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
504 {
505 struct bfin_serial_port *uart = dev_id;
506 struct circ_buf *xmit = &uart->port.state->xmit;
507
508 spin_lock(&uart->port.lock);
509 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
510 disable_dma(uart->tx_dma_channel);
511 clear_dma_irqstat(uart->tx_dma_channel);
512 /* Anomaly notes:
513 * 05000215 - we always clear ETBEI within last UART TX
514 * interrupt to end a string. It is always set
515 * when start a new tx.
516 */
517 UART_CLEAR_IER(uart, ETBEI);
518 uart->port.icount.tx += uart->tx_count;
519 if (!(xmit->tail == 0 && xmit->head == 0)) {
520 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
521
522 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
523 uart_write_wakeup(&uart->port);
524 }
525
526 bfin_serial_dma_tx_chars(uart);
527 }
528
529 spin_unlock(&uart->port.lock);
530 return IRQ_HANDLED;
531 }
532
533 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
534 {
535 struct bfin_serial_port *uart = dev_id;
536 unsigned int irqstat;
537 int x_pos, pos;
538
539 spin_lock(&uart->rx_lock);
540 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
541 clear_dma_irqstat(uart->rx_dma_channel);
542
543 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
544 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
545 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
546 if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
547 uart->rx_dma_nrows = 0;
548
549 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
550 if (pos > uart->rx_dma_buf.tail ||
551 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
552 uart->rx_dma_buf.head = pos;
553 bfin_serial_dma_rx_chars(uart);
554 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
555 }
556
557 spin_unlock(&uart->rx_lock);
558
559 return IRQ_HANDLED;
560 }
561 #endif
562
563 /*
564 * Return TIOCSER_TEMT when transmitter is not busy.
565 */
566 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
567 {
568 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
569 unsigned int lsr;
570
571 lsr = UART_GET_LSR(uart);
572 if (lsr & TEMT)
573 return TIOCSER_TEMT;
574 else
575 return 0;
576 }
577
578 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
579 {
580 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
581 u32 lcr = UART_GET_LCR(uart);
582 if (break_state)
583 lcr |= SB;
584 else
585 lcr &= ~SB;
586 UART_PUT_LCR(uart, lcr);
587 SSYNC();
588 }
589
590 static int bfin_serial_startup(struct uart_port *port)
591 {
592 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
593
594 #ifdef CONFIG_SERIAL_BFIN_DMA
595 dma_addr_t dma_handle;
596
597 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
598 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
599 return -EBUSY;
600 }
601
602 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
603 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
604 free_dma(uart->rx_dma_channel);
605 return -EBUSY;
606 }
607
608 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
609 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
610
611 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
612 uart->rx_dma_buf.head = 0;
613 uart->rx_dma_buf.tail = 0;
614 uart->rx_dma_nrows = 0;
615
616 set_dma_config(uart->rx_dma_channel,
617 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
618 INTR_ON_ROW, DIMENSION_2D,
619 DATA_SIZE_8,
620 DMA_SYNC_RESTART));
621 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
622 set_dma_x_modify(uart->rx_dma_channel, 1);
623 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
624 set_dma_y_modify(uart->rx_dma_channel, 1);
625 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
626 enable_dma(uart->rx_dma_channel);
627
628 uart->rx_dma_timer.data = (unsigned long)(uart);
629 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
630 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
631 add_timer(&(uart->rx_dma_timer));
632 #else
633 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
634 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
635 if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
636 kgdboc_break_enabled = 0;
637 else {
638 # endif
639 if (request_irq(uart->rx_irq, bfin_serial_rx_int, 0,
640 "BFIN_UART_RX", uart)) {
641 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
642 return -EBUSY;
643 }
644
645 if (request_irq
646 (uart->tx_irq, bfin_serial_tx_int, 0,
647 "BFIN_UART_TX", uart)) {
648 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
649 free_irq(uart->rx_irq, uart);
650 return -EBUSY;
651 }
652
653 # ifdef CONFIG_BF54x
654 {
655 /*
656 * UART2 and UART3 on BF548 share interrupt PINs and DMA
657 * controllers with SPORT2 and SPORT3. UART rx and tx
658 * interrupts are generated in PIO mode only when configure
659 * their peripheral mapping registers properly, which means
660 * request corresponding DMA channels in PIO mode as well.
661 */
662 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
663
664 switch (uart->rx_irq) {
665 case IRQ_UART3_RX:
666 uart_dma_ch_rx = CH_UART3_RX;
667 uart_dma_ch_tx = CH_UART3_TX;
668 break;
669 case IRQ_UART2_RX:
670 uart_dma_ch_rx = CH_UART2_RX;
671 uart_dma_ch_tx = CH_UART2_TX;
672 break;
673 default:
674 uart_dma_ch_rx = uart_dma_ch_tx = 0;
675 break;
676 }
677
678 if (uart_dma_ch_rx &&
679 request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
680 printk(KERN_NOTICE"Fail to attach UART interrupt\n");
681 free_irq(uart->rx_irq, uart);
682 free_irq(uart->tx_irq, uart);
683 return -EBUSY;
684 }
685 if (uart_dma_ch_tx &&
686 request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
687 printk(KERN_NOTICE "Fail to attach UART interrupt\n");
688 free_dma(uart_dma_ch_rx);
689 free_irq(uart->rx_irq, uart);
690 free_irq(uart->tx_irq, uart);
691 return -EBUSY;
692 }
693 }
694 # endif
695 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
696 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
697 }
698 # endif
699 #endif
700
701 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
702 if (uart->cts_pin >= 0) {
703 if (request_irq(gpio_to_irq(uart->cts_pin),
704 bfin_serial_mctrl_cts_int,
705 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
706 0, "BFIN_UART_CTS", uart)) {
707 uart->cts_pin = -1;
708 pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
709 }
710 }
711 if (uart->rts_pin >= 0) {
712 if (gpio_request(uart->rts_pin, DRIVER_NAME)) {
713 pr_info("fail to request RTS PIN at GPIO_%d\n", uart->rts_pin);
714 uart->rts_pin = -1;
715 } else
716 gpio_direction_output(uart->rts_pin, 0);
717 }
718 #endif
719 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
720 if (uart->cts_pin >= 0) {
721 if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int,
722 0, "BFIN_UART_MODEM_STATUS", uart)) {
723 uart->cts_pin = -1;
724 dev_info(port->dev, "Unable to attach BlackFin UART Modem Status interrupt.\n");
725 }
726
727 /* CTS RTS PINs are negative assertive. */
728 UART_PUT_MCR(uart, UART_GET_MCR(uart) | ACTS);
729 UART_SET_IER(uart, EDSSI);
730 }
731 #endif
732
733 UART_SET_IER(uart, ERBFI);
734 return 0;
735 }
736
737 static void bfin_serial_shutdown(struct uart_port *port)
738 {
739 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
740
741 #ifdef CONFIG_SERIAL_BFIN_DMA
742 disable_dma(uart->tx_dma_channel);
743 free_dma(uart->tx_dma_channel);
744 disable_dma(uart->rx_dma_channel);
745 free_dma(uart->rx_dma_channel);
746 del_timer(&(uart->rx_dma_timer));
747 dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
748 #else
749 #ifdef CONFIG_BF54x
750 switch (uart->port.irq) {
751 case IRQ_UART3_RX:
752 free_dma(CH_UART3_RX);
753 free_dma(CH_UART3_TX);
754 break;
755 case IRQ_UART2_RX:
756 free_dma(CH_UART2_RX);
757 free_dma(CH_UART2_TX);
758 break;
759 default:
760 break;
761 }
762 #endif
763 free_irq(uart->rx_irq, uart);
764 free_irq(uart->tx_irq, uart);
765 #endif
766
767 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
768 if (uart->cts_pin >= 0)
769 free_irq(gpio_to_irq(uart->cts_pin), uart);
770 if (uart->rts_pin >= 0)
771 gpio_free(uart->rts_pin);
772 #endif
773 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
774 if (uart->cts_pin >= 0)
775 free_irq(uart->status_irq, uart);
776 #endif
777 }
778
779 static void
780 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
781 struct ktermios *old)
782 {
783 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
784 unsigned long flags;
785 unsigned int baud, quot;
786 unsigned int ier, lcr = 0;
787 unsigned long timeout;
788
789 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
790 if (old == NULL && uart->cts_pin != -1)
791 termios->c_cflag |= CRTSCTS;
792 else if (uart->cts_pin == -1)
793 termios->c_cflag &= ~CRTSCTS;
794 #endif
795
796 switch (termios->c_cflag & CSIZE) {
797 case CS8:
798 lcr = WLS(8);
799 break;
800 case CS7:
801 lcr = WLS(7);
802 break;
803 case CS6:
804 lcr = WLS(6);
805 break;
806 case CS5:
807 lcr = WLS(5);
808 break;
809 default:
810 printk(KERN_ERR "%s: word length not supported\n",
811 __func__);
812 }
813
814 /* Anomaly notes:
815 * 05000231 - STOP bit is always set to 1 whatever the user is set.
816 */
817 if (termios->c_cflag & CSTOPB) {
818 if (ANOMALY_05000231)
819 printk(KERN_WARNING "STOP bits other than 1 is not "
820 "supported in case of anomaly 05000231.\n");
821 else
822 lcr |= STB;
823 }
824 if (termios->c_cflag & PARENB)
825 lcr |= PEN;
826 if (!(termios->c_cflag & PARODD))
827 lcr |= EPS;
828 if (termios->c_cflag & CMSPAR)
829 lcr |= STP;
830
831 spin_lock_irqsave(&uart->port.lock, flags);
832
833 port->read_status_mask = OE;
834 if (termios->c_iflag & INPCK)
835 port->read_status_mask |= (FE | PE);
836 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
837 port->read_status_mask |= BI;
838
839 /*
840 * Characters to ignore
841 */
842 port->ignore_status_mask = 0;
843 if (termios->c_iflag & IGNPAR)
844 port->ignore_status_mask |= FE | PE;
845 if (termios->c_iflag & IGNBRK) {
846 port->ignore_status_mask |= BI;
847 /*
848 * If we're ignoring parity and break indicators,
849 * ignore overruns too (for real raw support).
850 */
851 if (termios->c_iflag & IGNPAR)
852 port->ignore_status_mask |= OE;
853 }
854
855 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
856 quot = uart_get_divisor(port, baud);
857
858 /* If discipline is not IRDA, apply ANOMALY_05000230 */
859 if (termios->c_line != N_IRDA)
860 quot -= ANOMALY_05000230;
861
862 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
863
864 /* Wait till the transfer buffer is empty */
865 timeout = jiffies + msecs_to_jiffies(10);
866 while (UART_GET_GCTL(uart) & UCEN && !(UART_GET_LSR(uart) & TEMT))
867 if (time_after(jiffies, timeout)) {
868 dev_warn(port->dev, "timeout waiting for TX buffer empty\n");
869 break;
870 }
871
872 /* Disable UART */
873 ier = UART_GET_IER(uart);
874 UART_PUT_GCTL(uart, UART_GET_GCTL(uart) & ~UCEN);
875 UART_DISABLE_INTS(uart);
876
877 /* Set DLAB in LCR to Access CLK */
878 UART_SET_DLAB(uart);
879
880 UART_PUT_CLK(uart, quot);
881 SSYNC();
882
883 /* Clear DLAB in LCR to Access THR RBR IER */
884 UART_CLEAR_DLAB(uart);
885
886 UART_PUT_LCR(uart, (UART_GET_LCR(uart) & ~LCR_MASK) | lcr);
887
888 /* Enable UART */
889 UART_ENABLE_INTS(uart, ier);
890 UART_PUT_GCTL(uart, UART_GET_GCTL(uart) | UCEN);
891
892 /* Port speed changed, update the per-port timeout. */
893 uart_update_timeout(port, termios->c_cflag, baud);
894
895 spin_unlock_irqrestore(&uart->port.lock, flags);
896 }
897
898 static const char *bfin_serial_type(struct uart_port *port)
899 {
900 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
901
902 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
903 }
904
905 /*
906 * Release the memory region(s) being used by 'port'.
907 */
908 static void bfin_serial_release_port(struct uart_port *port)
909 {
910 }
911
912 /*
913 * Request the memory region(s) being used by 'port'.
914 */
915 static int bfin_serial_request_port(struct uart_port *port)
916 {
917 return 0;
918 }
919
920 /*
921 * Configure/autoconfigure the port.
922 */
923 static void bfin_serial_config_port(struct uart_port *port, int flags)
924 {
925 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
926
927 if (flags & UART_CONFIG_TYPE &&
928 bfin_serial_request_port(&uart->port) == 0)
929 uart->port.type = PORT_BFIN;
930 }
931
932 /*
933 * Verify the new serial_struct (for TIOCSSERIAL).
934 * The only change we allow are to the flags and type, and
935 * even then only between PORT_BFIN and PORT_UNKNOWN
936 */
937 static int
938 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
939 {
940 return 0;
941 }
942
943 /*
944 * Enable the IrDA function if tty->ldisc.num is N_IRDA.
945 * In other cases, disable IrDA function.
946 */
947 static void bfin_serial_set_ldisc(struct uart_port *port,
948 struct ktermios *termios)
949 {
950 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
951 unsigned int val;
952
953 switch (termios->c_line) {
954 case N_IRDA:
955 val = UART_GET_GCTL(uart);
956 val |= (UMOD_IRDA | RPOLC);
957 UART_PUT_GCTL(uart, val);
958 break;
959 default:
960 val = UART_GET_GCTL(uart);
961 val &= ~(UMOD_MASK | RPOLC);
962 UART_PUT_GCTL(uart, val);
963 }
964 }
965
966 static void bfin_serial_reset_irda(struct uart_port *port)
967 {
968 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
969 unsigned int val;
970
971 val = UART_GET_GCTL(uart);
972 val &= ~(UMOD_MASK | RPOLC);
973 UART_PUT_GCTL(uart, val);
974 SSYNC();
975 val |= (UMOD_IRDA | RPOLC);
976 UART_PUT_GCTL(uart, val);
977 SSYNC();
978 }
979
980 #ifdef CONFIG_CONSOLE_POLL
981 /* Anomaly notes:
982 * 05000099 - Because we only use THRE in poll_put and DR in poll_get,
983 * losing other bits of UART_LSR is not a problem here.
984 */
985 static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
986 {
987 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
988
989 while (!(UART_GET_LSR(uart) & THRE))
990 cpu_relax();
991
992 UART_CLEAR_DLAB(uart);
993 UART_PUT_CHAR(uart, (unsigned char)chr);
994 }
995
996 static int bfin_serial_poll_get_char(struct uart_port *port)
997 {
998 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
999 unsigned char chr;
1000
1001 while (!(UART_GET_LSR(uart) & DR))
1002 cpu_relax();
1003
1004 UART_CLEAR_DLAB(uart);
1005 chr = UART_GET_CHAR(uart);
1006
1007 return chr;
1008 }
1009 #endif
1010
1011 static struct uart_ops bfin_serial_pops = {
1012 .tx_empty = bfin_serial_tx_empty,
1013 .set_mctrl = bfin_serial_set_mctrl,
1014 .get_mctrl = bfin_serial_get_mctrl,
1015 .stop_tx = bfin_serial_stop_tx,
1016 .start_tx = bfin_serial_start_tx,
1017 .stop_rx = bfin_serial_stop_rx,
1018 .break_ctl = bfin_serial_break_ctl,
1019 .startup = bfin_serial_startup,
1020 .shutdown = bfin_serial_shutdown,
1021 .set_termios = bfin_serial_set_termios,
1022 .set_ldisc = bfin_serial_set_ldisc,
1023 .type = bfin_serial_type,
1024 .release_port = bfin_serial_release_port,
1025 .request_port = bfin_serial_request_port,
1026 .config_port = bfin_serial_config_port,
1027 .verify_port = bfin_serial_verify_port,
1028 #ifdef CONFIG_CONSOLE_POLL
1029 .poll_put_char = bfin_serial_poll_put_char,
1030 .poll_get_char = bfin_serial_poll_get_char,
1031 #endif
1032 };
1033
1034 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1035 /*
1036 * If the port was already initialised (eg, by a boot loader),
1037 * try to determine the current setup.
1038 */
1039 static void __init
1040 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1041 int *parity, int *bits)
1042 {
1043 unsigned int status;
1044
1045 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1046 if (status == (ERBFI | ETBEI)) {
1047 /* ok, the port was enabled */
1048 u32 lcr, clk;
1049
1050 lcr = UART_GET_LCR(uart);
1051
1052 *parity = 'n';
1053 if (lcr & PEN) {
1054 if (lcr & EPS)
1055 *parity = 'e';
1056 else
1057 *parity = 'o';
1058 }
1059 *bits = ((lcr & WLS_MASK) >> WLS_OFFSET) + 5;
1060
1061 /* Set DLAB in LCR to Access CLK */
1062 UART_SET_DLAB(uart);
1063
1064 clk = UART_GET_CLK(uart);
1065
1066 /* Clear DLAB in LCR to Access THR RBR IER */
1067 UART_CLEAR_DLAB(uart);
1068
1069 *baud = get_sclk() / (16*clk);
1070 }
1071 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1072 }
1073
1074 static struct uart_driver bfin_serial_reg;
1075
1076 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1077 {
1078 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1079 while (!(UART_GET_LSR(uart) & THRE))
1080 barrier();
1081 UART_PUT_CHAR(uart, ch);
1082 }
1083
1084 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1085 defined (CONFIG_EARLY_PRINTK) */
1086
1087 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1088 #define CLASS_BFIN_CONSOLE "bfin-console"
1089 /*
1090 * Interrupts are disabled on entering
1091 */
1092 static void
1093 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1094 {
1095 struct bfin_serial_port *uart = bfin_serial_ports[co->index];
1096 unsigned long flags;
1097
1098 spin_lock_irqsave(&uart->port.lock, flags);
1099 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1100 spin_unlock_irqrestore(&uart->port.lock, flags);
1101
1102 }
1103
1104 static int __init
1105 bfin_serial_console_setup(struct console *co, char *options)
1106 {
1107 struct bfin_serial_port *uart;
1108 int baud = 57600;
1109 int bits = 8;
1110 int parity = 'n';
1111 # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1112 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1113 int flow = 'r';
1114 # else
1115 int flow = 'n';
1116 # endif
1117
1118 /*
1119 * Check whether an invalid uart number has been specified, and
1120 * if so, search for the first available port that does have
1121 * console support.
1122 */
1123 if (co->index < 0 || co->index >= BFIN_UART_NR_PORTS)
1124 return -ENODEV;
1125
1126 uart = bfin_serial_ports[co->index];
1127 if (!uart)
1128 return -ENODEV;
1129
1130 if (options)
1131 uart_parse_options(options, &baud, &parity, &bits, &flow);
1132 else
1133 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1134
1135 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1136 }
1137
1138 static struct console bfin_serial_console = {
1139 .name = BFIN_SERIAL_DEV_NAME,
1140 .write = bfin_serial_console_write,
1141 .device = uart_console_device,
1142 .setup = bfin_serial_console_setup,
1143 .flags = CON_PRINTBUFFER,
1144 .index = -1,
1145 .data = &bfin_serial_reg,
1146 };
1147 #define BFIN_SERIAL_CONSOLE (&bfin_serial_console)
1148 #else
1149 #define BFIN_SERIAL_CONSOLE NULL
1150 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1151
1152 #ifdef CONFIG_EARLY_PRINTK
1153 static struct bfin_serial_port bfin_earlyprintk_port;
1154 #define CLASS_BFIN_EARLYPRINTK "bfin-earlyprintk"
1155
1156 /*
1157 * Interrupts are disabled on entering
1158 */
1159 static void
1160 bfin_earlyprintk_console_write(struct console *co, const char *s, unsigned int count)
1161 {
1162 unsigned long flags;
1163
1164 if (bfin_earlyprintk_port.port.line != co->index)
1165 return;
1166
1167 spin_lock_irqsave(&bfin_earlyprintk_port.port.lock, flags);
1168 uart_console_write(&bfin_earlyprintk_port.port, s, count,
1169 bfin_serial_console_putchar);
1170 spin_unlock_irqrestore(&bfin_earlyprintk_port.port.lock, flags);
1171 }
1172
1173 /*
1174 * This should have a .setup or .early_setup in it, but then things get called
1175 * without the command line options, and the baud rate gets messed up - so
1176 * don't let the common infrastructure play with things. (see calls to setup
1177 * & earlysetup in ./kernel/printk.c:register_console()
1178 */
1179 static struct console bfin_early_serial_console __initdata = {
1180 .name = "early_BFuart",
1181 .write = bfin_earlyprintk_console_write,
1182 .device = uart_console_device,
1183 .flags = CON_PRINTBUFFER,
1184 .index = -1,
1185 .data = &bfin_serial_reg,
1186 };
1187 #endif
1188
1189 static struct uart_driver bfin_serial_reg = {
1190 .owner = THIS_MODULE,
1191 .driver_name = DRIVER_NAME,
1192 .dev_name = BFIN_SERIAL_DEV_NAME,
1193 .major = BFIN_SERIAL_MAJOR,
1194 .minor = BFIN_SERIAL_MINOR,
1195 .nr = BFIN_UART_NR_PORTS,
1196 .cons = BFIN_SERIAL_CONSOLE,
1197 };
1198
1199 static int bfin_serial_suspend(struct platform_device *pdev, pm_message_t state)
1200 {
1201 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1202
1203 return uart_suspend_port(&bfin_serial_reg, &uart->port);
1204 }
1205
1206 static int bfin_serial_resume(struct platform_device *pdev)
1207 {
1208 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1209
1210 return uart_resume_port(&bfin_serial_reg, &uart->port);
1211 }
1212
1213 static int bfin_serial_probe(struct platform_device *pdev)
1214 {
1215 struct resource *res;
1216 struct bfin_serial_port *uart = NULL;
1217 int ret = 0;
1218
1219 if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1220 dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n");
1221 return -ENOENT;
1222 }
1223
1224 if (bfin_serial_ports[pdev->id] == NULL) {
1225
1226 uart = kzalloc(sizeof(*uart), GFP_KERNEL);
1227 if (!uart) {
1228 dev_err(&pdev->dev,
1229 "fail to malloc bfin_serial_port\n");
1230 return -ENOMEM;
1231 }
1232 bfin_serial_ports[pdev->id] = uart;
1233
1234 #ifdef CONFIG_EARLY_PRINTK
1235 if (!(bfin_earlyprintk_port.port.membase
1236 && bfin_earlyprintk_port.port.line == pdev->id)) {
1237 /*
1238 * If the peripheral PINs of current port is allocated
1239 * in earlyprintk probe stage, don't do it again.
1240 */
1241 #endif
1242 ret = peripheral_request_list(
1243 dev_get_platdata(&pdev->dev),
1244 DRIVER_NAME);
1245 if (ret) {
1246 dev_err(&pdev->dev,
1247 "fail to request bfin serial peripherals\n");
1248 goto out_error_free_mem;
1249 }
1250 #ifdef CONFIG_EARLY_PRINTK
1251 }
1252 #endif
1253
1254 spin_lock_init(&uart->port.lock);
1255 uart->port.uartclk = get_sclk();
1256 uart->port.fifosize = BFIN_UART_TX_FIFO_SIZE;
1257 uart->port.ops = &bfin_serial_pops;
1258 uart->port.line = pdev->id;
1259 uart->port.iotype = UPIO_MEM;
1260 uart->port.flags = UPF_BOOT_AUTOCONF;
1261
1262 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1263 if (res == NULL) {
1264 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1265 ret = -ENOENT;
1266 goto out_error_free_peripherals;
1267 }
1268
1269 uart->port.membase = ioremap(res->start, resource_size(res));
1270 if (!uart->port.membase) {
1271 dev_err(&pdev->dev, "Cannot map uart IO\n");
1272 ret = -ENXIO;
1273 goto out_error_free_peripherals;
1274 }
1275 uart->port.mapbase = res->start;
1276
1277 uart->tx_irq = platform_get_irq(pdev, 0);
1278 if (uart->tx_irq < 0) {
1279 dev_err(&pdev->dev, "No uart TX IRQ specified\n");
1280 ret = -ENOENT;
1281 goto out_error_unmap;
1282 }
1283
1284 uart->rx_irq = platform_get_irq(pdev, 1);
1285 if (uart->rx_irq < 0) {
1286 dev_err(&pdev->dev, "No uart RX IRQ specified\n");
1287 ret = -ENOENT;
1288 goto out_error_unmap;
1289 }
1290 uart->port.irq = uart->rx_irq;
1291
1292 uart->status_irq = platform_get_irq(pdev, 2);
1293 if (uart->status_irq < 0) {
1294 dev_err(&pdev->dev, "No uart status IRQ specified\n");
1295 ret = -ENOENT;
1296 goto out_error_unmap;
1297 }
1298
1299 #ifdef CONFIG_SERIAL_BFIN_DMA
1300 spin_lock_init(&uart->rx_lock);
1301 uart->tx_done = 1;
1302 uart->tx_count = 0;
1303
1304 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1305 if (res == NULL) {
1306 dev_err(&pdev->dev, "No uart TX DMA channel specified\n");
1307 ret = -ENOENT;
1308 goto out_error_unmap;
1309 }
1310 uart->tx_dma_channel = res->start;
1311
1312 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1313 if (res == NULL) {
1314 dev_err(&pdev->dev, "No uart RX DMA channel specified\n");
1315 ret = -ENOENT;
1316 goto out_error_unmap;
1317 }
1318 uart->rx_dma_channel = res->start;
1319
1320 init_timer(&(uart->rx_dma_timer));
1321 #endif
1322
1323 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1324 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1325 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1326 if (res == NULL)
1327 uart->cts_pin = -1;
1328 else
1329 uart->cts_pin = res->start;
1330
1331 res = platform_get_resource(pdev, IORESOURCE_IO, 1);
1332 if (res == NULL)
1333 uart->rts_pin = -1;
1334 else
1335 uart->rts_pin = res->start;
1336 #endif
1337 }
1338
1339 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1340 if (!is_early_platform_device(pdev)) {
1341 #endif
1342 uart = bfin_serial_ports[pdev->id];
1343 uart->port.dev = &pdev->dev;
1344 dev_set_drvdata(&pdev->dev, uart);
1345 ret = uart_add_one_port(&bfin_serial_reg, &uart->port);
1346 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1347 }
1348 #endif
1349
1350 if (!ret)
1351 return 0;
1352
1353 if (uart) {
1354 out_error_unmap:
1355 iounmap(uart->port.membase);
1356 out_error_free_peripherals:
1357 peripheral_free_list(dev_get_platdata(&pdev->dev));
1358 out_error_free_mem:
1359 kfree(uart);
1360 bfin_serial_ports[pdev->id] = NULL;
1361 }
1362
1363 return ret;
1364 }
1365
1366 static int bfin_serial_remove(struct platform_device *pdev)
1367 {
1368 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1369
1370 dev_set_drvdata(&pdev->dev, NULL);
1371
1372 if (uart) {
1373 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1374 iounmap(uart->port.membase);
1375 peripheral_free_list(dev_get_platdata(&pdev->dev));
1376 kfree(uart);
1377 bfin_serial_ports[pdev->id] = NULL;
1378 }
1379
1380 return 0;
1381 }
1382
1383 static struct platform_driver bfin_serial_driver = {
1384 .probe = bfin_serial_probe,
1385 .remove = bfin_serial_remove,
1386 .suspend = bfin_serial_suspend,
1387 .resume = bfin_serial_resume,
1388 .driver = {
1389 .name = DRIVER_NAME,
1390 },
1391 };
1392
1393 #if defined(CONFIG_SERIAL_BFIN_CONSOLE)
1394 static struct early_platform_driver early_bfin_serial_driver __initdata = {
1395 .class_str = CLASS_BFIN_CONSOLE,
1396 .pdrv = &bfin_serial_driver,
1397 .requested_id = EARLY_PLATFORM_ID_UNSET,
1398 };
1399
1400 static int __init bfin_serial_rs_console_init(void)
1401 {
1402 early_platform_driver_register(&early_bfin_serial_driver, DRIVER_NAME);
1403
1404 early_platform_driver_probe(CLASS_BFIN_CONSOLE, BFIN_UART_NR_PORTS, 0);
1405
1406 register_console(&bfin_serial_console);
1407
1408 return 0;
1409 }
1410 console_initcall(bfin_serial_rs_console_init);
1411 #endif
1412
1413 #ifdef CONFIG_EARLY_PRINTK
1414 /*
1415 * Memory can't be allocated dynamically during earlyprink init stage.
1416 * So, do individual probe for earlyprink with a static uart port variable.
1417 */
1418 static int bfin_earlyprintk_probe(struct platform_device *pdev)
1419 {
1420 struct resource *res;
1421 int ret;
1422
1423 if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1424 dev_err(&pdev->dev, "Wrong earlyprintk platform device id.\n");
1425 return -ENOENT;
1426 }
1427
1428 ret = peripheral_request_list(dev_get_platdata(&pdev->dev),
1429 DRIVER_NAME);
1430 if (ret) {
1431 dev_err(&pdev->dev,
1432 "fail to request bfin serial peripherals\n");
1433 return ret;
1434 }
1435
1436 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1437 if (res == NULL) {
1438 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1439 ret = -ENOENT;
1440 goto out_error_free_peripherals;
1441 }
1442
1443 bfin_earlyprintk_port.port.membase = ioremap(res->start,
1444 resource_size(res));
1445 if (!bfin_earlyprintk_port.port.membase) {
1446 dev_err(&pdev->dev, "Cannot map uart IO\n");
1447 ret = -ENXIO;
1448 goto out_error_free_peripherals;
1449 }
1450 bfin_earlyprintk_port.port.mapbase = res->start;
1451 bfin_earlyprintk_port.port.line = pdev->id;
1452 bfin_earlyprintk_port.port.uartclk = get_sclk();
1453 bfin_earlyprintk_port.port.fifosize = BFIN_UART_TX_FIFO_SIZE;
1454 spin_lock_init(&bfin_earlyprintk_port.port.lock);
1455
1456 return 0;
1457
1458 out_error_free_peripherals:
1459 peripheral_free_list(dev_get_platdata(&pdev->dev));
1460
1461 return ret;
1462 }
1463
1464 static struct platform_driver bfin_earlyprintk_driver = {
1465 .probe = bfin_earlyprintk_probe,
1466 .driver = {
1467 .name = DRIVER_NAME,
1468 .owner = THIS_MODULE,
1469 },
1470 };
1471
1472 static struct early_platform_driver early_bfin_earlyprintk_driver __initdata = {
1473 .class_str = CLASS_BFIN_EARLYPRINTK,
1474 .pdrv = &bfin_earlyprintk_driver,
1475 .requested_id = EARLY_PLATFORM_ID_UNSET,
1476 };
1477
1478 struct console __init *bfin_earlyserial_init(unsigned int port,
1479 unsigned int cflag)
1480 {
1481 struct ktermios t;
1482 char port_name[20];
1483
1484 if (port < 0 || port >= BFIN_UART_NR_PORTS)
1485 return NULL;
1486
1487 /*
1488 * Only probe resource of the given port in earlyprintk boot arg.
1489 * The expected port id should be indicated in port name string.
1490 */
1491 snprintf(port_name, 20, DRIVER_NAME ".%d", port);
1492 early_platform_driver_register(&early_bfin_earlyprintk_driver,
1493 port_name);
1494 early_platform_driver_probe(CLASS_BFIN_EARLYPRINTK, 1, 0);
1495
1496 if (!bfin_earlyprintk_port.port.membase)
1497 return NULL;
1498
1499 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1500 /*
1501 * If we are using early serial, don't let the normal console rewind
1502 * log buffer, since that causes things to be printed multiple times
1503 */
1504 bfin_serial_console.flags &= ~CON_PRINTBUFFER;
1505 #endif
1506
1507 bfin_early_serial_console.index = port;
1508 t.c_cflag = cflag;
1509 t.c_iflag = 0;
1510 t.c_oflag = 0;
1511 t.c_lflag = ICANON;
1512 t.c_line = port;
1513 bfin_serial_set_termios(&bfin_earlyprintk_port.port, &t, &t);
1514
1515 return &bfin_early_serial_console;
1516 }
1517 #endif /* CONFIG_EARLY_PRINTK */
1518
1519 static int __init bfin_serial_init(void)
1520 {
1521 int ret;
1522
1523 pr_info("Blackfin serial driver\n");
1524
1525 ret = uart_register_driver(&bfin_serial_reg);
1526 if (ret) {
1527 pr_err("failed to register %s:%d\n",
1528 bfin_serial_reg.driver_name, ret);
1529 }
1530
1531 ret = platform_driver_register(&bfin_serial_driver);
1532 if (ret) {
1533 pr_err("fail to register bfin uart\n");
1534 uart_unregister_driver(&bfin_serial_reg);
1535 }
1536
1537 return ret;
1538 }
1539
1540 static void __exit bfin_serial_exit(void)
1541 {
1542 platform_driver_unregister(&bfin_serial_driver);
1543 uart_unregister_driver(&bfin_serial_reg);
1544 }
1545
1546
1547 module_init(bfin_serial_init);
1548 module_exit(bfin_serial_exit);
1549
1550 MODULE_AUTHOR("Sonic Zhang, Aubrey Li");
1551 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1552 MODULE_LICENSE("GPL");
1553 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1554 MODULE_ALIAS("platform:bfin-uart");
Linux with added FPC-III support