drivers/rtc/rtc-msm6242.c

   1 /*
   2  *  Oki MSM6242 RTC Driver
   3  *
   4  *  Copyright 2009 Geert Uytterhoeven
   5  *
   6  *  Based on the A2000 TOD code in arch/m68k/amiga/config.c
   7  *  Copyright (C) 1993 Hamish Macdonald
   8  */
   9
  10 #include <linux/delay.h>
  11 #include <linux/io.h>
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/rtc.h>
  16 #include <linux/slab.h>
  17
  18
  19 enum {
  20         MSM6242_SECOND1         = 0x0,  /* 1-second digit register */
  21         MSM6242_SECOND10        = 0x1,  /* 10-second digit register */
  22         MSM6242_MINUTE1         = 0x2,  /* 1-minute digit register */
  23         MSM6242_MINUTE10        = 0x3,  /* 10-minute digit register */
  24         MSM6242_HOUR1           = 0x4,  /* 1-hour digit register */
  25         MSM6242_HOUR10          = 0x5,  /* PM/AM, 10-hour digit register */
  26         MSM6242_DAY1            = 0x6,  /* 1-day digit register */
  27         MSM6242_DAY10           = 0x7,  /* 10-day digit register */
  28         MSM6242_MONTH1          = 0x8,  /* 1-month digit register */
  29         MSM6242_MONTH10         = 0x9,  /* 10-month digit register */
  30         MSM6242_YEAR1           = 0xa,  /* 1-year digit register */
  31         MSM6242_YEAR10          = 0xb,  /* 10-year digit register */
  32         MSM6242_WEEK            = 0xc,  /* Week register */
  33         MSM6242_CD              = 0xd,  /* Control Register D */
  34         MSM6242_CE              = 0xe,  /* Control Register E */
  35         MSM6242_CF              = 0xf,  /* Control Register F */
  36 };
  37
  38 #define MSM6242_HOUR10_AM       (0 << 2)
  39 #define MSM6242_HOUR10_PM       (1 << 2)
  40 #define MSM6242_HOUR10_HR_MASK  (3 << 0)
  41
  42 #define MSM6242_WEEK_SUNDAY     0
  43 #define MSM6242_WEEK_MONDAY     1
  44 #define MSM6242_WEEK_TUESDAY    2
  45 #define MSM6242_WEEK_WEDNESDAY  3
  46 #define MSM6242_WEEK_THURSDAY   4
  47 #define MSM6242_WEEK_FRIDAY     5
  48 #define MSM6242_WEEK_SATURDAY   6
  49
  50 #define MSM6242_CD_30_S_ADJ     (1 << 3)        /* 30-second adjustment */
  51 #define MSM6242_CD_IRQ_FLAG     (1 << 2)
  52 #define MSM6242_CD_BUSY         (1 << 1)
  53 #define MSM6242_CD_HOLD         (1 << 0)
  54
  55 #define MSM6242_CE_T_MASK       (3 << 2)
  56 #define MSM6242_CE_T_64HZ       (0 << 2)        /* period 1/64 second */
  57 #define MSM6242_CE_T_1HZ        (1 << 2)        /* period 1 second */
  58 #define MSM6242_CE_T_1MINUTE    (2 << 2)        /* period 1 minute */
  59 #define MSM6242_CE_T_1HOUR      (3 << 2)        /* period 1 hour */
  60
  61 #define MSM6242_CE_ITRPT_STND   (1 << 1)
  62 #define MSM6242_CE_MASK         (1 << 0)        /* STD.P output control */
  63
  64 #define MSM6242_CF_TEST         (1 << 3)
  65 #define MSM6242_CF_12H          (0 << 2)
  66 #define MSM6242_CF_24H          (1 << 2)
  67 #define MSM6242_CF_STOP         (1 << 1)
  68 #define MSM6242_CF_REST         (1 << 0)        /* reset */
  69
  70
  71 struct msm6242_priv {
  72         u32 __iomem *regs;
  73         struct rtc_device *rtc;
  74 };
  75
  76 static inline unsigned int msm6242_read(struct msm6242_priv *priv,
  77                                        unsigned int reg)
  78 {
  79         return __raw_readl(&priv->regs[reg]) & 0xf;
  80 }
  81
  82 static inline void msm6242_write(struct msm6242_priv *priv, unsigned int val,
  83                                 unsigned int reg)
  84 {
  85         __raw_writel(val, &priv->regs[reg]);
  86 }
  87
  88 static inline void msm6242_set(struct msm6242_priv *priv, unsigned int val,
  89                                unsigned int reg)
  90 {
  91         msm6242_write(priv, msm6242_read(priv, reg) | val, reg);
  92 }
  93
  94 static inline void msm6242_clear(struct msm6242_priv *priv, unsigned int val,
  95                                  unsigned int reg)
  96 {
  97         msm6242_write(priv, msm6242_read(priv, reg) & ~val, reg);
  98 }
  99
 100 static void msm6242_lock(struct msm6242_priv *priv)
 101 {
 102         int cnt = 5;
 103
 104         msm6242_set(priv, MSM6242_CD_HOLD, MSM6242_CD);
 105
 106         while ((msm6242_read(priv, MSM6242_CD) & MSM6242_CD_BUSY) && cnt) {
 107                 msm6242_clear(priv, MSM6242_CD_HOLD, MSM6242_CD);
 108                 udelay(70);
 109                 msm6242_set(priv, MSM6242_CD_HOLD, MSM6242_CD);
 110                 cnt--;
 111         }
 112
 113         if (!cnt)
 114                 pr_warn("msm6242: timed out waiting for RTC (0x%x)\n",
 115                         msm6242_read(priv, MSM6242_CD));
 116 }
 117
 118 static void msm6242_unlock(struct msm6242_priv *priv)
 119 {
 120         msm6242_clear(priv, MSM6242_CD_HOLD, MSM6242_CD);
 121 }
 122
 123 static int msm6242_read_time(struct device *dev, struct rtc_time *tm)
 124 {
 125         struct msm6242_priv *priv = dev_get_drvdata(dev);
 126
 127         msm6242_lock(priv);
 128
 129         tm->tm_sec  = msm6242_read(priv, MSM6242_SECOND10) * 10 +
 130                       msm6242_read(priv, MSM6242_SECOND1);
 131         tm->tm_min  = msm6242_read(priv, MSM6242_MINUTE10) * 10 +
 132                       msm6242_read(priv, MSM6242_MINUTE1);
 133         tm->tm_hour = (msm6242_read(priv, MSM6242_HOUR10 & 3)) * 10 +
 134                       msm6242_read(priv, MSM6242_HOUR1);
 135         tm->tm_mday = msm6242_read(priv, MSM6242_DAY10) * 10 +
 136                       msm6242_read(priv, MSM6242_DAY1);
 137         tm->tm_wday = msm6242_read(priv, MSM6242_WEEK);
 138         tm->tm_mon  = msm6242_read(priv, MSM6242_MONTH10) * 10 +
 139                       msm6242_read(priv, MSM6242_MONTH1) - 1;
 140         tm->tm_year = msm6242_read(priv, MSM6242_YEAR10) * 10 +
 141                       msm6242_read(priv, MSM6242_YEAR1);
 142         if (tm->tm_year <= 69)
 143                 tm->tm_year += 100;
 144
 145         if (!(msm6242_read(priv, MSM6242_CF) & MSM6242_CF_24H)) {
 146                 unsigned int pm = msm6242_read(priv, MSM6242_HOUR10) &
 147                                   MSM6242_HOUR10_PM;
 148                 if (!pm && tm->tm_hour == 12)
 149                         tm->tm_hour = 0;
 150                 else if (pm && tm->tm_hour != 12)
 151                         tm->tm_hour += 12;
 152         }
 153
 154         msm6242_unlock(priv);
 155
 156         return rtc_valid_tm(tm);
 157 }
 158
 159 static int msm6242_set_time(struct device *dev, struct rtc_time *tm)
 160 {
 161         struct msm6242_priv *priv = dev_get_drvdata(dev);
 162
 163         msm6242_lock(priv);
 164
 165         msm6242_write(priv, tm->tm_sec / 10, MSM6242_SECOND10);
 166         msm6242_write(priv, tm->tm_sec % 10, MSM6242_SECOND1);
 167         msm6242_write(priv, tm->tm_min / 10, MSM6242_MINUTE10);
 168         msm6242_write(priv, tm->tm_min % 10, MSM6242_MINUTE1);
 169         if (msm6242_read(priv, MSM6242_CF) & MSM6242_CF_24H)
 170                 msm6242_write(priv, tm->tm_hour / 10, MSM6242_HOUR10);
 171         else if (tm->tm_hour >= 12)
 172                 msm6242_write(priv, MSM6242_HOUR10_PM + (tm->tm_hour - 12) / 10,
 173                               MSM6242_HOUR10);
 174         else
 175                 msm6242_write(priv, tm->tm_hour / 10, MSM6242_HOUR10);
 176         msm6242_write(priv, tm->tm_hour % 10, MSM6242_HOUR1);
 177         msm6242_write(priv, tm->tm_mday / 10, MSM6242_DAY10);
 178         msm6242_write(priv, tm->tm_mday % 10, MSM6242_DAY1);
 179         if (tm->tm_wday != -1)
 180                 msm6242_write(priv, tm->tm_wday, MSM6242_WEEK);
 181         msm6242_write(priv, (tm->tm_mon + 1) / 10, MSM6242_MONTH10);
 182         msm6242_write(priv, (tm->tm_mon + 1) % 10, MSM6242_MONTH1);
 183         if (tm->tm_year >= 100)
 184                 tm->tm_year -= 100;
 185         msm6242_write(priv, tm->tm_year / 10, MSM6242_YEAR10);
 186         msm6242_write(priv, tm->tm_year % 10, MSM6242_YEAR1);
 187
 188         msm6242_unlock(priv);
 189         return 0;
 190 }
 191
 192 static const struct rtc_class_ops msm6242_rtc_ops = {
 193         .read_time      = msm6242_read_time,
 194         .set_time       = msm6242_set_time,
 195 };
 196
 197 static int __init msm6242_rtc_probe(struct platform_device *pdev)
 198 {
 199         struct resource *res;
 200         struct msm6242_priv *priv;
 201         struct rtc_device *rtc;
 202
 203         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 204         if (!res)
 205                 return -ENODEV;
 206
 207         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
 208         if (!priv)
 209                 return -ENOMEM;
 210
 211         priv->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
 212         if (!priv->regs)
 213                 return -ENOMEM;
 214         platform_set_drvdata(pdev, priv);
 215
 216         rtc = devm_rtc_device_register(&pdev->dev, "rtc-msm6242",
 217                                 &msm6242_rtc_ops, THIS_MODULE);
 218         if (IS_ERR(rtc))
 219                 return PTR_ERR(rtc);
 220
 221         priv->rtc = rtc;
 222         return 0;
 223 }
 224
 225 static struct platform_driver msm6242_rtc_driver = {
 226         .driver = {
 227                 .name   = "rtc-msm6242",
 228         },
 229 };
 230
 231 module_platform_driver_probe(msm6242_rtc_driver, msm6242_rtc_probe);
 232
 233 MODULE_AUTHOR("Geert Uytterhoeven <geert@linux-m68k.org>");
 234 MODULE_LICENSE("GPL");
 235 MODULE_DESCRIPTION("Oki MSM6242 RTC driver");
 236 MODULE_ALIAS("platform:rtc-msm6242");